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1 | /** @file\r | |
2 | Definitions to install Multiple Processor PPI.\r | |
3 | \r | |
4 | Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r | |
5 | This program and the accompanying materials\r | |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | **/\r | |
14 | \r | |
15 | #ifndef _CPU_MP_PEI_H_\r | |
16 | #define _CPU_MP_PEI_H_\r | |
17 | \r | |
18 | #include <PiPei.h>\r | |
19 | \r | |
20 | #include <Ppi/MpServices.h>\r | |
21 | #include <Ppi/SecPlatformInformation.h>\r | |
22 | #include <Ppi/SecPlatformInformation2.h>\r | |
23 | #include <Ppi/EndOfPeiPhase.h>\r | |
24 | \r | |
25 | #include <Register/Cpuid.h>\r | |
26 | #include <Register/LocalApic.h>\r | |
27 | \r | |
28 | #include <Library/BaseLib.h>\r | |
29 | #include <Library/BaseMemoryLib.h>\r | |
30 | #include <Library/DebugLib.h>\r | |
31 | #include <Library/HobLib.h>\r | |
32 | #include <Library/LocalApicLib.h>\r | |
33 | #include <Library/MtrrLib.h>\r | |
34 | #include <Library/PcdLib.h>\r | |
35 | #include <Library/PeimEntryPoint.h>\r | |
36 | #include <Library/PeiServicesLib.h>\r | |
37 | #include <Library/ReportStatusCodeLib.h>\r | |
38 | #include <Library/SynchronizationLib.h>\r | |
39 | #include <Library/TimerLib.h>\r | |
40 | #include <Library/UefiCpuLib.h>\r | |
41 | \r | |
42 | #include "Microcode.h"\r | |
43 | \r | |
44 | //\r | |
45 | // AP state\r | |
46 | //\r | |
47 | typedef enum {\r | |
48 | CpuStateIdle,\r | |
49 | CpuStateBusy,\r | |
50 | CpuStateDisabled\r | |
51 | } CPU_STATE;\r | |
52 | \r | |
53 | //\r | |
54 | // AP reset code information\r | |
55 | //\r | |
56 | typedef struct {\r | |
57 | UINT8 *RendezvousFunnelAddress;\r | |
58 | UINTN PModeEntryOffset;\r | |
59 | UINTN LModeEntryOffset;\r | |
60 | UINTN RendezvousFunnelSize;\r | |
61 | } MP_ASSEMBLY_ADDRESS_MAP;\r | |
62 | \r | |
63 | //\r | |
64 | // CPU exchange information for switch BSP\r | |
65 | //\r | |
66 | typedef struct {\r | |
67 | UINT8 State; // offset 0\r | |
68 | UINTN StackPointer; // offset 4 / 8\r | |
69 | IA32_DESCRIPTOR Gdtr; // offset 8 / 16\r | |
70 | IA32_DESCRIPTOR Idtr; // offset 14 / 26\r | |
71 | } CPU_EXCHANGE_ROLE_INFO;\r | |
72 | \r | |
73 | typedef struct _PEI_CPU_MP_DATA PEI_CPU_MP_DATA;\r | |
74 | \r | |
75 | #pragma pack()\r | |
76 | \r | |
77 | typedef union {\r | |
78 | struct {\r | |
79 | UINT32 LimitLow : 16;\r | |
80 | UINT32 BaseLow : 16;\r | |
81 | UINT32 BaseMid : 8;\r | |
82 | UINT32 Type : 4;\r | |
83 | UINT32 System : 1;\r | |
84 | UINT32 Dpl : 2;\r | |
85 | UINT32 Present : 1;\r | |
86 | UINT32 LimitHigh : 4;\r | |
87 | UINT32 Software : 1;\r | |
88 | UINT32 Reserved : 1;\r | |
89 | UINT32 DefaultSize : 1;\r | |
90 | UINT32 Granularity : 1;\r | |
91 | UINT32 BaseHigh : 8;\r | |
92 | } Bits;\r | |
93 | UINT64 Uint64;\r | |
94 | } IA32_GDT;\r | |
95 | \r | |
96 | //\r | |
97 | // MP CPU exchange information for AP reset code\r | |
98 | //\r | |
99 | typedef struct {\r | |
100 | UINTN Lock;\r | |
101 | UINTN StackStart;\r | |
102 | UINTN StackSize;\r | |
103 | UINTN CFunction;\r | |
104 | IA32_DESCRIPTOR GdtrProfile;\r | |
105 | IA32_DESCRIPTOR IdtrProfile;\r | |
106 | UINTN BufferStart;\r | |
107 | UINTN PmodeOffset;\r | |
108 | UINTN NumApsExecuting;\r | |
109 | UINTN LmodeOffset;\r | |
110 | UINTN Cr3;\r | |
111 | PEI_CPU_MP_DATA *PeiCpuMpData;\r | |
112 | } MP_CPU_EXCHANGE_INFO;\r | |
113 | \r | |
114 | #pragma pack()\r | |
115 | \r | |
116 | typedef struct {\r | |
117 | UINT32 ApicId;\r | |
118 | EFI_HEALTH_FLAGS Health;\r | |
119 | CPU_STATE State;\r | |
120 | BOOLEAN CpuHealthy;\r | |
121 | } PEI_CPU_DATA;\r | |
122 | \r | |
123 | //\r | |
124 | // PEI CPU MP Data save in memory\r | |
125 | //\r | |
126 | struct _PEI_CPU_MP_DATA {\r | |
127 | SPIN_LOCK MpLock;\r | |
128 | UINT32 CpuCount;\r | |
129 | UINT32 BspNumber;\r | |
130 | UINTN Buffer;\r | |
131 | UINTN CpuApStackSize;\r | |
132 | MP_ASSEMBLY_ADDRESS_MAP AddressMap;\r | |
133 | UINTN WakeupBuffer;\r | |
134 | UINTN BackupBuffer;\r | |
135 | UINTN BackupBufferSize;\r | |
136 | UINTN ApFunction;\r | |
137 | UINTN ApFunctionArgument;\r | |
138 | volatile UINT32 FinishedCount;\r | |
139 | BOOLEAN EndOfPeiFlag;\r | |
140 | BOOLEAN InitFlag;\r | |
141 | BOOLEAN X2ApicEnable;\r | |
142 | CPU_EXCHANGE_ROLE_INFO BSPInfo;\r | |
143 | CPU_EXCHANGE_ROLE_INFO APInfo;\r | |
144 | MTRR_SETTINGS MtrrTable;\r | |
145 | PEI_CPU_DATA *CpuData;\r | |
146 | volatile MP_CPU_EXCHANGE_INFO *MpCpuExchangeInfo;\r | |
147 | };\r | |
148 | extern EFI_PEI_PPI_DESCRIPTOR mPeiCpuMpPpiDesc;\r | |
149 | \r | |
150 | \r | |
151 | /**\r | |
152 | Assembly code to get starting address and size of the rendezvous entry for APs.\r | |
153 | Information for fixing a jump instruction in the code is also returned.\r | |
154 | \r | |
155 | @param AddressMap Output buffer for address map information.\r | |
156 | **/\r | |
157 | VOID\r | |
158 | EFIAPI\r | |
159 | AsmGetAddressMap (\r | |
160 | OUT MP_ASSEMBLY_ADDRESS_MAP *AddressMap\r | |
161 | );\r | |
162 | \r | |
163 | /**\r | |
164 | Assembly code to load GDT table and update segment accordingly.\r | |
165 | \r | |
166 | @param Gdtr Pointer to GDT descriptor\r | |
167 | **/\r | |
168 | VOID\r | |
169 | EFIAPI\r | |
170 | AsmInitializeGdt (\r | |
171 | IN IA32_DESCRIPTOR *Gdtr\r | |
172 | );\r | |
173 | \r | |
174 | /**\r | |
175 | Assembly code to do CLI-HALT loop.\r | |
176 | \r | |
177 | **/\r | |
178 | VOID\r | |
179 | EFIAPI\r | |
180 | AsmCliHltLoop (\r | |
181 | VOID\r | |
182 | );\r | |
183 | \r | |
184 | /**\r | |
185 | Get available system memory below 1MB by specified size.\r | |
186 | \r | |
187 | @param PeiCpuMpData Pointer to PEI CPU MP Data\r | |
188 | **/\r | |
189 | VOID\r | |
190 | BackupAndPrepareWakeupBuffer(\r | |
191 | IN PEI_CPU_MP_DATA *PeiCpuMpData\r | |
192 | );\r | |
193 | \r | |
194 | /**\r | |
195 | Restore wakeup buffer data.\r | |
196 | \r | |
197 | @param PeiCpuMpData Pointer to PEI CPU MP Data\r | |
198 | **/\r | |
199 | VOID\r | |
200 | RestoreWakeupBuffer(\r | |
201 | IN PEI_CPU_MP_DATA *PeiCpuMpData\r | |
202 | );\r | |
203 | \r | |
204 | /**\r | |
205 | Notify function on End Of Pei PPI.\r | |
206 | \r | |
207 | On S3 boot, this function will restore wakeup buffer data.\r | |
208 | On normal boot, this function will flag wakeup buffer to be un-used type.\r | |
209 | \r | |
210 | @param PeiServices The pointer to the PEI Services Table.\r | |
211 | @param NotifyDescriptor Address of the notification descriptor data structure.\r | |
212 | @param Ppi Address of the PPI that was installed.\r | |
213 | \r | |
214 | @retval EFI_SUCCESS When everything is OK.\r | |
215 | \r | |
216 | **/\r | |
217 | EFI_STATUS\r | |
218 | EFIAPI\r | |
219 | CpuMpEndOfPeiCallback (\r | |
220 | IN EFI_PEI_SERVICES **PeiServices,\r | |
221 | IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,\r | |
222 | IN VOID *Ppi\r | |
223 | );\r | |
224 | \r | |
225 | /**\r | |
226 | This function will be called by BSP to wakeup AP.\r | |
227 | \r | |
228 | @param PeiCpuMpData Pointer to PEI CPU MP Data\r | |
229 | @param Broadcast TRUE: Send broadcast IPI to all APs\r | |
230 | FALSE: Send IPI to AP by ApicId\r | |
231 | @param ApicId Apic ID for the processor to be waked\r | |
232 | @param Procedure The function to be invoked by AP\r | |
233 | @param ProcedureArgument The argument to be passed into AP function\r | |
234 | **/\r | |
235 | VOID\r | |
236 | WakeUpAP (\r | |
237 | IN PEI_CPU_MP_DATA *PeiCpuMpData,\r | |
238 | IN BOOLEAN Broadcast,\r | |
239 | IN UINT32 ApicId,\r | |
240 | IN EFI_AP_PROCEDURE Procedure, OPTIONAL\r | |
241 | IN VOID *ProcedureArgument OPTIONAL\r | |
242 | );\r | |
243 | \r | |
244 | /**\r | |
245 | Get CPU MP Data pointer from the Guided HOB.\r | |
246 | \r | |
247 | @return Pointer to Pointer to PEI CPU MP Data\r | |
248 | **/\r | |
249 | PEI_CPU_MP_DATA *\r | |
250 | GetMpHobData (\r | |
251 | VOID\r | |
252 | );\r | |
253 | \r | |
254 | /**\r | |
255 | Find the current Processor number by APIC ID.\r | |
256 | \r | |
257 | @param PeiCpuMpData Pointer to PEI CPU MP Data\r | |
258 | @param ProcessorNumber Return the pocessor number found\r | |
259 | \r | |
260 | @retval EFI_SUCCESS ProcessorNumber is found and returned.\r | |
261 | @retval EFI_NOT_FOUND ProcessorNumber is not found.\r | |
262 | **/\r | |
263 | EFI_STATUS\r | |
264 | GetProcessorNumber (\r | |
265 | IN PEI_CPU_MP_DATA *PeiCpuMpData,\r | |
266 | OUT UINTN *ProcessorNumber\r | |
267 | );\r | |
268 | \r | |
269 | /**\r | |
270 | Collects BIST data from PPI.\r | |
271 | \r | |
272 | This function collects BIST data from Sec Platform Information2 PPI\r | |
273 | or SEC Platform Information PPI.\r | |
274 | \r | |
275 | @param PeiServices Pointer to PEI Services Table\r | |
276 | @param PeiCpuMpData Pointer to PEI CPU MP Data\r | |
277 | \r | |
278 | **/\r | |
279 | VOID\r | |
280 | CollectBistDataFromPpi (\r | |
281 | IN CONST EFI_PEI_SERVICES **PeiServices,\r | |
282 | IN PEI_CPU_MP_DATA *PeiCpuMpData\r | |
283 | );\r | |
284 | \r | |
285 | /**\r | |
286 | Implementation of the PlatformInformation2 service in EFI_SEC_PLATFORM_INFORMATION2_PPI.\r | |
287 | \r | |
288 | @param PeiServices The pointer to the PEI Services Table.\r | |
289 | @param StructureSize The pointer to the variable describing size of the input buffer.\r | |
290 | @param PlatformInformationRecord2 The pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD2.\r | |
291 | \r | |
292 | @retval EFI_SUCCESS The data was successfully returned.\r | |
293 | @retval EFI_BUFFER_TOO_SMALL The buffer was too small. The current buffer size needed to\r | |
294 | hold the record is returned in StructureSize.\r | |
295 | \r | |
296 | **/\r | |
297 | EFI_STATUS\r | |
298 | EFIAPI\r | |
299 | SecPlatformInformation2 (\r | |
300 | IN CONST EFI_PEI_SERVICES **PeiServices,\r | |
301 | IN OUT UINT64 *StructureSize,\r | |
302 | OUT EFI_SEC_PLATFORM_INFORMATION_RECORD2 *PlatformInformationRecord2\r | |
303 | );\r | |
304 | \r | |
305 | #endif\r |