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UefiCpuPkg/CpuS3DataDxe: Change Memory Type and address limitation.
[mirror_edk2.git] / Vlv2DeviceRefCodePkg / AcpiTablesPCAT / PchXhci.asl
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1/**************************************************************************;\r
2;* *;\r
3;* *;\r
4;* Intel Corporation - ACPI Reference Code for the Haswell *;\r
5;* Family of Customer Reference Boards. *;\r
6;* *;\r
7;* *;\r
8;* Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved *;\r
9;\r
10; This program and the accompanying materials are licensed and made available under\r
11; the terms and conditions of the BSD License that accompanies this distribution.\r
12; The full text of the license may be found at\r
13; http://opensource.org/licenses/bsd-license.php.\r
14;\r
15; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
16; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
17;\r
18;* *;\r
19;* *;\r
20;**************************************************************************/\r
21\r
22//scope is \_SB.PCI0.XHC\r
23Device(XHC1)\r
24{\r
25 Name(_ADR, 0x00140000) //Device 20, Function 0\r
26\r
27 //When it is in Host mode, USH core is connected to USB3 microAB(USB3 P1 and USB2 P0)\r
28 Name (_DDN, "Baytrail XHCI controller (CCG core/Host only)" )\r
29\r
30 Method(XDEP, 0)\r
31 {\r
32 If(LEqual(OSYS,2013))\r
33 {\r
34 Name(_DEP, Package(0x1)\r
35 {\r
36 PEPD\r
37 })\r
38 }\r
39 }\r
40\r
41 Name (_STR, Unicode ("Baytrail XHCI controller (CCG core/Host only)"))\r
42 Name(_PRW, Package() {0xD,4})\r
43\r
44 Method(_PSW,1)\r
45 {\r
46 If (LAnd (PMES, PMEE)) {\r
47 Store (0, PMEE)\r
48 Store (1, PMES)\r
49 }\r
50 }\r
51\r
52 OperationRegion (PMEB, PCI_Config, 0x74, 0x04) // Power Management Control/Status\r
53 Field (PMEB, WordAcc, NoLock, Preserve)\r
54 {\r
55 , 8,\r
56 PMEE, 1, //bit8 PME_En\r
57 , 6,\r
58 PMES, 1 //bit15 PME_Status\r
59 }\r
60\r
61 Method(_STA, 0)\r
62 {\r
63 If(LNotEqual(XHCI, 0)) //NVS variable controls present of XHCI controller\r
64 {\r
65 Return (0xF)\r
66 } Else\r
67 {\r
68 Return (0x0)\r
69 }\r
70 }\r
71\r
72 OperationRegion(XPRT,PCI_Config,0xD0,0x10)\r
73 Field(XPRT,DWordAcc,NoLock,Preserve) //usbx_top.doc.xml\r
74 {\r
75 PR2, 32, //bit[8:0] USB2HCSEL\r
76 PR2M, 32, //bit[8:0] USB2HCSELM\r
77 PR3, 32, //bit[3:0] USB3SSEN\r
78 PR3M, 32 //bit[3:0] USB3SSENM\r
79 }\r
80\r
81 Device(RHUB)\r
82 {\r
83 Name(_ADR, Zero) //address 0 is reserved for root hub\r
84\r
85 //\r
86 // Super Speed Ports - must match _UPC declarations of the coresponding Full Speed Ports.\r
87 // Paired with Port 1\r
88 Device(SSP1)\r
89 {\r
90 Name(_ADR, 0x07)\r
91\r
92 Method(_UPC,0,Serialized)\r
93 {\r
94 Name(UPCP, Package()\r
95 {\r
96 0xFF, // Port is connectable if non-zero\r
97 0x06, // USB3 uAB connector\r
98 0x00,\r
99 0x00\r
100 })\r
101 Return(UPCP)\r
102 }\r
103\r
104 Method(_PLD,0,Serialized)\r
105 {\r
106 Name(PLDP, Package() //pls check ACPI 5.0 section 6.1.8\r
107 {\r
108 Buffer(0x14)\r
109 {\r
110 //31:0 - Bit[6:0]=2 revision is 0x2, Bit[7]=1 Ignore Color Bit[31:8]=0 RGB color is ignored\r
111 0x82, 0x00, 0x00, 0x00,\r
112 //63:32 - Bit[47:32]=0 width: 0x0000 Bit[63:48]=0 Height:0x0000\r
113 0x00, 0x00, 0x00, 0x00,\r
114 //95:64 - bit[66:64]=b'011 visiable/docking/no lid bit[69:67]=b'001 bottom panel bit[71:70]=b'01 Center bit[73:72]=b'01 Center\r
115 // bit[77:74]=6 Horizontal Trapezoid bit[78]=0 bit[86:79]=0 bit[94:87]='0 no group info' bit[95]=0 not a bay\r
116 0x4B, 0x19, 0x00, 0x00,\r
117 //127:96 -bit[96]=1 Ejectable bit[97]=1 OSPM Ejection required Bit[105:98]=0 no Cabinet Number\r
118 // bit[113:106]=0 no Card cage Number bit[114]=0 no reference shape Bit[118:115]=0 no rotation Bit[123:119]=0 no order\r
119 0x03, 0x00, 0x00, 0x00,\r
120 //159:128 Vert. and Horiz. Offsets not supplied\r
121 0xFF, 0xFF, 0xFF, 0xFF\r
122 }\r
123 })\r
124 Return (PLDP)\r
125 }\r
126 }\r
127 //\r
128 // High Speed Ports\r
129 // pair port with port 7 (SS)\r
130 // The UPC declarations for LS/FS/HS and SS ports that are paired to form a USB3.0 compatible connector.\r
131 // A "pair" is defined by two ports that declare _PLDs with identical Panel, Vertical Position, Horizontal Postion, Shape, Group Orientation\r
132 // and Group Token\r
133 Device(HS01)\r
134 {\r
135 Name(_ADR, 0x01)\r
136\r
137 Method(_UPC,0,Serialized)\r
138 {\r
139 Name(UPCP, Package() { 0xFF,0x06,0x00,0x00 })\r
140 Return(UPCP)\r
141 }\r
142\r
143 Method(_PLD,0,Serialized)\r
144 {\r
145 Name(PLDP, Package() //pls check ACPI 5.0 section 6.1.8\r
146 {\r
147 Buffer(0x14)\r
148 {\r
149 //31:0 - Bit[6:0]=2 revision is 0x2, Bit[7]=1 Ignore Color Bit[31:8]=0 RGB color is ignored\r
150 0x82, 0x00, 0x00, 0x00,\r
151 //63:32 - Bit[47:32]=0 width: 0x0000 Bit[63:48]=0 Height:0x0000\r
152 0x00, 0x00, 0x00, 0x00,\r
153 //95:64 - bit[66:64]=b'011 visiable/docking/no lid bit[69:67]=b'001 bottom panel bit[71:70]=b'01 Center bit[73:72]=b'01 Center\r
154 // bit[77:74]=6 Horizontal Trapezoid bit[78]=0 bit[86:79]=0 bit[94:87]='0 no group info' bit[95]=0 not a bay\r
155 0x4B, 0x19, 0x00, 0x00,\r
156 //127:96 -bit[96]=1 Ejectable bit[97]=1 OSPM Ejection required Bit[105:98]=0 no Cabinet Number\r
157 // bit[113:106]=0 no Card cage Number bit[114]=0 no reference shape Bit[118:115]=0 no rotation Bit[123:119]=0 no order\r
158 0x03, 0x00, 0x00, 0x00,\r
159 //159:128 Vert. and Horiz. Offsets not supplied\r
160 0xFF, 0xFF, 0xFF, 0xFF\r
161 }\r
162 })\r
163 Return (PLDP)\r
164 }\r
165 }//end of HS01\r
166\r
167 // USB2 Type-A/USB2 only\r
168 // EHCI debug capable\r
169 Device(HS02)\r
170 {\r
171 Name(_ADR, 0x02) // 0 is for root hub so physical port index starts from 1 (it is port1 in schematic)\r
172\r
173 Method(_UPC,0,Serialized)\r
174 {\r
175 Name(UPCP, Package()\r
176 {\r
177 0xFF, // connectable\r
178 0xFF, //\r
179 0x00,\r
180 0x00\r
181 })\r
182\r
183 Return(UPCP)\r
184 }\r
185\r
186 Method(_PLD,0,Serialized)\r
187 {\r
188 Name(PLDP, Package()\r
189 {\r
190 Buffer(0x14)\r
191 {\r
192 //31:0 - Bit[6:0]=2 revision is 0x2, Bit[7]=1 Ignore Color Bit[31:8]=0 RGB color is ignored\r
193 0x82, 0x00, 0x00, 0x00,\r
194 //63:32 - Bit[47:32]=0 width: 0x0000 Bit[63:48]=0 Height:0x0000\r
195 0x00, 0x00, 0x00, 0x00,\r
196 //95:64 - bit[66:64]=b'011 visiable/docking/no lid bit[69:67]=b'001 bottom panel bit[71:70]=b'01 Center bit[73:72]=b'00 Left\r
197 // bit[77:74]=2 Square bit[78]=0 bit[86:79]=0 bit[94:87]='0 no group info' bit[95]=0 not a bay\r
198 0x4B, 0x08, 0x00, 0x00,\r
199 //127:96 -bit[96]=1 Ejectable bit[97]=1 OSPM Ejection required Bit[105:98]=0 no Cabinet Number\r
200 // bit[113:106]=0 no Card cage Number bit[114]=0 no reference shape Bit[118:115]=0 no rotation Bit[123:119]=0 no order\r
201 0x03, 0x00, 0x00, 0x00,\r
202 //159:128 Vert. and Horiz. Offsets not supplied\r
203 0xFF, 0xFF, 0xFF, 0xFF\r
204 }\r
205 })\r
206\r
207 Return (PLDP)\r
208 }\r
209 }//end of HS02\r
210 // high speed port 3\r
211 Device(HS03)\r
212 {\r
213 Name(_ADR, 0x03)\r
214\r
215 Method(_UPC,0,Serialized)\r
216 {\r
217 Name(UPCP, Package()\r
218 {\r
219 0xFF, // connectable\r
220 0xFF,\r
221 0x00,\r
222 0x00\r
223 })\r
224\r
225 Return(UPCP)\r
226 }\r
227\r
228 Method(_RMV, 0) // for XHCICV debug purpose\r
229 {\r
230 Return(0x0)\r
231 }\r
232\r
233 Method(_PLD,0,Serialized)\r
234 {\r
235 Name(PLDP, Package()\r
236 {\r
237 Buffer(0x14)\r
238 {\r
239 //31:0 - Bit[6:0]=2 revision is 0x2, Bit[7]=1 Ignore Color Bit[31:8]=0 RGB color is ignored\r
240 0x82, 0x00, 0x00, 0x00,\r
241 //63:32 - Bit[47:32]=0 width: 0x0000 Bit[63:48]=0 Height:0x0000\r
242 0x00, 0x00, 0x00, 0x00,\r
243 //95:64 - bit[66:64]=b'000 not Visible/no docking/no lid bit[69:67]=6 (b'110) unknown(Vertical Position and Horizontal Position will be ignored)\r
244 // bit[71:70]=b'00 Vertical Position ignore bit[73:72]=b'00 Horizontal Position ignore\r
245 // bit[77:74]=2 Square bit[78]=0 bit[86:79]=0 bit[94:87]='0 no group info' bit[95]=0 not a bay\r
246 0x30, 0x08, 0x00, 0x00,\r
247 //127:96 -bit[96]=0 not Ejectable bit[97]=0 OSPM Ejection not required Bit[105:98]=0 no Cabinet Number\r
248 // bit[113:106]=0 no Card cage Number bit[114]=0 no reference shape Bit[118:115]=0 no rotation Bit[123:119]=0 no order\r
249 0x00, 0x00, 0x00, 0x00,\r
250 //159:128 Vert. and Horiz. Offsets not supplied\r
251 0xFF, 0xFF, 0xFF, 0xFF\r
252 }\r
253 })\r
254 Return (PLDP)\r
255 }\r
256 }\r
257\r
258 Device(HS04)\r
259 {\r
260 Name(_ADR, 0x04)\r
261\r
262 Method(_UPC,0,Serialized)\r
263 {\r
264 Name(UPCP, Package()\r
265 {\r
266 0xFF, //connectable\r
267 0xFF, //Proprietary connector (FPC connector)\r
268 0x00,\r
269 0x00\r
270 })\r
271\r
272 Return(UPCP)\r
273 }\r
274 Method(_PLD,0,Serialized)\r
275 {\r
276 Name(PLDP, Package()\r
277 {\r
278 Buffer(0x14)\r
279 {\r
280 //31:0 - Bit[6:0]=2 revision is 0x2, Bit[7]=1 Ignore Color Bit[31:8]=0 RGB color is ignored\r
281 0x82, 0x00, 0x00, 0x00,\r
282 //63:32 - Bit[47:32]=0 width: 0x0000 Bit[63:48]=0 Height:0x0000\r
283 0x00, 0x00, 0x00, 0x00,\r
284 //95:64 - bit[66:64]=b'000 not Visible/no docking/no lid bit[69:67]=6 (b'110) unknown(Vertical Position and Horizontal Position will be ignored)\r
285 // bit[71:70]=b'00 Vertical Position ignore bit[73:72]=b'00 Horizontal Position ignore\r
286 // bit[77:74]=2 Square bit[78]=0 bit[86:79]=0 bit[94:87]='0 no group info' bit[95]=0 not a bay\r
287 0x30, 0x08, 0x00, 0x00,\r
288 //127:96 -bit[96]=0 not Ejectable bit[97]=0 OSPM Ejection not required Bit[105:98]=0 no Cabinet Number\r
289 // bit[113:106]=0 no Card cage Number bit[114]=0 no reference shape Bit[118:115]=0 no rotation Bit[123:119]=0 no order\r
290 0x00, 0x00, 0x00, 0x00,\r
291 //159:128 Vert. and Horiz. Offsets not supplied\r
292 0xFF, 0xFF, 0xFF, 0xFF\r
293 }\r
294 })\r
295\r
296 Return (PLDP)\r
297 }\r
298 }\r
299\r
300\r
301 Device(HSC1) // USB2 HSIC 01\r
302 {\r
303 Name(_ADR, 0x05)\r
304\r
305 Method(_UPC,0,Serialized)\r
306 {\r
307 Name(UPCP, Package()\r
308 {\r
309 0xFF, //connectable\r
310 0xFF, //Proprietary connector (FPC connector)\r
311 0x00,\r
312 0x00\r
313 })\r
314\r
315 Return(UPCP)\r
316 }\r
317 Method(_PLD,0,Serialized)\r
318 {\r
319 Name(PLDP, Package()\r
320 {\r
321 Buffer(0x14)\r
322 {\r
323 //31:0 - Bit[6:0]=2 revision is 0x2, Bit[7]=1 Ignore Color Bit[31:8]=0 RGB color is ignored\r
324 0x82, 0x00, 0x00, 0x00,\r
325 //63:32 - Bit[47:32]=0 width: 0x0000 Bit[63:48]=0 Height:0x0000\r
326 0x00, 0x00, 0x00, 0x00,\r
327 //95:64 - bit[66:64]=b'000 not Visible/no docking/no lid bit[69:67]=6 (b'110) unknown(Vertical Position and Horizontal Position will be ignored)\r
328 // bit[71:70]=b'00 Vertical Position ignore bit[73:72]=b'00 Horizontal Position ignore\r
329 // bit[77:74]=2 Square bit[78]=0 bit[86:79]=0 bit[94:87]='0 no group info' bit[95]=0 not a bay\r
330 0x30, 0x08, 0x00, 0x00,\r
331 //127:96 -bit[96]=0 not Ejectable bit[97]=0 OSPM Ejection not required Bit[105:98]=0 no Cabinet Number\r
332 // bit[113:106]=0 no Card cage Number bit[114]=0 no reference shape Bit[118:115]=0 no rotation Bit[123:119]=0 no order\r
333 0x00, 0x00, 0x00, 0x00,\r
334 //159:128 Vert. and Horiz. Offsets not supplied\r
335 0xFF, 0xFF, 0xFF, 0xFF\r
336 }\r
337 })\r
338 Return (PLDP)\r
339 }\r
340 }\r
341\r
342 Device(HSC2) // USB2 HSIC 02\r
343 {\r
344 Name(_ADR, 0x06)\r
345\r
346 Method(_UPC,0,Serialized)\r
347 {\r
348 Name(UPCP, Package()\r
349 {\r
350 0xFF, //connectable\r
351 0xFF, //Proprietary connector (FPC connector)\r
352 0x00,\r
353 0x00\r
354 })\r
355\r
356 Return(UPCP)\r
357 }\r
358 Method(_PLD,0,Serialized)\r
359 {\r
360 Name(PLDP, Package()\r
361 {\r
362 Buffer(0x14)\r
363 {\r
364 //31:0 - Bit[6:0]=2 revision is 0x2, Bit[7]=1 Ignore Color Bit[31:8]=0 RGB color is ignored\r
365 0x82, 0x00, 0x00, 0x00,\r
366 //63:32 - Bit[47:32]=0 width: 0x0000 Bit[63:48]=0 Height:0x0000\r
367 0x00, 0x00, 0x00, 0x00,\r
368 //95:64 - bit[66:64]=b'000 not Visible/no docking/no lid bit[69:67]=6 (b'110) unknown(Vertical Position and Horizontal Position will be ignored)\r
369 // bit[71:70]=b'00 Vertical Position ignore bit[73:72]=b'00 Horizontal Position ignore\r
370 // bit[77:74]=2 Square bit[78]=0 bit[86:79]=0 bit[94:87]='0 no group info' bit[95]=0 not a bay\r
371 0x30, 0x08, 0x00, 0x00,\r
372 //127:96 -bit[96]=0 not Ejectable bit[97]=0 OSPM Ejection not required Bit[105:98]=0 no Cabinet Number\r
373 // bit[113:106]=0 no Card cage Number bit[114]=0 no reference shape Bit[118:115]=0 no rotation Bit[123:119]=0 no order\r
374 0x00, 0x00, 0x00, 0x00,\r
375 //159:128 Vert. and Horiz. Offsets not supplied\r
376 0xFF, 0xFF, 0xFF, 0xFF\r
377 }\r
378 })\r
379 Return (PLDP)\r
380 }\r
381 }\r
382 } //end of root hub\r
383\r
384} // end of XHC1\r
385\r
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