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1 | /* | |
2 | * gdb server stub | |
3 | * | |
4 | * Copyright (c) 2003-2005 Fabrice Bellard | |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | */ | |
20 | #include "config.h" | |
21 | #include "qemu-common.h" | |
22 | #ifdef CONFIG_USER_ONLY | |
23 | #include <stdlib.h> | |
24 | #include <stdio.h> | |
25 | #include <stdarg.h> | |
26 | #include <string.h> | |
27 | #include <errno.h> | |
28 | #include <unistd.h> | |
29 | #include <fcntl.h> | |
30 | ||
31 | #include "qemu.h" | |
32 | #else | |
33 | #include "qemu-char.h" | |
34 | #include "sysemu.h" | |
35 | #include "gdbstub.h" | |
36 | #endif | |
37 | ||
38 | #define MAX_PACKET_LENGTH 4096 | |
39 | ||
40 | #include "qemu_socket.h" | |
41 | #ifdef _WIN32 | |
42 | /* XXX: these constants may be independent of the host ones even for Unix */ | |
43 | #ifndef SIGTRAP | |
44 | #define SIGTRAP 5 | |
45 | #endif | |
46 | #ifndef SIGINT | |
47 | #define SIGINT 2 | |
48 | #endif | |
49 | #else | |
50 | #include <signal.h> | |
51 | #endif | |
52 | ||
53 | //#define DEBUG_GDB | |
54 | ||
55 | typedef struct GDBRegisterState { | |
56 | int base_reg; | |
57 | int num_regs; | |
58 | gdb_reg_cb get_reg; | |
59 | gdb_reg_cb set_reg; | |
60 | const char *xml; | |
61 | struct GDBRegisterState *next; | |
62 | } GDBRegisterState; | |
63 | ||
64 | enum RSState { | |
65 | RS_IDLE, | |
66 | RS_GETLINE, | |
67 | RS_CHKSUM1, | |
68 | RS_CHKSUM2, | |
69 | RS_SYSCALL, | |
70 | }; | |
71 | typedef struct GDBState { | |
72 | CPUState *env; /* current CPU */ | |
73 | enum RSState state; /* parsing state */ | |
74 | char line_buf[MAX_PACKET_LENGTH]; | |
75 | int line_buf_index; | |
76 | int line_csum; | |
77 | uint8_t last_packet[MAX_PACKET_LENGTH + 4]; | |
78 | int last_packet_len; | |
79 | int signal; | |
80 | #ifdef CONFIG_USER_ONLY | |
81 | int fd; | |
82 | int running_state; | |
83 | #else | |
84 | CharDriverState *chr; | |
85 | #endif | |
86 | } GDBState; | |
87 | ||
88 | /* By default use no IRQs and no timers while single stepping so as to | |
89 | * make single stepping like an ICE HW step. | |
90 | */ | |
91 | static int sstep_flags = SSTEP_ENABLE|SSTEP_NOIRQ|SSTEP_NOTIMER; | |
92 | ||
93 | /* This is an ugly hack to cope with both new and old gdb. | |
94 | If gdb sends qXfer:features:read then assume we're talking to a newish | |
95 | gdb that understands target descriptions. */ | |
96 | static int gdb_has_xml; | |
97 | ||
98 | #ifdef CONFIG_USER_ONLY | |
99 | /* XXX: This is not thread safe. Do we care? */ | |
100 | static int gdbserver_fd = -1; | |
101 | ||
102 | /* XXX: remove this hack. */ | |
103 | static GDBState gdbserver_state; | |
104 | ||
105 | static int get_char(GDBState *s) | |
106 | { | |
107 | uint8_t ch; | |
108 | int ret; | |
109 | ||
110 | for(;;) { | |
111 | ret = recv(s->fd, &ch, 1, 0); | |
112 | if (ret < 0) { | |
113 | if (errno == ECONNRESET) | |
114 | s->fd = -1; | |
115 | if (errno != EINTR && errno != EAGAIN) | |
116 | return -1; | |
117 | } else if (ret == 0) { | |
118 | close(s->fd); | |
119 | s->fd = -1; | |
120 | return -1; | |
121 | } else { | |
122 | break; | |
123 | } | |
124 | } | |
125 | return ch; | |
126 | } | |
127 | #endif | |
128 | ||
129 | /* GDB stub state for use by semihosting syscalls. */ | |
130 | static GDBState *gdb_syscall_state; | |
131 | static gdb_syscall_complete_cb gdb_current_syscall_cb; | |
132 | ||
133 | enum { | |
134 | GDB_SYS_UNKNOWN, | |
135 | GDB_SYS_ENABLED, | |
136 | GDB_SYS_DISABLED, | |
137 | } gdb_syscall_mode; | |
138 | ||
139 | /* If gdb is connected when the first semihosting syscall occurs then use | |
140 | remote gdb syscalls. Otherwise use native file IO. */ | |
141 | int use_gdb_syscalls(void) | |
142 | { | |
143 | if (gdb_syscall_mode == GDB_SYS_UNKNOWN) { | |
144 | gdb_syscall_mode = (gdb_syscall_state ? GDB_SYS_ENABLED | |
145 | : GDB_SYS_DISABLED); | |
146 | } | |
147 | return gdb_syscall_mode == GDB_SYS_ENABLED; | |
148 | } | |
149 | ||
150 | /* Resume execution. */ | |
151 | static inline void gdb_continue(GDBState *s) | |
152 | { | |
153 | #ifdef CONFIG_USER_ONLY | |
154 | s->running_state = 1; | |
155 | #else | |
156 | vm_start(); | |
157 | #endif | |
158 | } | |
159 | ||
160 | static void put_buffer(GDBState *s, const uint8_t *buf, int len) | |
161 | { | |
162 | #ifdef CONFIG_USER_ONLY | |
163 | int ret; | |
164 | ||
165 | while (len > 0) { | |
166 | ret = send(s->fd, buf, len, 0); | |
167 | if (ret < 0) { | |
168 | if (errno != EINTR && errno != EAGAIN) | |
169 | return; | |
170 | } else { | |
171 | buf += ret; | |
172 | len -= ret; | |
173 | } | |
174 | } | |
175 | #else | |
176 | qemu_chr_write(s->chr, buf, len); | |
177 | #endif | |
178 | } | |
179 | ||
180 | static inline int fromhex(int v) | |
181 | { | |
182 | if (v >= '0' && v <= '9') | |
183 | return v - '0'; | |
184 | else if (v >= 'A' && v <= 'F') | |
185 | return v - 'A' + 10; | |
186 | else if (v >= 'a' && v <= 'f') | |
187 | return v - 'a' + 10; | |
188 | else | |
189 | return 0; | |
190 | } | |
191 | ||
192 | static inline int tohex(int v) | |
193 | { | |
194 | if (v < 10) | |
195 | return v + '0'; | |
196 | else | |
197 | return v - 10 + 'a'; | |
198 | } | |
199 | ||
200 | static void memtohex(char *buf, const uint8_t *mem, int len) | |
201 | { | |
202 | int i, c; | |
203 | char *q; | |
204 | q = buf; | |
205 | for(i = 0; i < len; i++) { | |
206 | c = mem[i]; | |
207 | *q++ = tohex(c >> 4); | |
208 | *q++ = tohex(c & 0xf); | |
209 | } | |
210 | *q = '\0'; | |
211 | } | |
212 | ||
213 | static void hextomem(uint8_t *mem, const char *buf, int len) | |
214 | { | |
215 | int i; | |
216 | ||
217 | for(i = 0; i < len; i++) { | |
218 | mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]); | |
219 | buf += 2; | |
220 | } | |
221 | } | |
222 | ||
223 | /* return -1 if error, 0 if OK */ | |
224 | static int put_packet_binary(GDBState *s, const char *buf, int len) | |
225 | { | |
226 | int csum, i; | |
227 | uint8_t *p; | |
228 | ||
229 | for(;;) { | |
230 | p = s->last_packet; | |
231 | *(p++) = '$'; | |
232 | memcpy(p, buf, len); | |
233 | p += len; | |
234 | csum = 0; | |
235 | for(i = 0; i < len; i++) { | |
236 | csum += buf[i]; | |
237 | } | |
238 | *(p++) = '#'; | |
239 | *(p++) = tohex((csum >> 4) & 0xf); | |
240 | *(p++) = tohex((csum) & 0xf); | |
241 | ||
242 | s->last_packet_len = p - s->last_packet; | |
243 | put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len); | |
244 | ||
245 | #ifdef CONFIG_USER_ONLY | |
246 | i = get_char(s); | |
247 | if (i < 0) | |
248 | return -1; | |
249 | if (i == '+') | |
250 | break; | |
251 | #else | |
252 | break; | |
253 | #endif | |
254 | } | |
255 | return 0; | |
256 | } | |
257 | ||
258 | /* return -1 if error, 0 if OK */ | |
259 | static int put_packet(GDBState *s, const char *buf) | |
260 | { | |
261 | #ifdef DEBUG_GDB | |
262 | printf("reply='%s'\n", buf); | |
263 | #endif | |
264 | ||
265 | return put_packet_binary(s, buf, strlen(buf)); | |
266 | } | |
267 | ||
268 | /* The GDB remote protocol transfers values in target byte order. This means | |
269 | we can use the raw memory access routines to access the value buffer. | |
270 | Conveniently, these also handle the case where the buffer is mis-aligned. | |
271 | */ | |
272 | #define GET_REG8(val) do { \ | |
273 | stb_p(mem_buf, val); \ | |
274 | return 1; \ | |
275 | } while(0) | |
276 | #define GET_REG16(val) do { \ | |
277 | stw_p(mem_buf, val); \ | |
278 | return 2; \ | |
279 | } while(0) | |
280 | #define GET_REG32(val) do { \ | |
281 | stl_p(mem_buf, val); \ | |
282 | return 4; \ | |
283 | } while(0) | |
284 | #define GET_REG64(val) do { \ | |
285 | stq_p(mem_buf, val); \ | |
286 | return 8; \ | |
287 | } while(0) | |
288 | ||
289 | #if TARGET_LONG_BITS == 64 | |
290 | #define GET_REGL(val) GET_REG64(val) | |
291 | #define ldtul_p(addr) ldq_p(addr) | |
292 | #else | |
293 | #define GET_REGL(val) GET_REG32(val) | |
294 | #define ldtul_p(addr) ldl_p(addr) | |
295 | #endif | |
296 | ||
297 | #if defined(TARGET_I386) | |
298 | ||
299 | #ifdef TARGET_X86_64 | |
300 | static const int gpr_map[16] = { | |
301 | R_EAX, R_EBX, R_ECX, R_EDX, R_ESI, R_EDI, R_EBP, R_ESP, | |
302 | 8, 9, 10, 11, 12, 13, 14, 15 | |
303 | }; | |
304 | #else | |
305 | static const int gpr_map[8] = {0, 1, 2, 3, 4, 5, 6, 7}; | |
306 | #endif | |
307 | ||
308 | #define NUM_CORE_REGS (CPU_NB_REGS * 2 + 25) | |
309 | ||
310 | static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n) | |
311 | { | |
312 | if (n < CPU_NB_REGS) { | |
313 | GET_REGL(env->regs[gpr_map[n]]); | |
314 | } else if (n >= CPU_NB_REGS + 8 && n < CPU_NB_REGS + 16) { | |
315 | /* FIXME: byteswap float values. */ | |
316 | #ifdef USE_X86LDOUBLE | |
317 | memcpy(mem_buf, &env->fpregs[n - (CPU_NB_REGS + 8)], 10); | |
318 | #else | |
319 | memset(mem_buf, 0, 10); | |
320 | #endif | |
321 | return 10; | |
322 | } else if (n >= CPU_NB_REGS + 24) { | |
323 | n -= CPU_NB_REGS + 24; | |
324 | if (n < CPU_NB_REGS) { | |
325 | stq_p(mem_buf, env->xmm_regs[n].XMM_Q(0)); | |
326 | stq_p(mem_buf + 8, env->xmm_regs[n].XMM_Q(1)); | |
327 | return 16; | |
328 | } else if (n == CPU_NB_REGS) { | |
329 | GET_REG32(env->mxcsr); | |
330 | } | |
331 | } else { | |
332 | n -= CPU_NB_REGS; | |
333 | switch (n) { | |
334 | case 0: GET_REGL(env->eip); | |
335 | case 1: GET_REG32(env->eflags); | |
336 | case 2: GET_REG32(env->segs[R_CS].selector); | |
337 | case 3: GET_REG32(env->segs[R_SS].selector); | |
338 | case 4: GET_REG32(env->segs[R_DS].selector); | |
339 | case 5: GET_REG32(env->segs[R_ES].selector); | |
340 | case 6: GET_REG32(env->segs[R_FS].selector); | |
341 | case 7: GET_REG32(env->segs[R_GS].selector); | |
342 | /* 8...15 x87 regs. */ | |
343 | case 16: GET_REG32(env->fpuc); | |
344 | case 17: GET_REG32((env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11); | |
345 | case 18: GET_REG32(0); /* ftag */ | |
346 | case 19: GET_REG32(0); /* fiseg */ | |
347 | case 20: GET_REG32(0); /* fioff */ | |
348 | case 21: GET_REG32(0); /* foseg */ | |
349 | case 22: GET_REG32(0); /* fooff */ | |
350 | case 23: GET_REG32(0); /* fop */ | |
351 | /* 24+ xmm regs. */ | |
352 | } | |
353 | } | |
354 | return 0; | |
355 | } | |
356 | ||
357 | static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int i) | |
358 | { | |
359 | uint32_t tmp; | |
360 | ||
361 | if (i < CPU_NB_REGS) { | |
362 | env->regs[gpr_map[i]] = ldtul_p(mem_buf); | |
363 | return sizeof(target_ulong); | |
364 | } else if (i >= CPU_NB_REGS + 8 && i < CPU_NB_REGS + 16) { | |
365 | i -= CPU_NB_REGS + 8; | |
366 | #ifdef USE_X86LDOUBLE | |
367 | memcpy(&env->fpregs[i], mem_buf, 10); | |
368 | #endif | |
369 | return 10; | |
370 | } else if (i >= CPU_NB_REGS + 24) { | |
371 | i -= CPU_NB_REGS + 24; | |
372 | if (i < CPU_NB_REGS) { | |
373 | env->xmm_regs[i].XMM_Q(0) = ldq_p(mem_buf); | |
374 | env->xmm_regs[i].XMM_Q(1) = ldq_p(mem_buf + 8); | |
375 | return 16; | |
376 | } else if (i == CPU_NB_REGS) { | |
377 | env->mxcsr = ldl_p(mem_buf); | |
378 | return 4; | |
379 | } | |
380 | } else { | |
381 | i -= CPU_NB_REGS; | |
382 | switch (i) { | |
383 | case 0: env->eip = ldtul_p(mem_buf); return sizeof(target_ulong); | |
384 | case 1: env->eflags = ldl_p(mem_buf); return 4; | |
385 | #if defined(CONFIG_USER_ONLY) | |
386 | #define LOAD_SEG(index, sreg)\ | |
387 | tmp = ldl_p(mem_buf);\ | |
388 | if (tmp != env->segs[sreg].selector)\ | |
389 | cpu_x86_load_seg(env, sreg, tmp); | |
390 | #else | |
391 | /* FIXME: Honor segment registers. Needs to avoid raising an exception | |
392 | when the selector is invalid. */ | |
393 | #define LOAD_SEG(index, sreg) do {} while(0) | |
394 | #endif | |
395 | case 2: LOAD_SEG(10, R_CS); return 4; | |
396 | case 3: LOAD_SEG(11, R_SS); return 4; | |
397 | case 4: LOAD_SEG(12, R_DS); return 4; | |
398 | case 5: LOAD_SEG(13, R_ES); return 4; | |
399 | case 6: LOAD_SEG(14, R_FS); return 4; | |
400 | case 7: LOAD_SEG(15, R_GS); return 4; | |
401 | /* 8...15 x87 regs. */ | |
402 | case 16: env->fpuc = ldl_p(mem_buf); return 4; | |
403 | case 17: | |
404 | tmp = ldl_p(mem_buf); | |
405 | env->fpstt = (tmp >> 11) & 7; | |
406 | env->fpus = tmp & ~0x3800; | |
407 | return 4; | |
408 | case 18: /* ftag */ return 4; | |
409 | case 19: /* fiseg */ return 4; | |
410 | case 20: /* fioff */ return 4; | |
411 | case 21: /* foseg */ return 4; | |
412 | case 22: /* fooff */ return 4; | |
413 | case 23: /* fop */ return 4; | |
414 | /* 24+ xmm regs. */ | |
415 | } | |
416 | } | |
417 | /* Unrecognised register. */ | |
418 | return 0; | |
419 | } | |
420 | ||
421 | #elif defined (TARGET_PPC) | |
422 | ||
423 | #define NUM_CORE_REGS 71 | |
424 | ||
425 | static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n) | |
426 | { | |
427 | if (n < 32) { | |
428 | /* gprs */ | |
429 | GET_REGL(env->gpr[n]); | |
430 | } else if (n < 64) { | |
431 | /* fprs */ | |
432 | stfq_p(mem_buf, env->fpr[n]); | |
433 | return 8; | |
434 | } else { | |
435 | switch (n) { | |
436 | case 64: GET_REGL(env->nip); | |
437 | case 65: GET_REGL(env->msr); | |
438 | case 66: | |
439 | { | |
440 | uint32_t cr = 0; | |
441 | int i; | |
442 | for (i = 0; i < 8; i++) | |
443 | cr |= env->crf[i] << (32 - ((i + 1) * 4)); | |
444 | GET_REG32(cr); | |
445 | } | |
446 | case 67: GET_REGL(env->lr); | |
447 | case 68: GET_REGL(env->ctr); | |
448 | case 69: GET_REG32(ppc_load_xer(env)); | |
449 | case 70: GET_REG32(0); /* fpscr */ | |
450 | } | |
451 | } | |
452 | return 0; | |
453 | } | |
454 | ||
455 | static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n) | |
456 | { | |
457 | if (n < 32) { | |
458 | /* gprs */ | |
459 | env->gpr[n] = ldtul_p(mem_buf); | |
460 | return sizeof(target_ulong); | |
461 | } else if (n < 64) { | |
462 | /* fprs */ | |
463 | env->fpr[n] = ldfq_p(mem_buf); | |
464 | return 8; | |
465 | } else { | |
466 | switch (n) { | |
467 | case 64: | |
468 | env->nip = ldtul_p(mem_buf); | |
469 | return sizeof(target_ulong); | |
470 | case 65: | |
471 | ppc_store_msr(env, ldtul_p(mem_buf)); | |
472 | return sizeof(target_ulong); | |
473 | case 66: | |
474 | { | |
475 | uint32_t cr = ldl_p(mem_buf); | |
476 | int i; | |
477 | for (i = 0; i < 8; i++) | |
478 | env->crf[i] = (cr >> (32 - ((i + 1) * 4))) & 0xF; | |
479 | return 4; | |
480 | } | |
481 | case 67: | |
482 | env->lr = ldtul_p(mem_buf); | |
483 | return sizeof(target_ulong); | |
484 | case 68: | |
485 | env->ctr = ldtul_p(mem_buf); | |
486 | return sizeof(target_ulong); | |
487 | case 69: | |
488 | ppc_store_xer(env, ldl_p(mem_buf)); | |
489 | return 4; | |
490 | case 70: | |
491 | /* fpscr */ | |
492 | return 4; | |
493 | } | |
494 | } | |
495 | return 0; | |
496 | } | |
497 | ||
498 | #elif defined (TARGET_SPARC) | |
499 | ||
500 | #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32) | |
501 | #define NUM_CORE_REGS 86 | |
502 | #else | |
503 | #define NUM_CORE_REGS 73 | |
504 | #endif | |
505 | ||
506 | #ifdef TARGET_ABI32 | |
507 | #define GET_REGA(val) GET_REG32(val) | |
508 | #else | |
509 | #define GET_REGA(val) GET_REGL(val) | |
510 | #endif | |
511 | ||
512 | static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n) | |
513 | { | |
514 | if (n < 8) { | |
515 | /* g0..g7 */ | |
516 | GET_REGA(env->gregs[n]); | |
517 | } | |
518 | if (n < 32) { | |
519 | /* register window */ | |
520 | GET_REGA(env->regwptr[n - 8]); | |
521 | } | |
522 | #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64) | |
523 | if (n < 64) { | |
524 | /* fprs */ | |
525 | GET_REG32(*((uint32_t *)&env->fpr[n - 32])); | |
526 | } | |
527 | /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */ | |
528 | switch (n) { | |
529 | case 64: GET_REGA(env->y); | |
530 | case 65: GET_REGA(GET_PSR(env)); | |
531 | case 66: GET_REGA(env->wim); | |
532 | case 67: GET_REGA(env->tbr); | |
533 | case 68: GET_REGA(env->pc); | |
534 | case 69: GET_REGA(env->npc); | |
535 | case 70: GET_REGA(env->fsr); | |
536 | case 71: GET_REGA(0); /* csr */ | |
537 | case 72: GET_REGA(0); | |
538 | } | |
539 | #else | |
540 | if (n < 64) { | |
541 | /* f0-f31 */ | |
542 | GET_REG32(*((uint32_t *)&env->fpr[n - 32])); | |
543 | } | |
544 | if (n < 80) { | |
545 | /* f32-f62 (double width, even numbers only) */ | |
546 | uint64_t val; | |
547 | ||
548 | val = (uint64_t)*((uint32_t *)&env->fpr[(n - 64) * 2 + 32]) << 32; | |
549 | val |= *((uint32_t *)&env->fpr[(n - 64) * 2 + 33]); | |
550 | GET_REG64(val); | |
551 | } | |
552 | switch (n) { | |
553 | case 80: GET_REGL(env->pc); | |
554 | case 81: GET_REGL(env->npc); | |
555 | case 82: GET_REGL(((uint64_t)GET_CCR(env) << 32) | | |
556 | ((env->asi & 0xff) << 24) | | |
557 | ((env->pstate & 0xfff) << 8) | | |
558 | GET_CWP64(env)); | |
559 | case 83: GET_REGL(env->fsr); | |
560 | case 84: GET_REGL(env->fprs); | |
561 | case 85: GET_REGL(env->y); | |
562 | } | |
563 | #endif | |
564 | return 0; | |
565 | } | |
566 | ||
567 | static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n) | |
568 | { | |
569 | #if defined(TARGET_ABI32) | |
570 | abi_ulong tmp; | |
571 | ||
572 | tmp = ldl_p(mem_buf); | |
573 | #else | |
574 | target_ulong tmp; | |
575 | ||
576 | tmp = ldtul_p(mem_buf); | |
577 | #endif | |
578 | ||
579 | if (n < 8) { | |
580 | /* g0..g7 */ | |
581 | env->gregs[n] = tmp; | |
582 | } else if (n < 32) { | |
583 | /* register window */ | |
584 | env->regwptr[n - 8] = tmp; | |
585 | } | |
586 | #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64) | |
587 | else if (n < 64) { | |
588 | /* fprs */ | |
589 | *((uint32_t *)&env->fpr[n - 32]) = tmp; | |
590 | } else { | |
591 | /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */ | |
592 | switch (n) { | |
593 | case 64: env->y = tmp; break; | |
594 | case 65: PUT_PSR(env, tmp); break; | |
595 | case 66: env->wim = tmp; break; | |
596 | case 67: env->tbr = tmp; break; | |
597 | case 68: env->pc = tmp; break; | |
598 | case 69: env->npc = tmp; break; | |
599 | case 70: env->fsr = tmp; break; | |
600 | default: return 0; | |
601 | } | |
602 | } | |
603 | return 4; | |
604 | #else | |
605 | else if (n < 64) { | |
606 | /* f0-f31 */ | |
607 | uint32_t fpr; | |
608 | ||
609 | env->fpr[n] = ldfl_p(mem_buf); | |
610 | return 4; | |
611 | } else if (n < 80) { | |
612 | /* f32-f62 (double width, even numbers only) */ | |
613 | *((uint32_t *)&env->fpr[(n - 64) * 2 + 32]) = tmp >> 32; | |
614 | *((uint32_t *)&env->fpr[(n - 64) * 2 + 33]) = tmp; | |
615 | } else { | |
616 | switch (n) { | |
617 | case 80: env->pc = tmp; break; | |
618 | case 81: env->npc = tmp; break; | |
619 | case 82: | |
620 | PUT_CCR(env, tmp >> 32); | |
621 | env->asi = (tmp >> 24) & 0xff; | |
622 | env->pstate = (tmp >> 8) & 0xfff; | |
623 | PUT_CWP64(env, tmp & 0xff); | |
624 | break; | |
625 | case 83: env->fsr = tmp; break; | |
626 | case 84: env->fprs = tmp; break; | |
627 | case 85: env->y = tmp; break; | |
628 | default: return 0; | |
629 | } | |
630 | } | |
631 | return 8; | |
632 | #endif | |
633 | } | |
634 | #elif defined (TARGET_ARM) | |
635 | ||
636 | /* Old gdb always expect FPA registers. Newer (xml-aware) gdb only expect | |
637 | whatever the target description contains. Due to a historical mishap | |
638 | the FPA registers appear in between core integer regs and the CPSR. | |
639 | We hack round this by giving the FPA regs zero size when talking to a | |
640 | newer gdb. */ | |
641 | #define NUM_CORE_REGS 26 | |
642 | #define GDB_CORE_XML "arm-core.xml" | |
643 | ||
644 | static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n) | |
645 | { | |
646 | if (n < 16) { | |
647 | /* Core integer register. */ | |
648 | GET_REG32(env->regs[n]); | |
649 | } | |
650 | if (n < 24) { | |
651 | /* FPA registers. */ | |
652 | if (gdb_has_xml) | |
653 | return 0; | |
654 | memset(mem_buf, 0, 12); | |
655 | return 12; | |
656 | } | |
657 | switch (n) { | |
658 | case 24: | |
659 | /* FPA status register. */ | |
660 | if (gdb_has_xml) | |
661 | return 0; | |
662 | GET_REG32(0); | |
663 | case 25: | |
664 | /* CPSR */ | |
665 | GET_REG32(cpsr_read(env)); | |
666 | } | |
667 | /* Unknown register. */ | |
668 | return 0; | |
669 | } | |
670 | ||
671 | static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n) | |
672 | { | |
673 | uint32_t tmp; | |
674 | ||
675 | tmp = ldl_p(mem_buf); | |
676 | ||
677 | /* Mask out low bit of PC to workaround gdb bugs. This will probably | |
678 | cause problems if we ever implement the Jazelle DBX extensions. */ | |
679 | if (n == 15) | |
680 | tmp &= ~1; | |
681 | ||
682 | if (n < 16) { | |
683 | /* Core integer register. */ | |
684 | env->regs[n] = tmp; | |
685 | return 4; | |
686 | } | |
687 | if (n < 24) { /* 16-23 */ | |
688 | /* FPA registers (ignored). */ | |
689 | if (gdb_has_xml) | |
690 | return 0; | |
691 | return 12; | |
692 | } | |
693 | switch (n) { | |
694 | case 24: | |
695 | /* FPA status register (ignored). */ | |
696 | if (gdb_has_xml) | |
697 | return 0; | |
698 | return 4; | |
699 | case 25: | |
700 | /* CPSR */ | |
701 | cpsr_write (env, tmp, 0xffffffff); | |
702 | return 4; | |
703 | } | |
704 | /* Unknown register. */ | |
705 | return 0; | |
706 | } | |
707 | ||
708 | #elif defined (TARGET_M68K) | |
709 | ||
710 | #define NUM_CORE_REGS 18 | |
711 | ||
712 | #define GDB_CORE_XML "cf-core.xml" | |
713 | ||
714 | static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n) | |
715 | { | |
716 | if (n < 8) { | |
717 | /* D0-D7 */ | |
718 | GET_REG32(env->dregs[n]); | |
719 | } else if (n < 16) { | |
720 | /* A0-A7 */ | |
721 | GET_REG32(env->aregs[n - 8]); | |
722 | } else { | |
723 | switch (n) { | |
724 | case 16: GET_REG32(env->sr); | |
725 | case 17: GET_REG32(env->pc); | |
726 | } | |
727 | } | |
728 | /* FP registers not included here because they vary between | |
729 | ColdFire and m68k. Use XML bits for these. */ | |
730 | return 0; | |
731 | } | |
732 | ||
733 | static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n) | |
734 | { | |
735 | uint32_t tmp; | |
736 | ||
737 | tmp = ldl_p(mem_buf); | |
738 | ||
739 | if (n < 8) { | |
740 | /* D0-D7 */ | |
741 | env->dregs[n] = tmp; | |
742 | } else if (n < 8) { | |
743 | /* A0-A7 */ | |
744 | env->aregs[n - 8] = tmp; | |
745 | } else { | |
746 | switch (n) { | |
747 | case 16: env->sr = tmp; break; | |
748 | case 17: env->pc = tmp; break; | |
749 | default: return 0; | |
750 | } | |
751 | } | |
752 | return 4; | |
753 | } | |
754 | #elif defined (TARGET_MIPS) | |
755 | ||
756 | #define NUM_CORE_REGS 73 | |
757 | ||
758 | static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n) | |
759 | { | |
760 | if (n < 32) { | |
761 | GET_REGL(env->active_tc.gpr[n]); | |
762 | } | |
763 | if (env->CP0_Config1 & (1 << CP0C1_FP)) { | |
764 | if (n >= 38 && n < 70) { | |
765 | if (env->CP0_Status & (1 << CP0St_FR)) | |
766 | GET_REGL(env->active_fpu.fpr[n - 38].d); | |
767 | else | |
768 | GET_REGL(env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX]); | |
769 | } | |
770 | switch (n) { | |
771 | case 70: GET_REGL((int32_t)env->active_fpu.fcr31); | |
772 | case 71: GET_REGL((int32_t)env->active_fpu.fcr0); | |
773 | } | |
774 | } | |
775 | switch (n) { | |
776 | case 32: GET_REGL((int32_t)env->CP0_Status); | |
777 | case 33: GET_REGL(env->active_tc.LO[0]); | |
778 | case 34: GET_REGL(env->active_tc.HI[0]); | |
779 | case 35: GET_REGL(env->CP0_BadVAddr); | |
780 | case 36: GET_REGL((int32_t)env->CP0_Cause); | |
781 | case 37: GET_REGL(env->active_tc.PC); | |
782 | case 72: GET_REGL(0); /* fp */ | |
783 | case 89: GET_REGL((int32_t)env->CP0_PRid); | |
784 | } | |
785 | if (n >= 73 && n <= 88) { | |
786 | /* 16 embedded regs. */ | |
787 | GET_REGL(0); | |
788 | } | |
789 | ||
790 | return 0; | |
791 | } | |
792 | ||
793 | /* convert MIPS rounding mode in FCR31 to IEEE library */ | |
794 | static unsigned int ieee_rm[] = | |
795 | { | |
796 | float_round_nearest_even, | |
797 | float_round_to_zero, | |
798 | float_round_up, | |
799 | float_round_down | |
800 | }; | |
801 | #define RESTORE_ROUNDING_MODE \ | |
802 | set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], &env->active_fpu.fp_status) | |
803 | ||
804 | static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n) | |
805 | { | |
806 | target_ulong tmp; | |
807 | ||
808 | tmp = ldtul_p(mem_buf); | |
809 | ||
810 | if (n < 32) { | |
811 | env->active_tc.gpr[n] = tmp; | |
812 | return sizeof(target_ulong); | |
813 | } | |
814 | if (env->CP0_Config1 & (1 << CP0C1_FP) | |
815 | && n >= 38 && n < 73) { | |
816 | if (n < 70) { | |
817 | if (env->CP0_Status & (1 << CP0St_FR)) | |
818 | env->active_fpu.fpr[n - 38].d = tmp; | |
819 | else | |
820 | env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX] = tmp; | |
821 | } | |
822 | switch (n) { | |
823 | case 70: | |
824 | env->active_fpu.fcr31 = tmp & 0xFF83FFFF; | |
825 | /* set rounding mode */ | |
826 | RESTORE_ROUNDING_MODE; | |
827 | #ifndef CONFIG_SOFTFLOAT | |
828 | /* no floating point exception for native float */ | |
829 | SET_FP_ENABLE(env->active_fpu.fcr31, 0); | |
830 | #endif | |
831 | break; | |
832 | case 71: env->active_fpu.fcr0 = tmp; break; | |
833 | } | |
834 | return sizeof(target_ulong); | |
835 | } | |
836 | switch (n) { | |
837 | case 32: env->CP0_Status = tmp; break; | |
838 | case 33: env->active_tc.LO[0] = tmp; break; | |
839 | case 34: env->active_tc.HI[0] = tmp; break; | |
840 | case 35: env->CP0_BadVAddr = tmp; break; | |
841 | case 36: env->CP0_Cause = tmp; break; | |
842 | case 37: env->active_tc.PC = tmp; break; | |
843 | case 72: /* fp, ignored */ break; | |
844 | default: | |
845 | if (n > 89) | |
846 | return 0; | |
847 | /* Other registers are readonly. Ignore writes. */ | |
848 | break; | |
849 | } | |
850 | ||
851 | return sizeof(target_ulong); | |
852 | } | |
853 | #elif defined (TARGET_SH4) | |
854 | ||
855 | /* Hint: Use "set architecture sh4" in GDB to see fpu registers */ | |
856 | /* FIXME: We should use XML for this. */ | |
857 | ||
858 | #define NUM_CORE_REGS 59 | |
859 | ||
860 | static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n) | |
861 | { | |
862 | if (n < 8) { | |
863 | if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) { | |
864 | GET_REGL(env->gregs[n + 16]); | |
865 | } else { | |
866 | GET_REGL(env->gregs[n]); | |
867 | } | |
868 | } else if (n < 16) { | |
869 | GET_REGL(env->gregs[n - 8]); | |
870 | } else if (n >= 25 && n < 41) { | |
871 | GET_REGL(env->fregs[(n - 25) + ((env->fpscr & FPSCR_FR) ? 16 : 0)]); | |
872 | } else if (n >= 43 && n < 51) { | |
873 | GET_REGL(env->gregs[n - 43]); | |
874 | } else if (n >= 51 && n < 59) { | |
875 | GET_REGL(env->gregs[n - (51 - 16)]); | |
876 | } | |
877 | switch (n) { | |
878 | case 16: GET_REGL(env->pc); | |
879 | case 17: GET_REGL(env->pr); | |
880 | case 18: GET_REGL(env->gbr); | |
881 | case 19: GET_REGL(env->vbr); | |
882 | case 20: GET_REGL(env->mach); | |
883 | case 21: GET_REGL(env->macl); | |
884 | case 22: GET_REGL(env->sr); | |
885 | case 23: GET_REGL(env->fpul); | |
886 | case 24: GET_REGL(env->fpscr); | |
887 | case 41: GET_REGL(env->ssr); | |
888 | case 42: GET_REGL(env->spc); | |
889 | } | |
890 | ||
891 | return 0; | |
892 | } | |
893 | ||
894 | static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n) | |
895 | { | |
896 | uint32_t tmp; | |
897 | ||
898 | tmp = ldl_p(mem_buf); | |
899 | ||
900 | if (n < 8) { | |
901 | if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) { | |
902 | env->gregs[n + 16] = tmp; | |
903 | } else { | |
904 | env->gregs[n] = tmp; | |
905 | } | |
906 | return 4; | |
907 | } else if (n < 16) { | |
908 | env->gregs[n - 8] = tmp; | |
909 | return 4; | |
910 | } else if (n >= 25 && n < 41) { | |
911 | env->fregs[(n - 25) + ((env->fpscr & FPSCR_FR) ? 16 : 0)] = tmp; | |
912 | } else if (n >= 43 && n < 51) { | |
913 | env->gregs[n - 43] = tmp; | |
914 | return 4; | |
915 | } else if (n >= 51 && n < 59) { | |
916 | env->gregs[n - (51 - 16)] = tmp; | |
917 | return 4; | |
918 | } | |
919 | switch (n) { | |
920 | case 16: env->pc = tmp; | |
921 | case 17: env->pr = tmp; | |
922 | case 18: env->gbr = tmp; | |
923 | case 19: env->vbr = tmp; | |
924 | case 20: env->mach = tmp; | |
925 | case 21: env->macl = tmp; | |
926 | case 22: env->sr = tmp; | |
927 | case 23: env->fpul = tmp; | |
928 | case 24: env->fpscr = tmp; | |
929 | case 41: env->ssr = tmp; | |
930 | case 42: env->spc = tmp; | |
931 | default: return 0; | |
932 | } | |
933 | ||
934 | return 4; | |
935 | } | |
936 | #elif defined (TARGET_CRIS) | |
937 | ||
938 | #define NUM_CORE_REGS 49 | |
939 | ||
940 | static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n) | |
941 | { | |
942 | uint8_t srs; | |
943 | ||
944 | srs = env->pregs[PR_SRS]; | |
945 | if (n < 16) { | |
946 | GET_REG32(env->regs[n]); | |
947 | } | |
948 | ||
949 | if (n >= 21 && n < 32) { | |
950 | GET_REG32(env->pregs[n - 16]); | |
951 | } | |
952 | if (n >= 33 && n < 49) { | |
953 | GET_REG32(env->sregs[srs][n - 33]); | |
954 | } | |
955 | switch (n) { | |
956 | case 16: GET_REG8(env->pregs[0]); | |
957 | case 17: GET_REG8(env->pregs[1]); | |
958 | case 18: GET_REG32(env->pregs[2]); | |
959 | case 19: GET_REG8(srs); | |
960 | case 20: GET_REG16(env->pregs[4]); | |
961 | case 32: GET_REG32(env->pc); | |
962 | } | |
963 | ||
964 | return 0; | |
965 | } | |
966 | ||
967 | static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n) | |
968 | { | |
969 | uint32_t tmp; | |
970 | ||
971 | if (n > 49) | |
972 | return 0; | |
973 | ||
974 | tmp = ldl_p(mem_buf); | |
975 | ||
976 | if (n < 16) { | |
977 | env->regs[n] = tmp; | |
978 | } | |
979 | ||
980 | /* FIXME: Should other regs be writable? */ | |
981 | switch (n) { | |
982 | case 16: return 1; | |
983 | case 17: return 1; | |
984 | case 18: return 4; | |
985 | case 19: return 1; | |
986 | case 20: return 2; | |
987 | case 32: env->pc = tmp; break; | |
988 | } | |
989 | ||
990 | return 4; | |
991 | } | |
992 | #else | |
993 | ||
994 | #define NUM_CORE_REGS 0 | |
995 | ||
996 | static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n) | |
997 | { | |
998 | return 0; | |
999 | } | |
1000 | ||
1001 | static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n) | |
1002 | { | |
1003 | return 0; | |
1004 | } | |
1005 | ||
1006 | #endif | |
1007 | ||
1008 | static int num_g_regs = NUM_CORE_REGS; | |
1009 | ||
1010 | #ifdef GDB_CORE_XML | |
1011 | /* Encode data using the encoding for 'x' packets. */ | |
1012 | static int memtox(char *buf, const char *mem, int len) | |
1013 | { | |
1014 | char *p = buf; | |
1015 | char c; | |
1016 | ||
1017 | while (len--) { | |
1018 | c = *(mem++); | |
1019 | switch (c) { | |
1020 | case '#': case '$': case '*': case '}': | |
1021 | *(p++) = '}'; | |
1022 | *(p++) = c ^ 0x20; | |
1023 | break; | |
1024 | default: | |
1025 | *(p++) = c; | |
1026 | break; | |
1027 | } | |
1028 | } | |
1029 | return p - buf; | |
1030 | } | |
1031 | ||
1032 | const char *get_feature_xml(CPUState *env, const char *p, const char **newp) | |
1033 | { | |
1034 | extern const char *const xml_builtin[][2]; | |
1035 | size_t len; | |
1036 | int i; | |
1037 | const char *name; | |
1038 | static char target_xml[1024]; | |
1039 | ||
1040 | len = 0; | |
1041 | while (p[len] && p[len] != ':') | |
1042 | len++; | |
1043 | *newp = p + len; | |
1044 | ||
1045 | name = NULL; | |
1046 | if (strncmp(p, "target.xml", len) == 0) { | |
1047 | /* Generate the XML description for this CPU. */ | |
1048 | if (!target_xml[0]) { | |
1049 | GDBRegisterState *r; | |
1050 | ||
1051 | sprintf(target_xml, | |
1052 | "<?xml version=\"1.0\"?>" | |
1053 | "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">" | |
1054 | "<target>" | |
1055 | "<xi:include href=\"%s\"/>", | |
1056 | GDB_CORE_XML); | |
1057 | ||
1058 | for (r = env->gdb_regs; r; r = r->next) { | |
1059 | strcat(target_xml, "<xi:include href=\""); | |
1060 | strcat(target_xml, r->xml); | |
1061 | strcat(target_xml, "\"/>"); | |
1062 | } | |
1063 | strcat(target_xml, "</target>"); | |
1064 | } | |
1065 | return target_xml; | |
1066 | } | |
1067 | for (i = 0; ; i++) { | |
1068 | name = xml_builtin[i][0]; | |
1069 | if (!name || (strncmp(name, p, len) == 0 && strlen(name) == len)) | |
1070 | break; | |
1071 | } | |
1072 | return name ? xml_builtin[i][1] : NULL; | |
1073 | } | |
1074 | #endif | |
1075 | ||
1076 | static int gdb_read_register(CPUState *env, uint8_t *mem_buf, int reg) | |
1077 | { | |
1078 | GDBRegisterState *r; | |
1079 | ||
1080 | if (reg < NUM_CORE_REGS) | |
1081 | return cpu_gdb_read_register(env, mem_buf, reg); | |
1082 | ||
1083 | for (r = env->gdb_regs; r; r = r->next) { | |
1084 | if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) { | |
1085 | return r->get_reg(env, mem_buf, reg - r->base_reg); | |
1086 | } | |
1087 | } | |
1088 | return 0; | |
1089 | } | |
1090 | ||
1091 | static int gdb_write_register(CPUState *env, uint8_t *mem_buf, int reg) | |
1092 | { | |
1093 | GDBRegisterState *r; | |
1094 | ||
1095 | if (reg < NUM_CORE_REGS) | |
1096 | return cpu_gdb_write_register(env, mem_buf, reg); | |
1097 | ||
1098 | for (r = env->gdb_regs; r; r = r->next) { | |
1099 | if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) { | |
1100 | return r->set_reg(env, mem_buf, reg - r->base_reg); | |
1101 | } | |
1102 | } | |
1103 | return 0; | |
1104 | } | |
1105 | ||
1106 | /* Register a supplemental set of CPU registers. If g_pos is nonzero it | |
1107 | specifies the first register number and these registers are included in | |
1108 | a standard "g" packet. Direction is relative to gdb, i.e. get_reg is | |
1109 | gdb reading a CPU register, and set_reg is gdb modifying a CPU register. | |
1110 | */ | |
1111 | ||
1112 | void gdb_register_coprocessor(CPUState * env, | |
1113 | gdb_reg_cb get_reg, gdb_reg_cb set_reg, | |
1114 | int num_regs, const char *xml, int g_pos) | |
1115 | { | |
1116 | GDBRegisterState *s; | |
1117 | GDBRegisterState **p; | |
1118 | static int last_reg = NUM_CORE_REGS; | |
1119 | ||
1120 | s = (GDBRegisterState *)qemu_mallocz(sizeof(GDBRegisterState)); | |
1121 | s->base_reg = last_reg; | |
1122 | s->num_regs = num_regs; | |
1123 | s->get_reg = get_reg; | |
1124 | s->set_reg = set_reg; | |
1125 | s->xml = xml; | |
1126 | p = &env->gdb_regs; | |
1127 | while (*p) { | |
1128 | /* Check for duplicates. */ | |
1129 | if (strcmp((*p)->xml, xml) == 0) | |
1130 | return; | |
1131 | p = &(*p)->next; | |
1132 | } | |
1133 | /* Add to end of list. */ | |
1134 | last_reg += num_regs; | |
1135 | *p = s; | |
1136 | if (g_pos) { | |
1137 | if (g_pos != s->base_reg) { | |
1138 | fprintf(stderr, "Error: Bad gdb register numbering for '%s'\n" | |
1139 | "Expected %d got %d\n", xml, g_pos, s->base_reg); | |
1140 | } else { | |
1141 | num_g_regs = last_reg; | |
1142 | } | |
1143 | } | |
1144 | } | |
1145 | ||
1146 | static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf) | |
1147 | { | |
1148 | const char *p; | |
1149 | int ch, reg_size, type; | |
1150 | char buf[MAX_PACKET_LENGTH]; | |
1151 | uint8_t mem_buf[MAX_PACKET_LENGTH]; | |
1152 | uint8_t *registers; | |
1153 | target_ulong addr, len; | |
1154 | ||
1155 | #ifdef DEBUG_GDB | |
1156 | printf("command='%s'\n", line_buf); | |
1157 | #endif | |
1158 | p = line_buf; | |
1159 | ch = *p++; | |
1160 | switch(ch) { | |
1161 | case '?': | |
1162 | /* TODO: Make this return the correct value for user-mode. */ | |
1163 | snprintf(buf, sizeof(buf), "S%02x", SIGTRAP); | |
1164 | put_packet(s, buf); | |
1165 | /* Remove all the breakpoints when this query is issued, | |
1166 | * because gdb is doing and initial connect and the state | |
1167 | * should be cleaned up. | |
1168 | */ | |
1169 | cpu_breakpoint_remove_all(env); | |
1170 | cpu_watchpoint_remove_all(env); | |
1171 | break; | |
1172 | case 'c': | |
1173 | if (*p != '\0') { | |
1174 | addr = strtoull(p, (char **)&p, 16); | |
1175 | #if defined(TARGET_I386) | |
1176 | env->eip = addr; | |
1177 | #elif defined (TARGET_PPC) | |
1178 | env->nip = addr; | |
1179 | #elif defined (TARGET_SPARC) | |
1180 | env->pc = addr; | |
1181 | env->npc = addr + 4; | |
1182 | #elif defined (TARGET_ARM) | |
1183 | env->regs[15] = addr; | |
1184 | #elif defined (TARGET_SH4) | |
1185 | env->pc = addr; | |
1186 | #elif defined (TARGET_MIPS) | |
1187 | env->active_tc.PC = addr; | |
1188 | #elif defined (TARGET_CRIS) | |
1189 | env->pc = addr; | |
1190 | #endif | |
1191 | } | |
1192 | gdb_continue(s); | |
1193 | return RS_IDLE; | |
1194 | case 'C': | |
1195 | s->signal = strtoul(p, (char **)&p, 16); | |
1196 | gdb_continue(s); | |
1197 | return RS_IDLE; | |
1198 | case 'k': | |
1199 | /* Kill the target */ | |
1200 | fprintf(stderr, "\nQEMU: Terminated via GDBstub\n"); | |
1201 | exit(0); | |
1202 | case 'D': | |
1203 | /* Detach packet */ | |
1204 | cpu_breakpoint_remove_all(env); | |
1205 | cpu_watchpoint_remove_all(env); | |
1206 | gdb_continue(s); | |
1207 | put_packet(s, "OK"); | |
1208 | break; | |
1209 | case 's': | |
1210 | if (*p != '\0') { | |
1211 | addr = strtoull(p, (char **)&p, 16); | |
1212 | #if defined(TARGET_I386) | |
1213 | env->eip = addr; | |
1214 | #elif defined (TARGET_PPC) | |
1215 | env->nip = addr; | |
1216 | #elif defined (TARGET_SPARC) | |
1217 | env->pc = addr; | |
1218 | env->npc = addr + 4; | |
1219 | #elif defined (TARGET_ARM) | |
1220 | env->regs[15] = addr; | |
1221 | #elif defined (TARGET_SH4) | |
1222 | env->pc = addr; | |
1223 | #elif defined (TARGET_MIPS) | |
1224 | env->active_tc.PC = addr; | |
1225 | #elif defined (TARGET_CRIS) | |
1226 | env->pc = addr; | |
1227 | #endif | |
1228 | } | |
1229 | cpu_single_step(env, sstep_flags); | |
1230 | gdb_continue(s); | |
1231 | return RS_IDLE; | |
1232 | case 'F': | |
1233 | { | |
1234 | target_ulong ret; | |
1235 | target_ulong err; | |
1236 | ||
1237 | ret = strtoull(p, (char **)&p, 16); | |
1238 | if (*p == ',') { | |
1239 | p++; | |
1240 | err = strtoull(p, (char **)&p, 16); | |
1241 | } else { | |
1242 | err = 0; | |
1243 | } | |
1244 | if (*p == ',') | |
1245 | p++; | |
1246 | type = *p; | |
1247 | if (gdb_current_syscall_cb) | |
1248 | gdb_current_syscall_cb(s->env, ret, err); | |
1249 | if (type == 'C') { | |
1250 | put_packet(s, "T02"); | |
1251 | } else { | |
1252 | gdb_continue(s); | |
1253 | } | |
1254 | } | |
1255 | break; | |
1256 | case 'g': | |
1257 | len = 0; | |
1258 | for (addr = 0; addr < num_g_regs; addr++) { | |
1259 | reg_size = gdb_read_register(env, mem_buf + len, addr); | |
1260 | len += reg_size; | |
1261 | } | |
1262 | memtohex(buf, mem_buf, len); | |
1263 | put_packet(s, buf); | |
1264 | break; | |
1265 | case 'G': | |
1266 | registers = mem_buf; | |
1267 | len = strlen(p) / 2; | |
1268 | hextomem((uint8_t *)registers, p, len); | |
1269 | for (addr = 0; addr < num_g_regs && len > 0; addr++) { | |
1270 | reg_size = gdb_write_register(env, registers, addr); | |
1271 | len -= reg_size; | |
1272 | registers += reg_size; | |
1273 | } | |
1274 | put_packet(s, "OK"); | |
1275 | break; | |
1276 | case 'm': | |
1277 | addr = strtoull(p, (char **)&p, 16); | |
1278 | if (*p == ',') | |
1279 | p++; | |
1280 | len = strtoull(p, NULL, 16); | |
1281 | if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) { | |
1282 | put_packet (s, "E14"); | |
1283 | } else { | |
1284 | memtohex(buf, mem_buf, len); | |
1285 | put_packet(s, buf); | |
1286 | } | |
1287 | break; | |
1288 | case 'M': | |
1289 | addr = strtoull(p, (char **)&p, 16); | |
1290 | if (*p == ',') | |
1291 | p++; | |
1292 | len = strtoull(p, (char **)&p, 16); | |
1293 | if (*p == ':') | |
1294 | p++; | |
1295 | hextomem(mem_buf, p, len); | |
1296 | if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0) | |
1297 | put_packet(s, "E14"); | |
1298 | else | |
1299 | put_packet(s, "OK"); | |
1300 | break; | |
1301 | case 'p': | |
1302 | /* Older gdb are really dumb, and don't use 'g' if 'p' is avaialable. | |
1303 | This works, but can be very slow. Anything new enough to | |
1304 | understand XML also knows how to use this properly. */ | |
1305 | if (!gdb_has_xml) | |
1306 | goto unknown_command; | |
1307 | addr = strtoull(p, (char **)&p, 16); | |
1308 | reg_size = gdb_read_register(env, mem_buf, addr); | |
1309 | if (reg_size) { | |
1310 | memtohex(buf, mem_buf, reg_size); | |
1311 | put_packet(s, buf); | |
1312 | } else { | |
1313 | put_packet(s, "E14"); | |
1314 | } | |
1315 | break; | |
1316 | case 'P': | |
1317 | if (!gdb_has_xml) | |
1318 | goto unknown_command; | |
1319 | addr = strtoull(p, (char **)&p, 16); | |
1320 | if (*p == '=') | |
1321 | p++; | |
1322 | reg_size = strlen(p) / 2; | |
1323 | hextomem(mem_buf, p, reg_size); | |
1324 | gdb_write_register(env, mem_buf, addr); | |
1325 | put_packet(s, "OK"); | |
1326 | break; | |
1327 | case 'Z': | |
1328 | type = strtoul(p, (char **)&p, 16); | |
1329 | if (*p == ',') | |
1330 | p++; | |
1331 | addr = strtoull(p, (char **)&p, 16); | |
1332 | if (*p == ',') | |
1333 | p++; | |
1334 | len = strtoull(p, (char **)&p, 16); | |
1335 | switch (type) { | |
1336 | case 0: | |
1337 | case 1: | |
1338 | if (cpu_breakpoint_insert(env, addr) < 0) | |
1339 | goto breakpoint_error; | |
1340 | put_packet(s, "OK"); | |
1341 | break; | |
1342 | #ifndef CONFIG_USER_ONLY | |
1343 | case 2: | |
1344 | type = PAGE_WRITE; | |
1345 | goto insert_watchpoint; | |
1346 | case 3: | |
1347 | type = PAGE_READ; | |
1348 | goto insert_watchpoint; | |
1349 | case 4: | |
1350 | type = PAGE_READ | PAGE_WRITE; | |
1351 | insert_watchpoint: | |
1352 | if (cpu_watchpoint_insert(env, addr, type) < 0) | |
1353 | goto breakpoint_error; | |
1354 | put_packet(s, "OK"); | |
1355 | break; | |
1356 | #endif | |
1357 | default: | |
1358 | put_packet(s, ""); | |
1359 | break; | |
1360 | } | |
1361 | break; | |
1362 | breakpoint_error: | |
1363 | put_packet(s, "E22"); | |
1364 | break; | |
1365 | ||
1366 | case 'z': | |
1367 | type = strtoul(p, (char **)&p, 16); | |
1368 | if (*p == ',') | |
1369 | p++; | |
1370 | addr = strtoull(p, (char **)&p, 16); | |
1371 | if (*p == ',') | |
1372 | p++; | |
1373 | len = strtoull(p, (char **)&p, 16); | |
1374 | if (type == 0 || type == 1) { | |
1375 | cpu_breakpoint_remove(env, addr); | |
1376 | put_packet(s, "OK"); | |
1377 | #ifndef CONFIG_USER_ONLY | |
1378 | } else if (type >= 2 || type <= 4) { | |
1379 | cpu_watchpoint_remove(env, addr); | |
1380 | put_packet(s, "OK"); | |
1381 | #endif | |
1382 | } else { | |
1383 | put_packet(s, ""); | |
1384 | } | |
1385 | break; | |
1386 | case 'q': | |
1387 | case 'Q': | |
1388 | /* parse any 'q' packets here */ | |
1389 | if (!strcmp(p,"qemu.sstepbits")) { | |
1390 | /* Query Breakpoint bit definitions */ | |
1391 | snprintf(buf, sizeof(buf), "ENABLE=%x,NOIRQ=%x,NOTIMER=%x", | |
1392 | SSTEP_ENABLE, | |
1393 | SSTEP_NOIRQ, | |
1394 | SSTEP_NOTIMER); | |
1395 | put_packet(s, buf); | |
1396 | break; | |
1397 | } else if (strncmp(p,"qemu.sstep",10) == 0) { | |
1398 | /* Display or change the sstep_flags */ | |
1399 | p += 10; | |
1400 | if (*p != '=') { | |
1401 | /* Display current setting */ | |
1402 | snprintf(buf, sizeof(buf), "0x%x", sstep_flags); | |
1403 | put_packet(s, buf); | |
1404 | break; | |
1405 | } | |
1406 | p++; | |
1407 | type = strtoul(p, (char **)&p, 16); | |
1408 | sstep_flags = type; | |
1409 | put_packet(s, "OK"); | |
1410 | break; | |
1411 | } | |
1412 | #ifdef CONFIG_LINUX_USER | |
1413 | else if (strncmp(p, "Offsets", 7) == 0) { | |
1414 | TaskState *ts = env->opaque; | |
1415 | ||
1416 | snprintf(buf, sizeof(buf), | |
1417 | "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx | |
1418 | ";Bss=" TARGET_ABI_FMT_lx, | |
1419 | ts->info->code_offset, | |
1420 | ts->info->data_offset, | |
1421 | ts->info->data_offset); | |
1422 | put_packet(s, buf); | |
1423 | break; | |
1424 | } | |
1425 | #endif | |
1426 | if (strncmp(p, "Supported", 9) == 0) { | |
1427 | sprintf(buf, "PacketSize=%x", MAX_PACKET_LENGTH); | |
1428 | #ifdef GDB_CORE_XML | |
1429 | strcat(buf, ";qXfer:features:read+"); | |
1430 | #endif | |
1431 | put_packet(s, buf); | |
1432 | break; | |
1433 | } | |
1434 | #ifdef GDB_CORE_XML | |
1435 | if (strncmp(p, "Xfer:features:read:", 19) == 0) { | |
1436 | const char *xml; | |
1437 | target_ulong total_len; | |
1438 | ||
1439 | gdb_has_xml = 1; | |
1440 | p += 19; | |
1441 | xml = get_feature_xml(env, p, &p); | |
1442 | if (!xml) { | |
1443 | sprintf(buf, "E00"); | |
1444 | put_packet(s, buf); | |
1445 | break; | |
1446 | } | |
1447 | ||
1448 | if (*p == ':') | |
1449 | p++; | |
1450 | addr = strtoul(p, (char **)&p, 16); | |
1451 | if (*p == ',') | |
1452 | p++; | |
1453 | len = strtoul(p, (char **)&p, 16); | |
1454 | ||
1455 | total_len = strlen(xml); | |
1456 | if (addr > total_len) { | |
1457 | sprintf(buf, "E00"); | |
1458 | put_packet(s, buf); | |
1459 | break; | |
1460 | } | |
1461 | if (len > (MAX_PACKET_LENGTH - 5) / 2) | |
1462 | len = (MAX_PACKET_LENGTH - 5) / 2; | |
1463 | if (len < total_len - addr) { | |
1464 | buf[0] = 'm'; | |
1465 | len = memtox(buf + 1, xml + addr, len); | |
1466 | } else { | |
1467 | buf[0] = 'l'; | |
1468 | len = memtox(buf + 1, xml + addr, total_len - addr); | |
1469 | } | |
1470 | put_packet_binary(s, buf, len + 1); | |
1471 | break; | |
1472 | } | |
1473 | #endif | |
1474 | /* Unrecognised 'q' command. */ | |
1475 | goto unknown_command; | |
1476 | ||
1477 | default: | |
1478 | unknown_command: | |
1479 | /* put empty packet */ | |
1480 | buf[0] = '\0'; | |
1481 | put_packet(s, buf); | |
1482 | break; | |
1483 | } | |
1484 | return RS_IDLE; | |
1485 | } | |
1486 | ||
1487 | extern void tb_flush(CPUState *env); | |
1488 | ||
1489 | #ifndef CONFIG_USER_ONLY | |
1490 | static void gdb_vm_stopped(void *opaque, int reason) | |
1491 | { | |
1492 | GDBState *s = opaque; | |
1493 | char buf[256]; | |
1494 | int ret; | |
1495 | ||
1496 | if (s->state == RS_SYSCALL) | |
1497 | return; | |
1498 | ||
1499 | /* disable single step if it was enable */ | |
1500 | cpu_single_step(s->env, 0); | |
1501 | ||
1502 | if (reason == EXCP_DEBUG) { | |
1503 | if (s->env->watchpoint_hit) { | |
1504 | snprintf(buf, sizeof(buf), "T%02xwatch:" TARGET_FMT_lx ";", | |
1505 | SIGTRAP, | |
1506 | s->env->watchpoint[s->env->watchpoint_hit - 1].vaddr); | |
1507 | put_packet(s, buf); | |
1508 | s->env->watchpoint_hit = 0; | |
1509 | return; | |
1510 | } | |
1511 | tb_flush(s->env); | |
1512 | ret = SIGTRAP; | |
1513 | } else if (reason == EXCP_INTERRUPT) { | |
1514 | ret = SIGINT; | |
1515 | } else { | |
1516 | ret = 0; | |
1517 | } | |
1518 | snprintf(buf, sizeof(buf), "S%02x", ret); | |
1519 | put_packet(s, buf); | |
1520 | } | |
1521 | #endif | |
1522 | ||
1523 | /* Send a gdb syscall request. | |
1524 | This accepts limited printf-style format specifiers, specifically: | |
1525 | %x - target_ulong argument printed in hex. | |
1526 | %lx - 64-bit argument printed in hex. | |
1527 | %s - string pointer (target_ulong) and length (int) pair. */ | |
1528 | void gdb_do_syscall(gdb_syscall_complete_cb cb, const char *fmt, ...) | |
1529 | { | |
1530 | va_list va; | |
1531 | char buf[256]; | |
1532 | char *p; | |
1533 | target_ulong addr; | |
1534 | uint64_t i64; | |
1535 | GDBState *s; | |
1536 | ||
1537 | s = gdb_syscall_state; | |
1538 | if (!s) | |
1539 | return; | |
1540 | gdb_current_syscall_cb = cb; | |
1541 | s->state = RS_SYSCALL; | |
1542 | #ifndef CONFIG_USER_ONLY | |
1543 | vm_stop(EXCP_DEBUG); | |
1544 | #endif | |
1545 | s->state = RS_IDLE; | |
1546 | va_start(va, fmt); | |
1547 | p = buf; | |
1548 | *(p++) = 'F'; | |
1549 | while (*fmt) { | |
1550 | if (*fmt == '%') { | |
1551 | fmt++; | |
1552 | switch (*fmt++) { | |
1553 | case 'x': | |
1554 | addr = va_arg(va, target_ulong); | |
1555 | p += snprintf(p, &buf[sizeof(buf)] - p, TARGET_FMT_lx, addr); | |
1556 | break; | |
1557 | case 'l': | |
1558 | if (*(fmt++) != 'x') | |
1559 | goto bad_format; | |
1560 | i64 = va_arg(va, uint64_t); | |
1561 | p += snprintf(p, &buf[sizeof(buf)] - p, "%" PRIx64, i64); | |
1562 | break; | |
1563 | case 's': | |
1564 | addr = va_arg(va, target_ulong); | |
1565 | p += snprintf(p, &buf[sizeof(buf)] - p, TARGET_FMT_lx "/%x", | |
1566 | addr, va_arg(va, int)); | |
1567 | break; | |
1568 | default: | |
1569 | bad_format: | |
1570 | fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n", | |
1571 | fmt - 1); | |
1572 | break; | |
1573 | } | |
1574 | } else { | |
1575 | *(p++) = *(fmt++); | |
1576 | } | |
1577 | } | |
1578 | *p = 0; | |
1579 | va_end(va); | |
1580 | put_packet(s, buf); | |
1581 | #ifdef CONFIG_USER_ONLY | |
1582 | gdb_handlesig(s->env, 0); | |
1583 | #else | |
1584 | cpu_interrupt(s->env, CPU_INTERRUPT_EXIT); | |
1585 | #endif | |
1586 | } | |
1587 | ||
1588 | static void gdb_read_byte(GDBState *s, int ch) | |
1589 | { | |
1590 | CPUState *env = s->env; | |
1591 | int i, csum; | |
1592 | uint8_t reply; | |
1593 | ||
1594 | #ifndef CONFIG_USER_ONLY | |
1595 | if (s->last_packet_len) { | |
1596 | /* Waiting for a response to the last packet. If we see the start | |
1597 | of a new command then abandon the previous response. */ | |
1598 | if (ch == '-') { | |
1599 | #ifdef DEBUG_GDB | |
1600 | printf("Got NACK, retransmitting\n"); | |
1601 | #endif | |
1602 | put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len); | |
1603 | } | |
1604 | #ifdef DEBUG_GDB | |
1605 | else if (ch == '+') | |
1606 | printf("Got ACK\n"); | |
1607 | else | |
1608 | printf("Got '%c' when expecting ACK/NACK\n", ch); | |
1609 | #endif | |
1610 | if (ch == '+' || ch == '$') | |
1611 | s->last_packet_len = 0; | |
1612 | if (ch != '$') | |
1613 | return; | |
1614 | } | |
1615 | if (vm_running) { | |
1616 | /* when the CPU is running, we cannot do anything except stop | |
1617 | it when receiving a char */ | |
1618 | vm_stop(EXCP_INTERRUPT); | |
1619 | } else | |
1620 | #endif | |
1621 | { | |
1622 | switch(s->state) { | |
1623 | case RS_IDLE: | |
1624 | if (ch == '$') { | |
1625 | s->line_buf_index = 0; | |
1626 | s->state = RS_GETLINE; | |
1627 | } | |
1628 | break; | |
1629 | case RS_GETLINE: | |
1630 | if (ch == '#') { | |
1631 | s->state = RS_CHKSUM1; | |
1632 | } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) { | |
1633 | s->state = RS_IDLE; | |
1634 | } else { | |
1635 | s->line_buf[s->line_buf_index++] = ch; | |
1636 | } | |
1637 | break; | |
1638 | case RS_CHKSUM1: | |
1639 | s->line_buf[s->line_buf_index] = '\0'; | |
1640 | s->line_csum = fromhex(ch) << 4; | |
1641 | s->state = RS_CHKSUM2; | |
1642 | break; | |
1643 | case RS_CHKSUM2: | |
1644 | s->line_csum |= fromhex(ch); | |
1645 | csum = 0; | |
1646 | for(i = 0; i < s->line_buf_index; i++) { | |
1647 | csum += s->line_buf[i]; | |
1648 | } | |
1649 | if (s->line_csum != (csum & 0xff)) { | |
1650 | reply = '-'; | |
1651 | put_buffer(s, &reply, 1); | |
1652 | s->state = RS_IDLE; | |
1653 | } else { | |
1654 | reply = '+'; | |
1655 | put_buffer(s, &reply, 1); | |
1656 | s->state = gdb_handle_packet(s, env, s->line_buf); | |
1657 | } | |
1658 | break; | |
1659 | default: | |
1660 | abort(); | |
1661 | } | |
1662 | } | |
1663 | } | |
1664 | ||
1665 | #ifdef CONFIG_USER_ONLY | |
1666 | int | |
1667 | gdb_handlesig (CPUState *env, int sig) | |
1668 | { | |
1669 | GDBState *s; | |
1670 | char buf[256]; | |
1671 | int n; | |
1672 | ||
1673 | s = &gdbserver_state; | |
1674 | if (gdbserver_fd < 0 || s->fd < 0) | |
1675 | return sig; | |
1676 | ||
1677 | /* disable single step if it was enabled */ | |
1678 | cpu_single_step(env, 0); | |
1679 | tb_flush(env); | |
1680 | ||
1681 | if (sig != 0) | |
1682 | { | |
1683 | snprintf(buf, sizeof(buf), "S%02x", sig); | |
1684 | put_packet(s, buf); | |
1685 | } | |
1686 | /* put_packet() might have detected that the peer terminated the | |
1687 | connection. */ | |
1688 | if (s->fd < 0) | |
1689 | return sig; | |
1690 | ||
1691 | sig = 0; | |
1692 | s->state = RS_IDLE; | |
1693 | s->running_state = 0; | |
1694 | while (s->running_state == 0) { | |
1695 | n = read (s->fd, buf, 256); | |
1696 | if (n > 0) | |
1697 | { | |
1698 | int i; | |
1699 | ||
1700 | for (i = 0; i < n; i++) | |
1701 | gdb_read_byte (s, buf[i]); | |
1702 | } | |
1703 | else if (n == 0 || errno != EAGAIN) | |
1704 | { | |
1705 | /* XXX: Connection closed. Should probably wait for annother | |
1706 | connection before continuing. */ | |
1707 | return sig; | |
1708 | } | |
1709 | } | |
1710 | sig = s->signal; | |
1711 | s->signal = 0; | |
1712 | return sig; | |
1713 | } | |
1714 | ||
1715 | /* Tell the remote gdb that the process has exited. */ | |
1716 | void gdb_exit(CPUState *env, int code) | |
1717 | { | |
1718 | GDBState *s; | |
1719 | char buf[4]; | |
1720 | ||
1721 | s = &gdbserver_state; | |
1722 | if (gdbserver_fd < 0 || s->fd < 0) | |
1723 | return; | |
1724 | ||
1725 | snprintf(buf, sizeof(buf), "W%02x", code); | |
1726 | put_packet(s, buf); | |
1727 | } | |
1728 | ||
1729 | ||
1730 | static void gdb_accept(void *opaque) | |
1731 | { | |
1732 | GDBState *s; | |
1733 | struct sockaddr_in sockaddr; | |
1734 | socklen_t len; | |
1735 | int val, fd; | |
1736 | ||
1737 | for(;;) { | |
1738 | len = sizeof(sockaddr); | |
1739 | fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len); | |
1740 | if (fd < 0 && errno != EINTR) { | |
1741 | perror("accept"); | |
1742 | return; | |
1743 | } else if (fd >= 0) { | |
1744 | break; | |
1745 | } | |
1746 | } | |
1747 | ||
1748 | /* set short latency */ | |
1749 | val = 1; | |
1750 | setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val)); | |
1751 | ||
1752 | s = &gdbserver_state; | |
1753 | memset (s, 0, sizeof (GDBState)); | |
1754 | s->env = first_cpu; /* XXX: allow to change CPU */ | |
1755 | s->fd = fd; | |
1756 | gdb_has_xml = 0; | |
1757 | ||
1758 | gdb_syscall_state = s; | |
1759 | ||
1760 | fcntl(fd, F_SETFL, O_NONBLOCK); | |
1761 | } | |
1762 | ||
1763 | static int gdbserver_open(int port) | |
1764 | { | |
1765 | struct sockaddr_in sockaddr; | |
1766 | int fd, val, ret; | |
1767 | ||
1768 | fd = socket(PF_INET, SOCK_STREAM, 0); | |
1769 | if (fd < 0) { | |
1770 | perror("socket"); | |
1771 | return -1; | |
1772 | } | |
1773 | ||
1774 | /* allow fast reuse */ | |
1775 | val = 1; | |
1776 | setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val)); | |
1777 | ||
1778 | sockaddr.sin_family = AF_INET; | |
1779 | sockaddr.sin_port = htons(port); | |
1780 | sockaddr.sin_addr.s_addr = 0; | |
1781 | ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr)); | |
1782 | if (ret < 0) { | |
1783 | perror("bind"); | |
1784 | return -1; | |
1785 | } | |
1786 | ret = listen(fd, 0); | |
1787 | if (ret < 0) { | |
1788 | perror("listen"); | |
1789 | return -1; | |
1790 | } | |
1791 | return fd; | |
1792 | } | |
1793 | ||
1794 | int gdbserver_start(int port) | |
1795 | { | |
1796 | gdbserver_fd = gdbserver_open(port); | |
1797 | if (gdbserver_fd < 0) | |
1798 | return -1; | |
1799 | /* accept connections */ | |
1800 | gdb_accept (NULL); | |
1801 | return 0; | |
1802 | } | |
1803 | #else | |
1804 | static int gdb_chr_can_receive(void *opaque) | |
1805 | { | |
1806 | /* We can handle an arbitrarily large amount of data. | |
1807 | Pick the maximum packet size, which is as good as anything. */ | |
1808 | return MAX_PACKET_LENGTH; | |
1809 | } | |
1810 | ||
1811 | static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size) | |
1812 | { | |
1813 | GDBState *s = opaque; | |
1814 | int i; | |
1815 | ||
1816 | for (i = 0; i < size; i++) { | |
1817 | gdb_read_byte(s, buf[i]); | |
1818 | } | |
1819 | } | |
1820 | ||
1821 | static void gdb_chr_event(void *opaque, int event) | |
1822 | { | |
1823 | switch (event) { | |
1824 | case CHR_EVENT_RESET: | |
1825 | vm_stop(EXCP_INTERRUPT); | |
1826 | gdb_syscall_state = opaque; | |
1827 | gdb_has_xml = 0; | |
1828 | break; | |
1829 | default: | |
1830 | break; | |
1831 | } | |
1832 | } | |
1833 | ||
1834 | int gdbserver_start(const char *port) | |
1835 | { | |
1836 | GDBState *s; | |
1837 | char gdbstub_port_name[128]; | |
1838 | int port_num; | |
1839 | char *p; | |
1840 | CharDriverState *chr; | |
1841 | ||
1842 | if (!port || !*port) | |
1843 | return -1; | |
1844 | ||
1845 | port_num = strtol(port, &p, 10); | |
1846 | if (*p == 0) { | |
1847 | /* A numeric value is interpreted as a port number. */ | |
1848 | snprintf(gdbstub_port_name, sizeof(gdbstub_port_name), | |
1849 | "tcp::%d,nowait,nodelay,server", port_num); | |
1850 | port = gdbstub_port_name; | |
1851 | } | |
1852 | ||
1853 | chr = qemu_chr_open(port); | |
1854 | if (!chr) | |
1855 | return -1; | |
1856 | ||
1857 | s = qemu_mallocz(sizeof(GDBState)); | |
1858 | if (!s) { | |
1859 | return -1; | |
1860 | } | |
1861 | s->env = first_cpu; /* XXX: allow to change CPU */ | |
1862 | s->chr = chr; | |
1863 | qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive, | |
1864 | gdb_chr_event, s); | |
1865 | qemu_add_vm_stop_handler(gdb_vm_stopped, s); | |
1866 | return 0; | |
1867 | } | |
1868 | #endif |