[qemu.git] / hw / apic.h

#ifndef APIC_H
#define APIC_H

#include "qemu-common.h"

/* apic.c */
void apic_deliver_irq(uint8_t dest, uint8_t dest_mode,
                             uint8_t delivery_mode,
                             uint8_t vector_num, uint8_t polarity,
                             uint8_t trigger_mode);
int apic_accept_pic_intr(DeviceState *s);
void apic_deliver_pic_intr(DeviceState *s, int level);
int apic_get_interrupt(DeviceState *s);
void apic_reset_irq_delivered(void);
int apic_get_irq_delivered(void);
void cpu_set_apic_base(DeviceState *s, uint64_t val);
uint64_t cpu_get_apic_base(DeviceState *s);
void cpu_set_apic_tpr(DeviceState *s, uint8_t val);
uint8_t cpu_get_apic_tpr(DeviceState *s);
void apic_init_reset(DeviceState *s);
void apic_sipi(DeviceState *s);

/* pc.c */
int cpu_is_bsp(CPUState *env);
DeviceState *cpu_get_current_apic(void);

#endif
Commit	Line	Data
	1	#ifndef APIC_H
	2	#define APIC_H
	3
	4	#include "qemu-common.h"
	5
	6	/* apic.c */
	7	void apic_deliver_irq(uint8_t dest, uint8_t dest_mode,
	8	uint8_t delivery_mode,
	9	uint8_t vector_num, uint8_t polarity,
	10	uint8_t trigger_mode);
	11	int apic_accept_pic_intr(DeviceState *s);
	12	void apic_deliver_pic_intr(DeviceState *s, int level);
	13	int apic_get_interrupt(DeviceState *s);
	14	void apic_reset_irq_delivered(void);
	15	int apic_get_irq_delivered(void);
	16	void cpu_set_apic_base(DeviceState *s, uint64_t val);
	17	uint64_t cpu_get_apic_base(DeviceState *s);
	18	void cpu_set_apic_tpr(DeviceState *s, uint8_t val);
	19	uint8_t cpu_get_apic_tpr(DeviceState *s);
	20	void apic_init_reset(DeviceState *s);
	21	void apic_sipi(DeviceState *s);
	22
	23	/* pc.c */
	24	int cpu_is_bsp(CPUState *env);
	25	DeviceState *cpu_get_current_apic(void);
	26
	27	#endif