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1 | /* | |
2 | * Software MMU support | |
3 | * | |
4 | * Copyright (c) 2003 Fabrice Bellard | |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | #define DATA_SIZE (1 << SHIFT) | |
20 | ||
21 | #if DATA_SIZE == 8 | |
22 | #define SUFFIX q | |
23 | #define USUFFIX q | |
24 | #define DATA_TYPE uint64_t | |
25 | #elif DATA_SIZE == 4 | |
26 | #define SUFFIX l | |
27 | #define USUFFIX l | |
28 | #define DATA_TYPE uint32_t | |
29 | #elif DATA_SIZE == 2 | |
30 | #define SUFFIX w | |
31 | #define USUFFIX uw | |
32 | #define DATA_TYPE uint16_t | |
33 | #elif DATA_SIZE == 1 | |
34 | #define SUFFIX b | |
35 | #define USUFFIX ub | |
36 | #define DATA_TYPE uint8_t | |
37 | #else | |
38 | #error unsupported data size | |
39 | #endif | |
40 | ||
41 | #ifdef SOFTMMU_CODE_ACCESS | |
42 | #define READ_ACCESS_TYPE 2 | |
43 | #define ADDR_READ addr_code | |
44 | #else | |
45 | #define READ_ACCESS_TYPE 0 | |
46 | #define ADDR_READ addr_read | |
47 | #endif | |
48 | ||
49 | static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr, | |
50 | int mmu_idx, | |
51 | void *retaddr); | |
52 | static inline DATA_TYPE glue(io_read, SUFFIX)(target_phys_addr_t physaddr, | |
53 | target_ulong addr, | |
54 | void *retaddr) | |
55 | { | |
56 | DATA_TYPE res; | |
57 | int index; | |
58 | index = (physaddr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1); | |
59 | physaddr = (physaddr & TARGET_PAGE_MASK) + addr; | |
60 | env->mem_io_pc = (unsigned long)retaddr; | |
61 | if (index > (IO_MEM_NOTDIRTY >> IO_MEM_SHIFT) | |
62 | && !can_do_io(env)) { | |
63 | cpu_io_recompile(env, retaddr); | |
64 | } | |
65 | ||
66 | env->mem_io_vaddr = addr; | |
67 | #if SHIFT <= 2 | |
68 | res = io_mem_read[index][SHIFT](io_mem_opaque[index], physaddr); | |
69 | #else | |
70 | #ifdef TARGET_WORDS_BIGENDIAN | |
71 | res = (uint64_t)io_mem_read[index][2](io_mem_opaque[index], physaddr) << 32; | |
72 | res |= io_mem_read[index][2](io_mem_opaque[index], physaddr + 4); | |
73 | #else | |
74 | res = io_mem_read[index][2](io_mem_opaque[index], physaddr); | |
75 | res |= (uint64_t)io_mem_read[index][2](io_mem_opaque[index], physaddr + 4) << 32; | |
76 | #endif | |
77 | #endif /* SHIFT > 2 */ | |
78 | return res; | |
79 | } | |
80 | ||
81 | /* handle all cases except unaligned access which span two pages */ | |
82 | DATA_TYPE REGPARM glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr, | |
83 | int mmu_idx) | |
84 | { | |
85 | DATA_TYPE res; | |
86 | int index; | |
87 | target_ulong tlb_addr; | |
88 | target_phys_addr_t addend; | |
89 | void *retaddr; | |
90 | ||
91 | /* test if there is match for unaligned or IO access */ | |
92 | /* XXX: could done more in memory macro in a non portable way */ | |
93 | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); | |
94 | redo: | |
95 | tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ; | |
96 | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { | |
97 | if (tlb_addr & ~TARGET_PAGE_MASK) { | |
98 | /* IO access */ | |
99 | if ((addr & (DATA_SIZE - 1)) != 0) | |
100 | goto do_unaligned_access; | |
101 | retaddr = GETPC(); | |
102 | addend = env->iotlb[mmu_idx][index]; | |
103 | res = glue(io_read, SUFFIX)(addend, addr, retaddr); | |
104 | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { | |
105 | /* slow unaligned access (it spans two pages or IO) */ | |
106 | do_unaligned_access: | |
107 | retaddr = GETPC(); | |
108 | #ifdef ALIGNED_ONLY | |
109 | do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); | |
110 | #endif | |
111 | res = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr, | |
112 | mmu_idx, retaddr); | |
113 | } else { | |
114 | /* unaligned/aligned access in the same page */ | |
115 | #ifdef ALIGNED_ONLY | |
116 | if ((addr & (DATA_SIZE - 1)) != 0) { | |
117 | retaddr = GETPC(); | |
118 | do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); | |
119 | } | |
120 | #endif | |
121 | addend = env->tlb_table[mmu_idx][index].addend; | |
122 | res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)(addr+addend)); | |
123 | } | |
124 | } else { | |
125 | /* the page is not in the TLB : fill it */ | |
126 | retaddr = GETPC(); | |
127 | #ifdef ALIGNED_ONLY | |
128 | if ((addr & (DATA_SIZE - 1)) != 0) | |
129 | do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); | |
130 | #endif | |
131 | tlb_fill(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); | |
132 | goto redo; | |
133 | } | |
134 | return res; | |
135 | } | |
136 | ||
137 | /* handle all unaligned cases */ | |
138 | static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr, | |
139 | int mmu_idx, | |
140 | void *retaddr) | |
141 | { | |
142 | DATA_TYPE res, res1, res2; | |
143 | int index, shift; | |
144 | target_phys_addr_t addend; | |
145 | target_ulong tlb_addr, addr1, addr2; | |
146 | ||
147 | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); | |
148 | redo: | |
149 | tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ; | |
150 | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { | |
151 | if (tlb_addr & ~TARGET_PAGE_MASK) { | |
152 | /* IO access */ | |
153 | if ((addr & (DATA_SIZE - 1)) != 0) | |
154 | goto do_unaligned_access; | |
155 | retaddr = GETPC(); | |
156 | addend = env->iotlb[mmu_idx][index]; | |
157 | res = glue(io_read, SUFFIX)(addend, addr, retaddr); | |
158 | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { | |
159 | do_unaligned_access: | |
160 | /* slow unaligned access (it spans two pages) */ | |
161 | addr1 = addr & ~(DATA_SIZE - 1); | |
162 | addr2 = addr1 + DATA_SIZE; | |
163 | res1 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr1, | |
164 | mmu_idx, retaddr); | |
165 | res2 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr2, | |
166 | mmu_idx, retaddr); | |
167 | shift = (addr & (DATA_SIZE - 1)) * 8; | |
168 | #ifdef TARGET_WORDS_BIGENDIAN | |
169 | res = (res1 << shift) | (res2 >> ((DATA_SIZE * 8) - shift)); | |
170 | #else | |
171 | res = (res1 >> shift) | (res2 << ((DATA_SIZE * 8) - shift)); | |
172 | #endif | |
173 | res = (DATA_TYPE)res; | |
174 | } else { | |
175 | /* unaligned/aligned access in the same page */ | |
176 | addend = env->tlb_table[mmu_idx][index].addend; | |
177 | res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)(addr+addend)); | |
178 | } | |
179 | } else { | |
180 | /* the page is not in the TLB : fill it */ | |
181 | tlb_fill(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); | |
182 | goto redo; | |
183 | } | |
184 | return res; | |
185 | } | |
186 | ||
187 | #ifndef SOFTMMU_CODE_ACCESS | |
188 | ||
189 | static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr, | |
190 | DATA_TYPE val, | |
191 | int mmu_idx, | |
192 | void *retaddr); | |
193 | ||
194 | static inline void glue(io_write, SUFFIX)(target_phys_addr_t physaddr, | |
195 | DATA_TYPE val, | |
196 | target_ulong addr, | |
197 | void *retaddr) | |
198 | { | |
199 | int index; | |
200 | index = (physaddr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1); | |
201 | physaddr = (physaddr & TARGET_PAGE_MASK) + addr; | |
202 | if (index > (IO_MEM_NOTDIRTY >> IO_MEM_SHIFT) | |
203 | && !can_do_io(env)) { | |
204 | cpu_io_recompile(env, retaddr); | |
205 | } | |
206 | ||
207 | env->mem_io_vaddr = addr; | |
208 | env->mem_io_pc = (unsigned long)retaddr; | |
209 | #if SHIFT <= 2 | |
210 | io_mem_write[index][SHIFT](io_mem_opaque[index], physaddr, val); | |
211 | #else | |
212 | #ifdef TARGET_WORDS_BIGENDIAN | |
213 | io_mem_write[index][2](io_mem_opaque[index], physaddr, val >> 32); | |
214 | io_mem_write[index][2](io_mem_opaque[index], physaddr + 4, val); | |
215 | #else | |
216 | io_mem_write[index][2](io_mem_opaque[index], physaddr, val); | |
217 | io_mem_write[index][2](io_mem_opaque[index], physaddr + 4, val >> 32); | |
218 | #endif | |
219 | #endif /* SHIFT > 2 */ | |
220 | } | |
221 | ||
222 | void REGPARM glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr, | |
223 | DATA_TYPE val, | |
224 | int mmu_idx) | |
225 | { | |
226 | target_phys_addr_t addend; | |
227 | target_ulong tlb_addr; | |
228 | void *retaddr; | |
229 | int index; | |
230 | ||
231 | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); | |
232 | redo: | |
233 | tlb_addr = env->tlb_table[mmu_idx][index].addr_write; | |
234 | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { | |
235 | if (tlb_addr & ~TARGET_PAGE_MASK) { | |
236 | /* IO access */ | |
237 | if ((addr & (DATA_SIZE - 1)) != 0) | |
238 | goto do_unaligned_access; | |
239 | retaddr = GETPC(); | |
240 | addend = env->iotlb[mmu_idx][index]; | |
241 | glue(io_write, SUFFIX)(addend, val, addr, retaddr); | |
242 | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { | |
243 | do_unaligned_access: | |
244 | retaddr = GETPC(); | |
245 | #ifdef ALIGNED_ONLY | |
246 | do_unaligned_access(addr, 1, mmu_idx, retaddr); | |
247 | #endif | |
248 | glue(glue(slow_st, SUFFIX), MMUSUFFIX)(addr, val, | |
249 | mmu_idx, retaddr); | |
250 | } else { | |
251 | /* aligned/unaligned access in the same page */ | |
252 | #ifdef ALIGNED_ONLY | |
253 | if ((addr & (DATA_SIZE - 1)) != 0) { | |
254 | retaddr = GETPC(); | |
255 | do_unaligned_access(addr, 1, mmu_idx, retaddr); | |
256 | } | |
257 | #endif | |
258 | addend = env->tlb_table[mmu_idx][index].addend; | |
259 | glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)(addr+addend), val); | |
260 | } | |
261 | } else { | |
262 | /* the page is not in the TLB : fill it */ | |
263 | retaddr = GETPC(); | |
264 | #ifdef ALIGNED_ONLY | |
265 | if ((addr & (DATA_SIZE - 1)) != 0) | |
266 | do_unaligned_access(addr, 1, mmu_idx, retaddr); | |
267 | #endif | |
268 | tlb_fill(addr, 1, mmu_idx, retaddr); | |
269 | goto redo; | |
270 | } | |
271 | } | |
272 | ||
273 | /* handles all unaligned cases */ | |
274 | static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr, | |
275 | DATA_TYPE val, | |
276 | int mmu_idx, | |
277 | void *retaddr) | |
278 | { | |
279 | target_phys_addr_t addend; | |
280 | target_ulong tlb_addr; | |
281 | int index, i; | |
282 | ||
283 | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); | |
284 | redo: | |
285 | tlb_addr = env->tlb_table[mmu_idx][index].addr_write; | |
286 | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { | |
287 | if (tlb_addr & ~TARGET_PAGE_MASK) { | |
288 | /* IO access */ | |
289 | if ((addr & (DATA_SIZE - 1)) != 0) | |
290 | goto do_unaligned_access; | |
291 | addend = env->iotlb[mmu_idx][index]; | |
292 | glue(io_write, SUFFIX)(addend, val, addr, retaddr); | |
293 | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { | |
294 | do_unaligned_access: | |
295 | /* XXX: not efficient, but simple */ | |
296 | /* Note: relies on the fact that tlb_fill() does not remove the | |
297 | * previous page from the TLB cache. */ | |
298 | for(i = DATA_SIZE - 1; i >= 0; i--) { | |
299 | #ifdef TARGET_WORDS_BIGENDIAN | |
300 | glue(slow_stb, MMUSUFFIX)(addr + i, val >> (((DATA_SIZE - 1) * 8) - (i * 8)), | |
301 | mmu_idx, retaddr); | |
302 | #else | |
303 | glue(slow_stb, MMUSUFFIX)(addr + i, val >> (i * 8), | |
304 | mmu_idx, retaddr); | |
305 | #endif | |
306 | } | |
307 | } else { | |
308 | /* aligned/unaligned access in the same page */ | |
309 | addend = env->tlb_table[mmu_idx][index].addend; | |
310 | glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)(addr+addend), val); | |
311 | } | |
312 | } else { | |
313 | /* the page is not in the TLB : fill it */ | |
314 | tlb_fill(addr, 1, mmu_idx, retaddr); | |
315 | goto redo; | |
316 | } | |
317 | } | |
318 | ||
319 | #endif /* !defined(SOFTMMU_CODE_ACCESS) */ | |
320 | ||
321 | #undef READ_ACCESS_TYPE | |
322 | #undef SHIFT | |
323 | #undef DATA_TYPE | |
324 | #undef SUFFIX | |
325 | #undef USUFFIX | |
326 | #undef DATA_SIZE | |
327 | #undef ADDR_READ |