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1 | /* | |
2 | * QEMU SuperH CPU | |
3 | * | |
4 | * Copyright (c) 2005 Samuel Tardieu | |
5 | * Copyright (c) 2012 SUSE LINUX Products GmbH | |
6 | * | |
7 | * This library is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU Lesser General Public | |
9 | * License as published by the Free Software Foundation; either | |
10 | * version 2.1 of the License, or (at your option) any later version. | |
11 | * | |
12 | * This library is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * Lesser General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU Lesser General Public | |
18 | * License along with this library; if not, see | |
19 | * <http://www.gnu.org/licenses/lgpl-2.1.html> | |
20 | */ | |
21 | ||
22 | #include "cpu.h" | |
23 | #include "qemu-common.h" | |
24 | #include "migration/vmstate.h" | |
25 | ||
26 | ||
27 | /* CPUClass::reset() */ | |
28 | static void superh_cpu_reset(CPUState *s) | |
29 | { | |
30 | SuperHCPU *cpu = SUPERH_CPU(s); | |
31 | SuperHCPUClass *scc = SUPERH_CPU_GET_CLASS(cpu); | |
32 | CPUSH4State *env = &cpu->env; | |
33 | ||
34 | if (qemu_loglevel_mask(CPU_LOG_RESET)) { | |
35 | qemu_log("CPU Reset (CPU %d)\n", s->cpu_index); | |
36 | log_cpu_state(env, 0); | |
37 | } | |
38 | ||
39 | scc->parent_reset(s); | |
40 | ||
41 | memset(env, 0, offsetof(CPUSH4State, breakpoints)); | |
42 | tlb_flush(env, 1); | |
43 | ||
44 | env->pc = 0xA0000000; | |
45 | #if defined(CONFIG_USER_ONLY) | |
46 | env->fpscr = FPSCR_PR; /* value for userspace according to the kernel */ | |
47 | set_float_rounding_mode(float_round_nearest_even, &env->fp_status); /* ?! */ | |
48 | #else | |
49 | env->sr = SR_MD | SR_RB | SR_BL | SR_I3 | SR_I2 | SR_I1 | SR_I0; | |
50 | env->fpscr = FPSCR_DN | FPSCR_RM_ZERO; /* CPU reset value according to SH4 manual */ | |
51 | set_float_rounding_mode(float_round_to_zero, &env->fp_status); | |
52 | set_flush_to_zero(1, &env->fp_status); | |
53 | #endif | |
54 | set_default_nan_mode(1, &env->fp_status); | |
55 | } | |
56 | ||
57 | static void superh_cpu_realizefn(DeviceState *dev, Error **errp) | |
58 | { | |
59 | SuperHCPU *cpu = SUPERH_CPU(dev); | |
60 | SuperHCPUClass *scc = SUPERH_CPU_GET_CLASS(dev); | |
61 | ||
62 | cpu_reset(CPU(cpu)); | |
63 | qemu_init_vcpu(&cpu->env); | |
64 | ||
65 | scc->parent_realize(dev, errp); | |
66 | } | |
67 | ||
68 | static void superh_cpu_initfn(Object *obj) | |
69 | { | |
70 | SuperHCPU *cpu = SUPERH_CPU(obj); | |
71 | CPUSH4State *env = &cpu->env; | |
72 | ||
73 | cpu_exec_init(env); | |
74 | ||
75 | env->movcal_backup_tail = &(env->movcal_backup); | |
76 | ||
77 | if (tcg_enabled()) { | |
78 | sh4_translate_init(); | |
79 | } | |
80 | } | |
81 | ||
82 | static const VMStateDescription vmstate_sh_cpu = { | |
83 | .name = "cpu", | |
84 | .unmigratable = 1, | |
85 | }; | |
86 | ||
87 | static void superh_cpu_class_init(ObjectClass *oc, void *data) | |
88 | { | |
89 | DeviceClass *dc = DEVICE_CLASS(oc); | |
90 | CPUClass *cc = CPU_CLASS(oc); | |
91 | SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc); | |
92 | ||
93 | scc->parent_realize = dc->realize; | |
94 | dc->realize = superh_cpu_realizefn; | |
95 | ||
96 | scc->parent_reset = cc->reset; | |
97 | cc->reset = superh_cpu_reset; | |
98 | ||
99 | dc->vmsd = &vmstate_sh_cpu; | |
100 | } | |
101 | ||
102 | static const TypeInfo superh_cpu_type_info = { | |
103 | .name = TYPE_SUPERH_CPU, | |
104 | .parent = TYPE_CPU, | |
105 | .instance_size = sizeof(SuperHCPU), | |
106 | .instance_init = superh_cpu_initfn, | |
107 | .abstract = false, | |
108 | .class_size = sizeof(SuperHCPUClass), | |
109 | .class_init = superh_cpu_class_init, | |
110 | }; | |
111 | ||
112 | static void superh_cpu_register_types(void) | |
113 | { | |
114 | type_register_static(&superh_cpu_type_info); | |
115 | } | |
116 | ||
117 | type_init(superh_cpu_register_types) |