ArmPkg/Drivers/CpuDxe/AArch64/ExceptionSupport.S

   1 //
   2 // Copyright (c) 2011 - 2013 ARM LTD. All rights reserved.<BR>
   3 //
   4 // This program and the accompanying materials
   5 // are licensed and made available under the terms and conditions of the BSD License
   6 // which accompanies this distribution.  The full text of the license may be found at
   7 // http://opensource.org/licenses/bsd-license.php
   8 //
   9 // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11 //
  12 //------------------------------------------------------------------------------
  13
  14 #include <Library/PcdLib.h>
  15 #include <AsmMacroIoLibV8.h>
  16
  17 /*
  18   This is the stack constructed by the exception handler (low address to high address).
  19   X0 to FAR makes up the EFI_SYSTEM_CONTEXT for AArch64.
  20
  21   UINT64  X0;     0x000
  22   UINT64  X1;     0x008
  23   UINT64  X2;     0x010
  24   UINT64  X3;     0x018
  25   UINT64  X4;     0x020
  26   UINT64  X5;     0x028
  27   UINT64  X6;     0x030
  28   UINT64  X7;     0x038
  29   UINT64  X8;     0x040
  30   UINT64  X9;     0x048
  31   UINT64  X10;    0x050
  32   UINT64  X11;    0x058
  33   UINT64  X12;    0x060
  34   UINT64  X13;    0x068
  35   UINT64  X14;    0x070
  36   UINT64  X15;    0x078
  37   UINT64  X16;    0x080
  38   UINT64  X17;    0x088
  39   UINT64  X18;    0x090
  40   UINT64  X19;    0x098
  41   UINT64  X20;    0x0a0
  42   UINT64  X21;    0x0a8
  43   UINT64  X22;    0x0b0
  44   UINT64  X23;    0x0b8
  45   UINT64  X24;    0x0c0
  46   UINT64  X25;    0x0c8
  47   UINT64  X26;    0x0d0
  48   UINT64  X27;    0x0d8
  49   UINT64  X28;    0x0e0
  50   UINT64  FP;     0x0e8   // x29 - Frame Pointer
  51   UINT64  LR;     0x0f0   // x30 - Link Register
  52   UINT64  SP;     0x0f8   // x31 - Stack Pointer
  53
  54   // FP/SIMD Registers. 128bit if used as Q-regs.
  55   UINT64  V0[2];  0x100
  56   UINT64  V1[2];  0x110
  57   UINT64  V2[2];  0x120
  58   UINT64  V3[2];  0x130
  59   UINT64  V4[2];  0x140
  60   UINT64  V5[2];  0x150
  61   UINT64  V6[2];  0x160
  62   UINT64  V7[2];  0x170
  63   UINT64  V8[2];  0x180
  64   UINT64  V9[2];  0x190
  65   UINT64  V10[2]; 0x1a0
  66   UINT64  V11[2]; 0x1b0
  67   UINT64  V12[2]; 0x1c0
  68   UINT64  V13[2]; 0x1d0
  69   UINT64  V14[2]; 0x1e0
  70   UINT64  V15[2]; 0x1f0
  71   UINT64  V16[2]; 0x200
  72   UINT64  V17[2]; 0x210
  73   UINT64  V18[2]; 0x220
  74   UINT64  V19[2]; 0x230
  75   UINT64  V20[2]; 0x240
  76   UINT64  V21[2]; 0x250
  77   UINT64  V22[2]; 0x260
  78   UINT64  V23[2]; 0x270
  79   UINT64  V24[2]; 0x280
  80   UINT64  V25[2]; 0x290
  81   UINT64  V26[2]; 0x2a0
  82   UINT64  V27[2]; 0x2b0
  83   UINT64  V28[2]; 0x2c0
  84   UINT64  V29[2]; 0x2d0
  85   UINT64  V30[2]; 0x2e0
  86   UINT64  V31[2]; 0x2f0
  87
  88   // System Context
  89   UINT64  ELR;    0x300   // Exception Link Register
  90   UINT64  SPSR;   0x308   // Saved Processor Status Register
  91   UINT64  FPSR;   0x310   // Floating Point Status Register
  92   UINT64  ESR;    0x318   // EL1 Fault Address Register
  93   UINT64  FAR;    0x320   // EL1 Exception syndrome register
  94   UINT64  Padding;0x328   // Required for stack alignment
  95 */
  96
  97 ASM_GLOBAL ASM_PFX(ExceptionHandlersStart)
  98 ASM_GLOBAL ASM_PFX(ExceptionHandlersEnd)
  99 ASM_GLOBAL ASM_PFX(CommonExceptionEntry)
 100 ASM_GLOBAL ASM_PFX(AsmCommonExceptionEntry)
 101 ASM_GLOBAL ASM_PFX(CommonCExceptionHandler)
 102
 103 .text
 104 .align 11
 105
 106 #define GP_CONTEXT_SIZE    (32 *  8)
 107 #define FP_CONTEXT_SIZE    (32 * 16)
 108 #define SYS_CONTEXT_SIZE   ( 6 *  8) // 5 SYS regs + Alignment requirement (ie: the stack must be aligned on 0x10)
 109
 110 // Cannot str x31 directly
 111 #define ALL_GP_REGS                                     \
 112         REG_PAIR (x0,  x1,  0x000, GP_CONTEXT_SIZE);    \
 113         REG_PAIR (x2,  x3,  0x010, GP_CONTEXT_SIZE);    \
 114         REG_PAIR (x4,  x5,  0x020, GP_CONTEXT_SIZE);    \
 115         REG_PAIR (x6,  x7,  0x030, GP_CONTEXT_SIZE);    \
 116         REG_PAIR (x8,  x9,  0x040, GP_CONTEXT_SIZE);    \
 117         REG_PAIR (x10, x11, 0x050, GP_CONTEXT_SIZE);    \
 118         REG_PAIR (x12, x13, 0x060, GP_CONTEXT_SIZE);    \
 119         REG_PAIR (x14, x15, 0x070, GP_CONTEXT_SIZE);    \
 120         REG_PAIR (x16, x17, 0x080, GP_CONTEXT_SIZE);    \
 121         REG_PAIR (x18, x19, 0x090, GP_CONTEXT_SIZE);    \
 122         REG_PAIR (x20, x21, 0x0a0, GP_CONTEXT_SIZE);    \
 123         REG_PAIR (x22, x23, 0x0b0, GP_CONTEXT_SIZE);    \
 124         REG_PAIR (x24, x25, 0x0c0, GP_CONTEXT_SIZE);    \
 125         REG_PAIR (x26, x27, 0x0d0, GP_CONTEXT_SIZE);    \
 126         REG_PAIR (x28, x29, 0x0e0, GP_CONTEXT_SIZE);    \
 127         REG_ONE  (x30,      0x0f0, GP_CONTEXT_SIZE);
 128
 129 // In order to save the SP we need to put it somwhere else first.
 130 // STR only works with XZR/WZR directly
 131 #define SAVE_SP \
 132         add x1, sp, FP_CONTEXT_SIZE + SYS_CONTEXT_SIZE; \
 133         REG_ONE (x1,        0x0f8, GP_CONTEXT_SIZE);
 134
 135 #define ALL_FP_REGS                                     \
 136         REG_PAIR (q0,  q1,  0x000, FP_CONTEXT_SIZE);    \
 137         REG_PAIR (q2,  q3,  0x020, FP_CONTEXT_SIZE);    \
 138         REG_PAIR (q4,  q5,  0x040, FP_CONTEXT_SIZE);    \
 139         REG_PAIR (q6,  q7,  0x060, FP_CONTEXT_SIZE);    \
 140         REG_PAIR (q8,  q9,  0x080, FP_CONTEXT_SIZE);    \
 141         REG_PAIR (q10, q11, 0x0a0, FP_CONTEXT_SIZE);    \
 142         REG_PAIR (q12, q13, 0x0c0, FP_CONTEXT_SIZE);    \
 143         REG_PAIR (q14, q15, 0x0e0, FP_CONTEXT_SIZE);    \
 144         REG_PAIR (q16, q17, 0x100, FP_CONTEXT_SIZE);    \
 145         REG_PAIR (q18, q19, 0x120, FP_CONTEXT_SIZE);    \
 146         REG_PAIR (q20, q21, 0x140, FP_CONTEXT_SIZE);    \
 147         REG_PAIR (q22, q23, 0x160, FP_CONTEXT_SIZE);    \
 148         REG_PAIR (q24, q25, 0x180, FP_CONTEXT_SIZE);    \
 149         REG_PAIR (q26, q27, 0x1a0, FP_CONTEXT_SIZE);    \
 150         REG_PAIR (q28, q29, 0x1c0, FP_CONTEXT_SIZE);    \
 151         REG_PAIR (q30, q31, 0x1e0, FP_CONTEXT_SIZE);
 152
 153 #define ALL_SYS_REGS                                    \
 154         REG_PAIR (x1,  x2,  0x000, SYS_CONTEXT_SIZE);   \
 155         REG_PAIR (x3,  x4,  0x010, SYS_CONTEXT_SIZE);   \
 156         REG_ONE  (x5,       0x020, SYS_CONTEXT_SIZE);
 157
 158 //
 159 // This code gets copied to the ARM vector table
 160 // VectorTableStart - VectorTableEnd gets copied
 161 //
 162 ASM_PFX(ExceptionHandlersStart):
 163
 164 //
 165 // Current EL with SP0 : 0x0 - 0x180
 166 //
 167 .align 7
 168 ASM_PFX(SynchronousExceptionSP0):
 169   b   ASM_PFX(SynchronousExceptionEntry)
 170
 171 .align 7
 172 ASM_PFX(IrqSP0):
 173   b   ASM_PFX(IrqEntry)
 174
 175 .align 7
 176 ASM_PFX(FiqSP0):
 177   b   ASM_PFX(FiqEntry)
 178
 179 .align 7
 180 ASM_PFX(SErrorSP0):
 181   b   ASM_PFX(SErrorEntry)
 182
 183 //
 184 // Current EL with SPx: 0x200 - 0x380
 185 //
 186 .align 7
 187 ASM_PFX(SynchronousExceptionSPx):
 188   b   ASM_PFX(SynchronousExceptionEntry)
 189
 190 .align 7
 191 ASM_PFX(IrqSPx):
 192   b   ASM_PFX(IrqEntry)
 193
 194 .align 7
 195 ASM_PFX(FiqSPx):
 196   b   ASM_PFX(FiqEntry)
 197
 198 .align 7
 199 ASM_PFX(SErrorSPx):
 200   b   ASM_PFX(SErrorEntry)
 201
 202 //
 203 // Lower EL using AArch64 : 0x400 - 0x580
 204 //
 205 .align 7
 206 ASM_PFX(SynchronousExceptionA64):
 207   b   ASM_PFX(SynchronousExceptionEntry)
 208
 209 .align 7
 210 ASM_PFX(IrqA64):
 211   b   ASM_PFX(IrqEntry)
 212
 213 .align 7
 214 ASM_PFX(FiqA64):
 215   b   ASM_PFX(FiqEntry)
 216
 217 .align 7
 218 ASM_PFX(SErrorA64):
 219   b   ASM_PFX(SErrorEntry)
 220
 221 //
 222 // Lower EL using AArch32 : 0x0 - 0x180
 223 //
 224 .align 7
 225 ASM_PFX(SynchronousExceptionA32):
 226   b   ASM_PFX(SynchronousExceptionEntry)
 227
 228 .align 7
 229 ASM_PFX(IrqA32):
 230   b   ASM_PFX(IrqEntry)
 231
 232 .align 7
 233 ASM_PFX(FiqA32):
 234   b   ASM_PFX(FiqEntry)
 235
 236 .align 7
 237 ASM_PFX(SErrorA32):
 238   b   ASM_PFX(SErrorEntry)
 239
 240
 241 #undef  REG_PAIR
 242 #undef  REG_ONE
 243 #define REG_PAIR(REG1, REG2, OFFSET, CONTEXT_SIZE)  stp REG1, REG2, [sp, #(OFFSET-CONTEXT_SIZE)]
 244 #define REG_ONE(REG1, OFFSET, CONTEXT_SIZE)         str REG1, [sp, #(OFFSET-CONTEXT_SIZE)]
 245
 246 ASM_PFX(SynchronousExceptionEntry):
 247   // Move the stackpointer so we can reach our structure with the str instruction.
 248   sub sp, sp, FP_CONTEXT_SIZE + SYS_CONTEXT_SIZE
 249
 250   // Save all the General regs before touching x0 and x1.
 251   // This does not save r31(SP) as it is special. We do that later.
 252   ALL_GP_REGS
 253
 254   // Record the tipe of exception that occured.
 255   mov       x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS
 256
 257   // Jump to our general handler to deal with all the common parts and process the exception.
 258   ldr       x1, ASM_PFX(CommonExceptionEntry)
 259   br        x1
 260
 261 ASM_PFX(IrqEntry):
 262   sub sp, sp, FP_CONTEXT_SIZE + SYS_CONTEXT_SIZE
 263   ALL_GP_REGS
 264   mov       x0, #EXCEPT_AARCH64_IRQ
 265   ldr       x1, ASM_PFX(CommonExceptionEntry)
 266   br        x1
 267
 268 ASM_PFX(FiqEntry):
 269   sub sp, sp, FP_CONTEXT_SIZE + SYS_CONTEXT_SIZE
 270   ALL_GP_REGS
 271   mov       x0, #EXCEPT_AARCH64_FIQ
 272   ldr       x1, ASM_PFX(CommonExceptionEntry)
 273   br        x1
 274
 275 ASM_PFX(SErrorEntry):
 276   sub sp, sp, FP_CONTEXT_SIZE + SYS_CONTEXT_SIZE
 277   ALL_GP_REGS
 278   mov       x0, #EXCEPT_AARCH64_SERROR
 279   ldr       x1, ASM_PFX(CommonExceptionEntry)
 280   br        x1
 281
 282
 283 //
 284 // This gets patched by the C code that patches in the vector table
 285 //
 286 .align 3
 287 ASM_PFX(CommonExceptionEntry):
 288   .dword       ASM_PFX(AsmCommonExceptionEntry)
 289
 290 ASM_PFX(ExceptionHandlersEnd):
 291
 292
 293
 294 //
 295 // This code runs from CpuDxe driver loaded address. It is patched into
 296 // CommonExceptionEntry.
 297 //
 298 ASM_PFX(AsmCommonExceptionEntry):
 299   /* NOTE:
 300      We have to break up the save code because the immidiate value to be used
 301      with the SP is to big to do it all in one step so we need to shuffle the SP
 302      along as we go. (we only have 9bits of immediate to work with) */
 303
 304   // Save the current Stack pointer before we start modifying it.
 305   SAVE_SP
 306
 307   // Preserve the stack pointer we came in with before we modify it
 308   EL1_OR_EL2(x1)
 309 1:mrs      x1, elr_el1   // Exception Link Register
 310   mrs      x2, spsr_el1  // Saved Processor Status Register 32bit
 311   mrs      x3, fpsr      // Floating point Status Register  32bit
 312   mrs      x4, esr_el1   // EL1 Exception syndrome register 32bit
 313   mrs      x5, far_el1   // EL1 Fault Address Register
 314   b        3f
 315
 316 2:mrs      x1, elr_el2   // Exception Link Register
 317   mrs      x2, spsr_el2  // Saved Processor Status Register 32bit
 318   mrs      x3, fpsr      // Floating point Status Register  32bit
 319   mrs      x4, esr_el2   // EL1 Exception syndrome register 32bit
 320   mrs      x5, far_el2   // EL1 Fault Address Register
 321
 322   // Adjust SP to save next set
 323 3:add      sp, sp, FP_CONTEXT_SIZE
 324
 325   // Push FP regs to Stack.
 326   ALL_FP_REGS
 327
 328   // Adjust SP to save next set
 329   add      sp, sp, SYS_CONTEXT_SIZE
 330
 331   // Save the SYS regs
 332   ALL_SYS_REGS
 333
 334   // Point to top of struct after all regs saved
 335   sub      sp, sp, GP_CONTEXT_SIZE + FP_CONTEXT_SIZE + SYS_CONTEXT_SIZE
 336
 337   // x0 still holds the exception type.
 338   // Set x1 to point to the top of our struct on the Stack
 339   mov      x1, sp
 340
 341 // CommonCExceptionHandler (
 342 //   IN     EFI_EXCEPTION_TYPE           ExceptionType,   R0
 343 //   IN OUT EFI_SYSTEM_CONTEXT           SystemContext    R1
 344 //   )
 345
 346   // Call the handler as defined above
 347
 348   // For now we spin in the handler if we received an abort of some kind.
 349   // We do not try to recover.
 350   bl       ASM_PFX(CommonCExceptionHandler) // Call exception handler
 351
 352
 353 // Defines for popping from stack
 354
 355 #undef REG_PAIR
 356 #undef REG_ONE
 357 #define REG_PAIR(REG1, REG2, OFFSET, CONTEXT_SIZE)    ldp REG1, REG2, [sp, #(OFFSET-CONTEXT_SIZE)]
 358
 359 #define REG_ONE(REG1, OFFSET, CONTEXT_SIZE)           ldr REG1, [sp, #(OFFSET-CONTEXT_SIZE)]
 360
 361
 362   // pop all regs and return from exception.
 363   add      sp, sp, GP_CONTEXT_SIZE
 364   ALL_GP_REGS
 365
 366   // Adjust SP to pop next set
 367   add      sp, sp, FP_CONTEXT_SIZE
 368   // Pop FP regs to Stack.
 369   ALL_FP_REGS
 370
 371   // Adjust SP to be where we started from when we came into the handler.
 372   // The handler can not change the SP.
 373   add      sp, sp, SYS_CONTEXT_SIZE
 374
 375   eret
 376
 377 #undef REG_PAIR
 378 #undef REG_ONE