3 Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
4 Copyright (c) 2011, ARM Limited. All rights reserved.
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18 #include <Guid/IdleLoopEvent.h>
20 BOOLEAN mInterruptState
= FALSE
;
24 This function flushes the range of addresses from Start to Start+Length
25 from the processor's data cache. If Start is not aligned to a cache line
26 boundary, then the bytes before Start to the preceding cache line boundary
27 are also flushed. If Start+Length is not aligned to a cache line boundary,
28 then the bytes past Start+Length to the end of the next cache line boundary
29 are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must be
30 supported. If the data cache is fully coherent with all DMA operations, then
31 this function can just return EFI_SUCCESS. If the processor does not support
32 flushing a range of the data cache, then the entire data cache can be flushed.
34 @param This The EFI_CPU_ARCH_PROTOCOL instance.
35 @param Start The beginning physical address to flush from the processor's data
37 @param Length The number of bytes to flush from the processor's data cache. This
38 function may flush more bytes than Length specifies depending upon
39 the granularity of the flush operation that the processor supports.
40 @param FlushType Specifies the type of flush operation to perform.
42 @retval EFI_SUCCESS The address range from Start to Start+Length was flushed from
43 the processor's data cache.
44 @retval EFI_UNSUPPORTEDT The processor does not support the cache flush type specified
46 @retval EFI_DEVICE_ERROR The address range from Start to Start+Length could not be flushed
47 from the processor's data cache.
52 CpuFlushCpuDataCache (
53 IN EFI_CPU_ARCH_PROTOCOL
*This
,
54 IN EFI_PHYSICAL_ADDRESS Start
,
56 IN EFI_CPU_FLUSH_TYPE FlushType
61 case EfiCpuFlushTypeWriteBack
:
62 WriteBackDataCacheRange ((VOID
*)(UINTN
)Start
, (UINTN
)Length
);
64 case EfiCpuFlushTypeInvalidate
:
65 InvalidateDataCacheRange ((VOID
*)(UINTN
)Start
, (UINTN
)Length
);
67 case EfiCpuFlushTypeWriteBackInvalidate
:
68 WriteBackInvalidateDataCacheRange ((VOID
*)(UINTN
)Start
, (UINTN
)Length
);
71 return EFI_INVALID_PARAMETER
;
79 This function enables interrupt processing by the processor.
81 @param This The EFI_CPU_ARCH_PROTOCOL instance.
83 @retval EFI_SUCCESS Interrupts are enabled on the processor.
84 @retval EFI_DEVICE_ERROR Interrupts could not be enabled on the processor.
90 IN EFI_CPU_ARCH_PROTOCOL
*This
93 ArmEnableInterrupts ();
95 mInterruptState
= TRUE
;
101 This function disables interrupt processing by the processor.
103 @param This The EFI_CPU_ARCH_PROTOCOL instance.
105 @retval EFI_SUCCESS Interrupts are disabled on the processor.
106 @retval EFI_DEVICE_ERROR Interrupts could not be disabled on the processor.
111 CpuDisableInterrupt (
112 IN EFI_CPU_ARCH_PROTOCOL
*This
115 ArmDisableInterrupts ();
117 mInterruptState
= FALSE
;
123 This function retrieves the processor's current interrupt state a returns it in
124 State. If interrupts are currently enabled, then TRUE is returned. If interrupts
125 are currently disabled, then FALSE is returned.
127 @param This The EFI_CPU_ARCH_PROTOCOL instance.
128 @param State A pointer to the processor's current interrupt state. Set to TRUE if
129 interrupts are enabled and FALSE if interrupts are disabled.
131 @retval EFI_SUCCESS The processor's current interrupt state was returned in State.
132 @retval EFI_INVALID_PARAMETER State is NULL.
137 CpuGetInterruptState (
138 IN EFI_CPU_ARCH_PROTOCOL
*This
,
143 return EFI_INVALID_PARAMETER
;
146 *State
= mInterruptState
;
152 This function generates an INIT on the processor. If this function succeeds, then the
153 processor will be reset, and control will not be returned to the caller. If InitType is
154 not supported by this processor, or the processor cannot programmatically generate an
155 INIT without help from external hardware, then EFI_UNSUPPORTED is returned. If an error
156 occurs attempting to generate an INIT, then EFI_DEVICE_ERROR is returned.
158 @param This The EFI_CPU_ARCH_PROTOCOL instance.
159 @param InitType The type of processor INIT to perform.
161 @retval EFI_SUCCESS The processor INIT was performed. This return code should never be seen.
162 @retval EFI_UNSUPPORTED The processor INIT operation specified by InitType is not supported
164 @retval EFI_DEVICE_ERROR The processor INIT failed.
170 IN EFI_CPU_ARCH_PROTOCOL
*This
,
171 IN EFI_CPU_INIT_TYPE InitType
174 return EFI_UNSUPPORTED
;
179 CpuRegisterInterruptHandler (
180 IN EFI_CPU_ARCH_PROTOCOL
*This
,
181 IN EFI_EXCEPTION_TYPE InterruptType
,
182 IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
185 return RegisterInterruptHandler (InterruptType
, InterruptHandler
);
191 IN EFI_CPU_ARCH_PROTOCOL
*This
,
192 IN UINT32 TimerIndex
,
193 OUT UINT64
*TimerValue
,
194 OUT UINT64
*TimerPeriod OPTIONAL
197 return EFI_UNSUPPORTED
;
201 Callback function for idle events.
203 @param Event Event whose notification function is being invoked.
204 @param Context The pointer to the notification function's context,
205 which is implementation-dependent.
210 IdleLoopEventCallback (
219 // Globals used to initialize the protocol
221 EFI_HANDLE mCpuHandle
= NULL
;
222 EFI_CPU_ARCH_PROTOCOL mCpu
= {
223 CpuFlushCpuDataCache
,
226 CpuGetInterruptState
,
228 CpuRegisterInterruptHandler
,
230 CpuSetMemoryAttributes
,
232 4, // DmaBufferAlignment
237 IN EFI_HANDLE ImageHandle
,
238 IN EFI_SYSTEM_TABLE
*SystemTable
242 EFI_EVENT IdleLoopEvent
;
244 InitializeExceptions (&mCpu
);
246 Status
= gBS
->InstallMultipleProtocolInterfaces (
248 &gEfiCpuArchProtocolGuid
, &mCpu
,
249 &gVirtualUncachedPagesProtocolGuid
, &gVirtualUncachedPages
,
254 // Make sure GCD and MMU settings match. This API calls gDS->SetMemorySpaceAttributes ()
255 // and that calls EFI_CPU_ARCH_PROTOCOL.SetMemoryAttributes, so this code needs to go
256 // after the protocol is installed
258 SyncCacheConfig (&mCpu
);
260 // If the platform is a MPCore system then install the Configuration Table describing the
261 // secondary core states
263 PublishArmProcessorTable();
267 // Setup a callback for idle events
269 Status
= gBS
->CreateEventEx (
272 IdleLoopEventCallback
,
277 ASSERT_EFI_ERROR (Status
);