3 * Copyright (c) 2011, ARM Limited. All rights reserved.
5 * SPDX-License-Identifier: BSD-2-Clause-Patent
9 #ifndef __ARM_MP_CORE_INFO_GUID_H_
10 #define __ARM_MP_CORE_INFO_GUID_H_
12 #define MAX_CPUS_PER_MPCORE_SYSTEM 0x04
13 #define SCU_CONFIG_REG_OFFSET 0x04
14 #define MPIDR_U_BIT_MASK 0x40000000
21 EFI_PHYSICAL_ADDRESS MailboxSetAddress
;
22 EFI_PHYSICAL_ADDRESS MailboxGetAddress
;
23 EFI_PHYSICAL_ADDRESS MailboxClearAddress
;
24 UINT64 MailboxClearValue
;
35 UINTN CreatorRevision
;
38 } ARM_PROCESSOR_TABLE_HEADER
;
41 ARM_PROCESSOR_TABLE_HEADER Header
;
42 UINTN NumberOfEntries
;
43 ARM_CORE_INFO
*ArmCpus
;
44 } ARM_PROCESSOR_TABLE
;
47 #define ARM_MP_CORE_INFO_GUID \
48 { 0xa4ee0728, 0xe5d7, 0x4ac5, {0xb2, 0x1e, 0x65, 0x8e, 0xd8, 0x57, 0xe8, 0x34} }
50 #define EFI_ARM_PROCESSOR_TABLE_SIGNATURE SIGNATURE_64 ('C', 'P', 'U', 'T', 'A', 'B', 'L', 'E')
51 #define EFI_ARM_PROCESSOR_TABLE_REVISION 0x00010000 //1.0
52 #define EFI_ARM_PROCESSOR_TABLE_OEM_ID SIGNATURE_64('A','R','M',' ', 'L', 't', 'd', ' ')
53 #define EFI_ARM_PROCESSOR_TABLE_OEM_TABLE_ID SIGNATURE_64('V', 'E', 'R', 'S', 'A', 'T', 'I', 'L')
54 #define EFI_ARM_PROCESSOR_TABLE_OEM_REVISION 0x00000001
55 #define EFI_ARM_PROCESSOR_TABLE_CREATOR_ID 0xA5A5A5A5
56 #define EFI_ARM_PROCESSOR_TABLE_CREATOR_REVISION 0x01000001
58 extern EFI_GUID gArmMpCoreInfoGuid
;
60 #endif /* MPCOREINFO_H_ */