1 #------------------------------------------------------------------------------
3 # Copyright (c) 2008-2009 Apple Inc. All rights reserved.
5 # All rights reserved. This program and the accompanying materials
6 # are licensed and made available under the terms and conditions of the BSD License
7 # which accompanies this distribution. The full text of the license may be found at
8 # http://opensource.org/licenses/bsd-license.php
10 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13 #------------------------------------------------------------------------------
17 .globl ASM_PFX(Cp15IdCode)
18 .globl ASM_PFX(Cp15CacheInfo)
19 .globl ASM_PFX(ArmEnableInterrupts)
20 .globl ASM_PFX(ArmDisableInterrupts)
21 .globl ASM_PFX(ArmGetInterruptState)
22 .globl ASM_PFX(ArmEnableFiq)
23 .globl ASM_PFX(ArmDisableFiq)
24 .globl ASM_PFX(ArmGetFiqState)
25 .globl ASM_PFX(ArmInvalidateTlb)
26 .globl ASM_PFX(ArmSetTranslationTableBaseAddress)
27 .globl ASM_PFX(ArmGetTranslationTableBaseAddress)
28 .globl ASM_PFX(ArmSetDomainAccessControl)
29 .globl ASM_PFX(CPSRMaskInsert)
30 .globl ASM_PFX(CPSRRead)
31 .globl ASM_PFX(ReadCCSIDR)
32 .globl ASM_PFX(ReadCLIDR)
35 #------------------------------------------------------------------------------
41 ASM_PFX(Cp15CacheInfo):
45 ASM_PFX(ArmEnableInterrupts):
49 ASM_PFX(ArmDisableInterrupts):
53 ASM_PFX(ArmGetInterruptState):
55 tst R0,#0x80 @Check if IRQ is enabled.
60 ASM_PFX(ArmEnableFiq):
64 ASM_PFX(ArmDisableFiq):
68 ASM_PFX(ArmGetFiqState):
70 tst R0,#0x30 @Check if IRQ is enabled.
75 ASM_PFX(ArmInvalidateTlb):
81 ASM_PFX(ArmSetTranslationTableBaseAddress):
86 ASM_PFX(ArmGetTranslationTableBaseAddress):
91 ASM_PFX(ArmSetDomainAccessControl):
96 ASM_PFX(CPSRMaskInsert): @ on entry, r0 is the mask and r1 is the field to insert
97 stmfd sp!, {r4-r12, lr} @ save all the banked registers
98 mov r3, sp @ copy the stack pointer into a non-banked register
99 mrs r2, cpsr @ read the cpsr
100 bic r2, r2, r0 @ clear mask in the cpsr
101 and r1, r1, r0 @ clear bits outside the mask in the input
102 orr r2, r2, r1 @ set field
103 msr cpsr_cxsf, r2 @ write back cpsr (may have caused a mode switch)
104 mov sp, r3 @ restore stack pointer
105 ldmfd sp!, {r4-r12, lr} @ restore registers
106 bx lr @ return (hopefully thumb-safe!)
113 mcr p15,2,r0,c0,c0,0 @ Write Cache Size Selection Register (CSSELR)
115 mrc p15,1,r0,c0,c0,0 @ Read current CP15 Cache Size ID Register (CCSIDR)
120 mrc p15,1,r0,c0,c0,1 @ Read CP15 Cache Level ID Register
122 ASM_FUNCTION_REMOVE_IF_UNREFERENCED