ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM/ArmPlatform.h

   1 /** @file
   2 *  Header defining Versatile Express constants (Base addresses, sizes, flags)
   3 *
   4 *  Copyright (c) 2011, ARM Limited. All rights reserved.
   5 *
   6 *  This program and the accompanying materials
   7 *  are licensed and made available under the terms and conditions of the BSD License
   8 *  which accompanies this distribution.  The full text of the license may be found at
   9 *  http://opensource.org/licenses/bsd-license.php
  10 *
  11 *  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12 *  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13 *
  14 **/
  15
  16 #ifndef __ARM_VEXPRESS_H__
  17 #define __ARM_VEXPRESS_H__
  18
  19 #include <VExpressMotherBoard.h>
  20
  21 /***********************************************************************************
  22 // Platform Memory Map
  23 ************************************************************************************/
  24
  25 // Can be NOR0, NOR1, DRAM
  26 #define ARM_VE_REMAP_BASE                       0x00000000
  27 #define ARM_VE_REMAP_SZ                         SIZE_64MB
  28
  29 // Motherboard Peripheral and On-chip peripheral
  30 #define ARM_VE_BOARD_PERIPH_BASE                0x1C010000
  31
  32 // NOR Flash 1
  33 // There is typo in the reference manual for the Base address of NOR Flash 1
  34 #define ARM_VE_SMB_NOR0_BASE                    0x08000000
  35 #define ARM_VE_SMB_NOR0_SZ                      SIZE_64MB
  36 // NOR Flash 2
  37 #define ARM_VE_SMB_NOR1_BASE                    0x0C000000
  38 #define ARM_VE_SMB_NOR1_SZ                      SIZE_64MB
  39 // SRAM
  40 #define ARM_VE_SMB_SRAM_BASE                    0x2E000000
  41 #define ARM_VE_SMB_SRAM_SZ                      SIZE_64KB
  42 // USB, Ethernet, VRAM
  43 #define ARM_VE_SMB_PERIPH_BASE                  0x18000000
  44 #define PL111_CLCD_VRAM_MOTHERBOARD_BASE        ARM_VE_SMB_PERIPH_BASE
  45 #define ARM_VE_SMB_PERIPH_SZ                    SIZE_64MB
  46
  47 // DRAM
  48 #define ARM_VE_DRAM_BASE                        PcdGet32 (PcdSystemMemoryBase)
  49 #define ARM_VE_DRAM_SZ                          PcdGet32 (PcdSystemMemorySize)
  50
  51 // This can be any value since we only support motherboard PL111
  52 #define LCD_VRAM_CORE_TILE_BASE                 0x00000000
  53
  54 // On-chip peripherals (Snoop Control Unit etc...)
  55 #define ARM_VE_ON_CHIP_PERIPH_BASE              0x2C000000
  56 // Note: The TRM says not all the peripherals are implemented
  57 #define ARM_VE_ON_CHIP_PERIPH_SZ                SIZE_256MB
  58
  59
  60 // External AXI between daughterboards (Logic Tile)
  61 #define ARM_VE_EXT_AXI_BASE                     0x2E010000 // Not modelled
  62 #define ARM_VE_EXT_AXI_SZ                       0x20000000  /* 512 MB */
  63
  64 /***********************************************************************************
  65 // Memory-mapped peripherals
  66 ************************************************************************************/
  67
  68 // Note: There is no System Configuration Controller on the Model,
  69 // So do dummy definition to avoid build failures
  70 #define ARM_VE_SCC_BASE
  71
  72 // SP810 Controller
  73 #define SP810_CTRL_BASE                         0x1C020000
  74
  75 // PL111 Colour LCD Controller
  76 #define PL111_CLCD_SITE                         ARM_VE_MOTHERBOARD_SITE
  77 #define PL111_CLCD_MOTHERBOARD_VIDEO_MODE_OSC_ID  1
  78 #define PL111_CLCD_CORE_TILE_VIDEO_MODE_OSC_ID  1
  79
  80 // VRAM offset for the PL111 Colour LCD Controller on the motherboard
  81 #define VRAM_MOTHERBOARD_BASE                     (ARM_VE_SMB_PERIPH_BASE   + 0x00000)
  82
  83 #endif