3 * Copyright (c) 2011, ARM Limited. All rights reserved.
5 * This program and the accompanying materials
6 * are licensed and made available under the terms and conditions of the BSD License
7 * which accompanies this distribution. The full text of the license may be found at
8 * http://opensource.org/licenses/bsd-license.php
10 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15 #include <Library/IoLib.h>
16 #include <Library/ArmPlatformLib.h>
17 #include <Library/DebugLib.h>
18 #include <Library/PcdLib.h>
20 #include <Drivers/SP804Timer.h>
22 #include <Ppi/ArmMpCoreInfo.h>
24 #include <ArmPlatform.h>
26 ARM_CORE_INFO mVersatileExpressMpCoreInfoTable
[] = {
31 // MP Core MailBox Set/Get/Clear Addresses and Clear Value
32 (EFI_PHYSICAL_ADDRESS
)ARM_VE_SYS_FLAGS_REG
,
33 (EFI_PHYSICAL_ADDRESS
)ARM_VE_SYS_FLAGS_SET_REG
,
34 (EFI_PHYSICAL_ADDRESS
)ARM_VE_SYS_FLAGS_CLR_REG
,
41 // MP Core MailBox Set/Get/Clear Addresses and Clear Value
42 (EFI_PHYSICAL_ADDRESS
)ARM_VE_SYS_FLAGS_REG
,
43 (EFI_PHYSICAL_ADDRESS
)ARM_VE_SYS_FLAGS_SET_REG
,
44 (EFI_PHYSICAL_ADDRESS
)ARM_VE_SYS_FLAGS_CLR_REG
,
51 // MP Core MailBox Set/Get/Clear Addresses and Clear Value
52 (EFI_PHYSICAL_ADDRESS
)ARM_VE_SYS_FLAGS_REG
,
53 (EFI_PHYSICAL_ADDRESS
)ARM_VE_SYS_FLAGS_SET_REG
,
54 (EFI_PHYSICAL_ADDRESS
)ARM_VE_SYS_FLAGS_CLR_REG
,
61 // MP Core MailBox Set/Get/Clear Addresses and Clear Value
62 (EFI_PHYSICAL_ADDRESS
)ARM_VE_SYS_FLAGS_REG
,
63 (EFI_PHYSICAL_ADDRESS
)ARM_VE_SYS_FLAGS_SET_REG
,
64 (EFI_PHYSICAL_ADDRESS
)ARM_VE_SYS_FLAGS_CLR_REG
,
70 Return if Trustzone is supported by your platform
72 A non-zero value must be returned if you want to support a Secure World on your platform.
73 ArmVExpressTrustzoneInit() will later set up the secure regions.
74 This function can return 0 even if Trustzone is supported by your processor. In this case,
75 the platform will continue to run in Secure World.
77 @return A non-zero value if Trustzone supported.
81 ArmPlatformTrustzoneSupported (
85 // Not supported yet but model does have Secure SRAM (but no TZPC/TZASC) so we could support it
90 Return the current Boot Mode
92 This function returns the boot reason on the platform
94 @return Return the current Boot Mode of the platform
98 ArmPlatformGetBootMode (
102 return BOOT_WITH_FULL_CONFIGURATION
;
106 Remap the memory at 0x0
108 Some platform requires or gives the ability to remap the memory at the address 0x0.
109 This function can do nothing if this feature is not relevant to your platform.
113 ArmPlatformBootRemapping (
117 // Disable memory remapping and return to normal mapping
118 MmioOr32 (SP810_CTRL_BASE
, BIT8
);
122 Initialize controllers that must setup in the normal world
124 This function is called by the ArmPlatformPkg/Pei or ArmPlatformPkg/Pei/PlatformPeim
129 ArmPlatformNormalInitialize (
133 // Nothing to do here
137 Initialize the system (or sometimes called permanent) memory
139 This memory is generally represented by the DRAM.
143 ArmPlatformInitializeSystemMemory (
147 // Configure periodic timer (TIMER0) for 1MHz operation
148 MmioOr32 (SP810_CTRL_BASE
+ SP810_SYS_CTRL_REG
, SP810_SYS_CTRL_TIMER0_TIMCLK
);
149 // Configure 1MHz clock
150 MmioOr32 (SP810_CTRL_BASE
+ SP810_SYS_CTRL_REG
, SP810_SYS_CTRL_TIMER1_TIMCLK
);
151 // configure SP810 to use 1MHz clock and disable
152 MmioAndThenOr32 (SP810_CTRL_BASE
+ SP810_SYS_CTRL_REG
, ~SP810_SYS_CTRL_TIMER2_EN
, SP810_SYS_CTRL_TIMER2_TIMCLK
);
153 // Configure SP810 to use 1MHz clock and disable
154 MmioAndThenOr32 (SP810_CTRL_BASE
+ SP810_SYS_CTRL_REG
, ~SP810_SYS_CTRL_TIMER3_EN
, SP810_SYS_CTRL_TIMER3_TIMCLK
);
158 PrePeiCoreGetMpCoreInfo (
159 OUT UINTN
*CoreCount
,
160 OUT ARM_CORE_INFO
**ArmCoreTable
165 ProcType
= MmioRead32 (ARM_VE_SYS_PROCID0_REG
) & ARM_VE_SYS_PROC_ID_MASK
;
166 if (ProcType
== ARM_VE_SYS_PROC_ID_CORTEX_A9
) {
167 // Only support one cluster
168 *CoreCount
= ArmGetCpuCountPerCluster ();
169 *ArmCoreTable
= mVersatileExpressMpCoreInfoTable
;
172 return EFI_UNSUPPORTED
;
176 // Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore
177 EFI_GUID mArmMpCoreInfoPpiGuid
= ARM_MP_CORE_INFO_PPI_GUID
;
178 ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi
= { PrePeiCoreGetMpCoreInfo
};
180 EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable
[] = {
182 EFI_PEI_PPI_DESCRIPTOR_PPI
,
183 &mArmMpCoreInfoPpiGuid
,
189 ArmPlatformGetPlatformPpiList (
190 OUT UINTN
*PpiListSize
,
191 OUT EFI_PEI_PPI_DESCRIPTOR
**PpiList
194 *PpiListSize
= sizeof(gPlatformPpiTable
);
195 *PpiList
= gPlatformPpiTable
;