]> git.proxmox.com Git - mirror_edk2.git/blob - ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.c
projects / mirror_edk2.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
ArmVirtualizationPkg/PciHostBridgeDxe: handle 0 in GetProposedResources()
[mirror_edk2.git] / ArmPlatformPkg / ArmVirtualizationPkg / PciHostBridgeDxe / PciHostBridge.c
1 /** @file
2 Provides the basic interfaces to abstract a PCI Host Bridge Resource Allocation
3
4 Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials are
6 licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #include "PciHostBridge.h"
16
17 //
18 // Hard code: Root Bridge Number within the host bridge
19 // Root Bridge's attribute
20 // Root Bridge's device path
21 // Root Bridge's resource aperture
22 //
23 UINTN RootBridgeNumber[1] = { 1 };
24
25 UINT64 RootBridgeAttribute[1][1] = { { EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM } };
26
27 EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath[1][1] = {
28 {
29 {
30 {
31 {
32 ACPI_DEVICE_PATH,
33 ACPI_DP,
34 {
35 (UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),
36 (UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8)
37 }
38 },
39 EISA_PNP_ID(0x0A03),
40 0
41 },
42
43 {
44 END_DEVICE_PATH_TYPE,
45 END_ENTIRE_DEVICE_PATH_SUBTYPE,
46 {
47 END_DEVICE_PATH_LENGTH,
48 0
49 }
50 }
51 }
52 }
53 };
54
55 STATIC PCI_ROOT_BRIDGE_RESOURCE_APERTURE mResAperture[1][1];
56
57 EFI_HANDLE mDriverImageHandle;
58
59 PCI_HOST_BRIDGE_INSTANCE mPciHostBridgeInstanceTemplate = {
60 PCI_HOST_BRIDGE_SIGNATURE, // Signature
61 NULL, // HostBridgeHandle
62 0, // RootBridgeNumber
63 {NULL, NULL}, // Head
64 FALSE, // ResourceSubiteed
65 TRUE, // CanRestarted
66 {
67 NotifyPhase,
68 GetNextRootBridge,
69 GetAttributes,
70 StartBusEnumeration,
71 SetBusNumbers,
72 SubmitResources,
73 GetProposedResources,
74 PreprocessController
75 }
76 };
77
78 //
79 // Implementation
80 //
81
82 /**
83 Entry point of this driver
84
85 @param ImageHandle Handle of driver image
86 @param SystemTable Point to EFI_SYSTEM_TABLE
87
88 @retval EFI_ABORTED PCI host bridge not present
89 @retval EFI_OUT_OF_RESOURCES Can not allocate memory resource
90 @retval EFI_DEVICE_ERROR Can not install the protocol instance
91 @retval EFI_SUCCESS Success to initialize the Pci host bridge.
92 **/
93 EFI_STATUS
94 EFIAPI
95 InitializePciHostBridge (
96 IN EFI_HANDLE ImageHandle,
97 IN EFI_SYSTEM_TABLE *SystemTable
98 )
99 {
100 UINT64 MmioAttributes;
101 EFI_STATUS Status;
102 UINTN Loop1;
103 UINTN Loop2;
104 PCI_HOST_BRIDGE_INSTANCE *HostBridge;
105 PCI_ROOT_BRIDGE_INSTANCE *PrivateData;
106
107 if (PcdGet64 (PcdPciExpressBaseAddress) == 0) {
108 DEBUG ((EFI_D_INFO, "%a: PCI host bridge not present\n", __FUNCTION__));
109 return EFI_ABORTED;
110 }
111
112 mDriverImageHandle = ImageHandle;
113
114 mResAperture[0][0].BusBase = PcdGet32 (PcdPciBusMin);
115 mResAperture[0][0].BusLimit = PcdGet32 (PcdPciBusMax);
116
117 mResAperture[0][0].MemBase = PcdGet32 (PcdPciMmio32Base);
118 mResAperture[0][0].MemLimit = (UINT64)PcdGet32 (PcdPciMmio32Base) +
119 PcdGet32 (PcdPciMmio32Size) - 1;
120
121 mResAperture[0][0].IoBase = PcdGet64 (PcdPciIoBase);
122 mResAperture[0][0].IoLimit = PcdGet64 (PcdPciIoBase) +
123 PcdGet64 (PcdPciIoSize) - 1;
124 mResAperture[0][0].IoTranslation = PcdGet64 (PcdPciIoTranslation);
125
126 //
127 // Add IO and MMIO memory space, so that resources can be allocated in the
128 // EfiPciHostBridgeAllocateResources phase.
129 //
130 Status = gDS->AddIoSpace (
131 EfiGcdIoTypeIo,
132 PcdGet64 (PcdPciIoBase),
133 PcdGet64 (PcdPciIoSize)
134 );
135 ASSERT_EFI_ERROR (Status);
136
137 MmioAttributes = FeaturePcdGet (PcdKludgeMapPciMmioAsCached) ?
138 EFI_MEMORY_WB : EFI_MEMORY_UC;
139
140 Status = gDS->AddMemorySpace (
141 EfiGcdMemoryTypeMemoryMappedIo,
142 PcdGet32 (PcdPciMmio32Base),
143 PcdGet32 (PcdPciMmio32Size),
144 MmioAttributes
145 );
146 if (EFI_ERROR (Status)) {
147 DEBUG ((EFI_D_ERROR, "%a: AddMemorySpace: %r\n", __FUNCTION__, Status));
148 return Status;
149 }
150
151 Status = gDS->SetMemorySpaceAttributes (
152 PcdGet32 (PcdPciMmio32Base),
153 PcdGet32 (PcdPciMmio32Size),
154 MmioAttributes
155 );
156 if (EFI_ERROR (Status)) {
157 DEBUG ((EFI_D_ERROR, "%a: SetMemorySpaceAttributes: %r\n", __FUNCTION__,
158 Status));
159 return Status;
160 }
161
162 //
163 // Create Host Bridge Device Handle
164 //
165 for (Loop1 = 0; Loop1 < HOST_BRIDGE_NUMBER; Loop1++) {
166 HostBridge = AllocateCopyPool (sizeof(PCI_HOST_BRIDGE_INSTANCE), &mPciHostBridgeInstanceTemplate);
167 if (HostBridge == NULL) {
168 return EFI_OUT_OF_RESOURCES;
169 }
170
171 HostBridge->RootBridgeNumber = RootBridgeNumber[Loop1];
172 InitializeListHead (&HostBridge->Head);
173
174 Status = gBS->InstallMultipleProtocolInterfaces (
175 &HostBridge->HostBridgeHandle,
176 &gEfiPciHostBridgeResourceAllocationProtocolGuid, &HostBridge->ResAlloc,
177 NULL
178 );
179 if (EFI_ERROR (Status)) {
180 FreePool (HostBridge);
181 return EFI_DEVICE_ERROR;
182 }
183
184 //
185 // Create Root Bridge Device Handle in this Host Bridge
186 //
187
188 for (Loop2 = 0; Loop2 < HostBridge->RootBridgeNumber; Loop2++) {
189 PrivateData = AllocateZeroPool (sizeof(PCI_ROOT_BRIDGE_INSTANCE));
190 if (PrivateData == NULL) {
191 return EFI_OUT_OF_RESOURCES;
192 }
193
194 PrivateData->Signature = PCI_ROOT_BRIDGE_SIGNATURE;
195 PrivateData->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath[Loop1][Loop2];
196
197 RootBridgeConstructor (
198 &PrivateData->Io,
199 HostBridge->HostBridgeHandle,
200 RootBridgeAttribute[Loop1][Loop2],
201 &mResAperture[Loop1][Loop2]
202 );
203
204 Status = gBS->InstallMultipleProtocolInterfaces(
205 &PrivateData->Handle,
206 &gEfiDevicePathProtocolGuid, PrivateData->DevicePath,
207 &gEfiPciRootBridgeIoProtocolGuid, &PrivateData->Io,
208 NULL
209 );
210 if (EFI_ERROR (Status)) {
211 FreePool(PrivateData);
212 return EFI_DEVICE_ERROR;
213 }
214
215 InsertTailList (&HostBridge->Head, &PrivateData->Link);
216 }
217 }
218
219 return EFI_SUCCESS;
220 }
221
222
223 /**
224 These are the notifications from the PCI bus driver that it is about to enter a certain
225 phase of the PCI enumeration process.
226
227 This member function can be used to notify the host bridge driver to perform specific actions,
228 including any chipset-specific initialization, so that the chipset is ready to enter the next phase.
229 Eight notification points are defined at this time. See belows:
230 EfiPciHostBridgeBeginEnumeration Resets the host bridge PCI apertures and internal data
231 structures. The PCI enumerator should issue this notification
232 before starting a fresh enumeration process. Enumeration cannot
233 be restarted after sending any other notification such as
234 EfiPciHostBridgeBeginBusAllocation.
235 EfiPciHostBridgeBeginBusAllocation The bus allocation phase is about to begin. No specific action is
236 required here. This notification can be used to perform any
237 chipset-specific programming.
238 EfiPciHostBridgeEndBusAllocation The bus allocation and bus programming phase is complete. No
239 specific action is required here. This notification can be used to
240 perform any chipset-specific programming.
241 EfiPciHostBridgeBeginResourceAllocation
242 The resource allocation phase is about to begin. No specific
243 action is required here. This notification can be used to perform
244 any chipset-specific programming.
245 EfiPciHostBridgeAllocateResources Allocates resources per previously submitted requests for all the PCI
246 root bridges. These resource settings are returned on the next call to
247 GetProposedResources(). Before calling NotifyPhase() with a Phase of
248 EfiPciHostBridgeAllocateResource, the PCI bus enumerator is responsible
249 for gathering I/O and memory requests for
250 all the PCI root bridges and submitting these requests using
251 SubmitResources(). This function pads the resource amount
252 to suit the root bridge hardware, takes care of dependencies between
253 the PCI root bridges, and calls the Global Coherency Domain (GCD)
254 with the allocation request. In the case of padding, the allocated range
255 could be bigger than what was requested.
256 EfiPciHostBridgeSetResources Programs the host bridge hardware to decode previously allocated
257 resources (proposed resources) for all the PCI root bridges. After the
258 hardware is programmed, reassigning resources will not be supported.
259 The bus settings are not affected.
260 EfiPciHostBridgeFreeResources Deallocates resources that were previously allocated for all the PCI
261 root bridges and resets the I/O and memory apertures to their initial
262 state. The bus settings are not affected. If the request to allocate
263 resources fails, the PCI enumerator can use this notification to
264 deallocate previous resources, adjust the requests, and retry
265 allocation.
266 EfiPciHostBridgeEndResourceAllocation The resource allocation phase is completed. No specific action is
267 required here. This notification can be used to perform any chipsetspecific
268 programming.
269
270 @param[in] This The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
271 @param[in] Phase The phase during enumeration
272
273 @retval EFI_NOT_READY This phase cannot be entered at this time. For example, this error
274 is valid for a Phase of EfiPciHostBridgeAllocateResources if
275 SubmitResources() has not been called for one or more
276 PCI root bridges before this call
277 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error. This error is valid
278 for a Phase of EfiPciHostBridgeSetResources.
279 @retval EFI_INVALID_PARAMETER Invalid phase parameter
280 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
281 This error is valid for a Phase of EfiPciHostBridgeAllocateResources if the
282 previously submitted resource requests cannot be fulfilled or
283 were only partially fulfilled.
284 @retval EFI_SUCCESS The notification was accepted without any errors.
285
286 **/
287 EFI_STATUS
288 EFIAPI
289 NotifyPhase(
290 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
291 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase
292 )
293 {
294 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
295 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
296 PCI_RESOURCE_TYPE Index;
297 LIST_ENTRY *List;
298 EFI_PHYSICAL_ADDRESS BaseAddress;
299 UINT64 AddrLen;
300 UINTN BitsOfAlignment;
301 EFI_STATUS Status;
302 EFI_STATUS ReturnStatus;
303
304 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
305
306 switch (Phase) {
307
308 case EfiPciHostBridgeBeginEnumeration:
309 if (HostBridgeInstance->CanRestarted) {
310 //
311 // Reset the Each Root Bridge
312 //
313 List = HostBridgeInstance->Head.ForwardLink;
314
315 while (List != &HostBridgeInstance->Head) {
316 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
317 for (Index = TypeIo; Index < TypeMax; Index++) {
318 RootBridgeInstance->ResAllocNode[Index].Type = Index;
319 RootBridgeInstance->ResAllocNode[Index].Base = 0;
320 RootBridgeInstance->ResAllocNode[Index].Length = 0;
321 RootBridgeInstance->ResAllocNode[Index].Status = ResNone;
322 }
323
324 List = List->ForwardLink;
325 }
326
327 HostBridgeInstance->ResourceSubmited = FALSE;
328 HostBridgeInstance->CanRestarted = TRUE;
329 } else {
330 //
331 // Can not restart
332 //
333 return EFI_NOT_READY;
334 }
335 break;
336
337 case EfiPciHostBridgeEndEnumeration:
338 break;
339
340 case EfiPciHostBridgeBeginBusAllocation:
341 //
342 // No specific action is required here, can perform any chipset specific programing
343 //
344 HostBridgeInstance->CanRestarted = FALSE;
345 break;
346
347 case EfiPciHostBridgeEndBusAllocation:
348 //
349 // No specific action is required here, can perform any chipset specific programing
350 //
351 //HostBridgeInstance->CanRestarted = FALSE;
352 break;
353
354 case EfiPciHostBridgeBeginResourceAllocation:
355 //
356 // No specific action is required here, can perform any chipset specific programing
357 //
358 //HostBridgeInstance->CanRestarted = FALSE;
359 break;
360
361 case EfiPciHostBridgeAllocateResources:
362 ReturnStatus = EFI_SUCCESS;
363 if (HostBridgeInstance->ResourceSubmited) {
364 //
365 // Take care of the resource dependencies between the root bridges
366 //
367 List = HostBridgeInstance->Head.ForwardLink;
368
369 while (List != &HostBridgeInstance->Head) {
370 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
371 for (Index = TypeIo; Index < TypeBus; Index++) {
372 if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
373
374 AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
375
376 //
377 // Get the number of '1' in Alignment.
378 //
379 BitsOfAlignment = (UINTN) (HighBitSet64 (RootBridgeInstance->ResAllocNode[Index].Alignment) + 1);
380
381 switch (Index) {
382
383 case TypeIo:
384 //
385 // It is impossible for this chipset to align 0xFFFF for IO16
386 // So clear it
387 //
388 if (BitsOfAlignment >= 16) {
389 BitsOfAlignment = 0;
390 }
391
392 BaseAddress = mResAperture[0][0].IoLimit;
393 Status = gDS->AllocateIoSpace (
394 EfiGcdAllocateMaxAddressSearchTopDown,
395 EfiGcdIoTypeIo,
396 BitsOfAlignment,
397 AddrLen,
398 &BaseAddress,
399 mDriverImageHandle,
400 NULL
401 );
402
403 if (!EFI_ERROR (Status)) {
404 RootBridgeInstance->ResAllocNode[Index].Base = (UINTN)BaseAddress;
405 RootBridgeInstance->ResAllocNode[Index].Status = ResAllocated;
406 } else {
407 ReturnStatus = Status;
408 if (Status != EFI_OUT_OF_RESOURCES) {
409 RootBridgeInstance->ResAllocNode[Index].Length = 0;
410 }
411 }
412
413 break;
414
415
416 case TypeMem32:
417 //
418 // It is impossible for this chipset to align 0xFFFFFFFF for Mem32
419 // So clear it
420 //
421
422 if (BitsOfAlignment >= 32) {
423 BitsOfAlignment = 0;
424 }
425
426 BaseAddress = mResAperture[0][0].MemLimit;
427 Status = gDS->AllocateMemorySpace (
428 EfiGcdAllocateMaxAddressSearchTopDown,
429 EfiGcdMemoryTypeMemoryMappedIo,
430 BitsOfAlignment,
431 AddrLen,
432 &BaseAddress,
433 mDriverImageHandle,
434 NULL
435 );
436
437 if (!EFI_ERROR (Status)) {
438 // We were able to allocate the PCI memory
439 RootBridgeInstance->ResAllocNode[Index].Base = (UINTN)BaseAddress;
440 RootBridgeInstance->ResAllocNode[Index].Status = ResAllocated;
441
442 } else {
443 // Not able to allocate enough PCI memory
444 ReturnStatus = Status;
445
446 if (Status != EFI_OUT_OF_RESOURCES) {
447 RootBridgeInstance->ResAllocNode[Index].Length = 0;
448 }
449 ASSERT (FALSE);
450 }
451 break;
452
453 case TypePMem32:
454 case TypeMem64:
455 case TypePMem64:
456 ReturnStatus = EFI_ABORTED;
457 break;
458 default:
459 ASSERT (FALSE);
460 break;
461 }; //end switch
462 }
463 }
464
465 List = List->ForwardLink;
466 }
467
468 return ReturnStatus;
469
470 } else {
471 return EFI_NOT_READY;
472 }
473 break;
474
475 case EfiPciHostBridgeSetResources:
476 break;
477
478 case EfiPciHostBridgeFreeResources:
479 ReturnStatus = EFI_SUCCESS;
480 List = HostBridgeInstance->Head.ForwardLink;
481 while (List != &HostBridgeInstance->Head) {
482 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
483 for (Index = TypeIo; Index < TypeBus; Index++) {
484 if (RootBridgeInstance->ResAllocNode[Index].Status == ResAllocated) {
485 AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
486 BaseAddress = RootBridgeInstance->ResAllocNode[Index].Base;
487 switch (Index) {
488
489 case TypeIo:
490 Status = gDS->FreeIoSpace (BaseAddress, AddrLen);
491 if (EFI_ERROR (Status)) {
492 ReturnStatus = Status;
493 }
494 break;
495
496 case TypeMem32:
497 Status = gDS->FreeMemorySpace (BaseAddress, AddrLen);
498 if (EFI_ERROR (Status)) {
499 ReturnStatus = Status;
500 }
501 break;
502
503 case TypePMem32:
504 break;
505
506 case TypeMem64:
507 break;
508
509 case TypePMem64:
510 break;
511
512 default:
513 ASSERT (FALSE);
514 break;
515
516 }; //end switch
517 RootBridgeInstance->ResAllocNode[Index].Type = Index;
518 RootBridgeInstance->ResAllocNode[Index].Base = 0;
519 RootBridgeInstance->ResAllocNode[Index].Length = 0;
520 RootBridgeInstance->ResAllocNode[Index].Status = ResNone;
521 }
522 }
523
524 List = List->ForwardLink;
525 }
526
527 HostBridgeInstance->ResourceSubmited = FALSE;
528 HostBridgeInstance->CanRestarted = TRUE;
529 return ReturnStatus;
530
531 case EfiPciHostBridgeEndResourceAllocation:
532 HostBridgeInstance->CanRestarted = FALSE;
533 break;
534
535 default:
536 return EFI_INVALID_PARAMETER;
537 }
538
539 return EFI_SUCCESS;
540 }
541
542 /**
543 Return the device handle of the next PCI root bridge that is associated with this Host Bridge.
544
545 This function is called multiple times to retrieve the device handles of all the PCI root bridges that
546 are associated with this PCI host bridge. Each PCI host bridge is associated with one or more PCI
547 root bridges. On each call, the handle that was returned by the previous call is passed into the
548 interface, and on output the interface returns the device handle of the next PCI root bridge. The
549 caller can use the handle to obtain the instance of the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
550 for that root bridge. When there are no more PCI root bridges to report, the interface returns
551 EFI_NOT_FOUND. A PCI enumerator must enumerate the PCI root bridges in the order that they
552 are returned by this function.
553 For D945 implementation, there is only one root bridge in PCI host bridge.
554
555 @param[in] This The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
556 @param[in, out] RootBridgeHandle Returns the device handle of the next PCI root bridge.
557
558 @retval EFI_SUCCESS If parameter RootBridgeHandle = NULL, then return the first Rootbridge handle of the
559 specific Host bridge and return EFI_SUCCESS.
560 @retval EFI_NOT_FOUND Can not find the any more root bridge in specific host bridge.
561 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not an EFI_HANDLE that was
562 returned on a previous call to GetNextRootBridge().
563 **/
564 EFI_STATUS
565 EFIAPI
566 GetNextRootBridge(
567 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
568 IN OUT EFI_HANDLE *RootBridgeHandle
569 )
570 {
571 BOOLEAN NoRootBridge;
572 LIST_ENTRY *List;
573 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
574 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
575
576 NoRootBridge = TRUE;
577 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
578 List = HostBridgeInstance->Head.ForwardLink;
579
580
581 while (List != &HostBridgeInstance->Head) {
582 NoRootBridge = FALSE;
583 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
584 if (*RootBridgeHandle == NULL) {
585 //
586 // Return the first Root Bridge Handle of the Host Bridge
587 //
588 *RootBridgeHandle = RootBridgeInstance->Handle;
589 return EFI_SUCCESS;
590 } else {
591 if (*RootBridgeHandle == RootBridgeInstance->Handle) {
592 //
593 // Get next if have
594 //
595 List = List->ForwardLink;
596 if (List!=&HostBridgeInstance->Head) {
597 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
598 *RootBridgeHandle = RootBridgeInstance->Handle;
599 return EFI_SUCCESS;
600 } else {
601 return EFI_NOT_FOUND;
602 }
603 }
604 }
605
606 List = List->ForwardLink;
607 } //end while
608
609 if (NoRootBridge) {
610 return EFI_NOT_FOUND;
611 } else {
612 return EFI_INVALID_PARAMETER;
613 }
614 }
615
616 /**
617 Returns the allocation attributes of a PCI root bridge.
618
619 The function returns the allocation attributes of a specific PCI root bridge. The attributes can vary
620 from one PCI root bridge to another. These attributes are different from the decode-related
621 attributes that are returned by the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.GetAttributes() member function. The
622 RootBridgeHandle parameter is used to specify the instance of the PCI root bridge. The device
623 handles of all the root bridges that are associated with this host bridge must be obtained by calling
624 GetNextRootBridge(). The attributes are static in the sense that they do not change during or
625 after the enumeration process. The hardware may provide mechanisms to change the attributes on
626 the fly, but such changes must be completed before EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is
627 installed. The permitted values of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ATTRIBUTES are defined in
628 "Related Definitions" below. The caller uses these attributes to combine multiple resource requests.
629 For example, if the flag EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM is set, the PCI bus enumerator needs to
630 include requests for the prefetchable memory in the nonprefetchable memory pool and not request any
631 prefetchable memory.
632 Attribute Description
633 ------------------------------------ ----------------------------------------------------------------------
634 EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM If this bit is set, then the PCI root bridge does not support separate
635 windows for nonprefetchable and prefetchable memory. A PCI bus
636 driver needs to include requests for prefetchable memory in the
637 nonprefetchable memory pool.
638
639 EFI_PCI_HOST_BRIDGE_MEM64_DECODE If this bit is set, then the PCI root bridge supports 64-bit memory
640 windows. If this bit is not set, the PCI bus driver needs to include
641 requests for a 64-bit memory address in the corresponding 32-bit
642 memory pool.
643
644 @param[in] This The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
645 @param[in] RootBridgeHandle The device handle of the PCI root bridge in which the caller is interested. Type
646 EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.
647 @param[out] Attributes The pointer to attribte of root bridge, it is output parameter
648
649 @retval EFI_INVALID_PARAMETER Attribute pointer is NULL
650 @retval EFI_INVALID_PARAMETER RootBridgehandle is invalid.
651 @retval EFI_SUCCESS Success to get attribute of interested root bridge.
652
653 **/
654 EFI_STATUS
655 EFIAPI
656 GetAttributes(
657 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
658 IN EFI_HANDLE RootBridgeHandle,
659 OUT UINT64 *Attributes
660 )
661 {
662 LIST_ENTRY *List;
663 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
664 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
665
666 if (Attributes == NULL) {
667 return EFI_INVALID_PARAMETER;
668 }
669
670 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
671 List = HostBridgeInstance->Head.ForwardLink;
672
673 while (List != &HostBridgeInstance->Head) {
674 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
675 if (RootBridgeHandle == RootBridgeInstance->Handle) {
676 *Attributes = RootBridgeInstance->RootBridgeAttrib;
677 return EFI_SUCCESS;
678 }
679 List = List->ForwardLink;
680 }
681
682 //
683 // RootBridgeHandle is not an EFI_HANDLE
684 // that was returned on a previous call to GetNextRootBridge()
685 //
686 return EFI_INVALID_PARAMETER;
687 }
688
689 /**
690 Sets up the specified PCI root bridge for the bus enumeration process.
691
692 This member function sets up the root bridge for bus enumeration and returns the PCI bus range
693 over which the search should be performed in ACPI 2.0 resource descriptor format.
694
695 @param[in] This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance.
696 @param[in] RootBridgeHandle The PCI Root Bridge to be set up.
697 @param[out] Configuration Pointer to the pointer to the PCI bus resource descriptor.
698
699 @retval EFI_INVALID_PARAMETER Invalid Root bridge's handle
700 @retval EFI_OUT_OF_RESOURCES Fail to allocate ACPI resource descriptor tag.
701 @retval EFI_SUCCESS Sucess to allocate ACPI resource descriptor.
702
703 **/
704 EFI_STATUS
705 EFIAPI
706 StartBusEnumeration(
707 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
708 IN EFI_HANDLE RootBridgeHandle,
709 OUT VOID **Configuration
710 )
711 {
712 LIST_ENTRY *List;
713 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
714 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
715 VOID *Buffer;
716 UINT8 *Temp;
717 UINT64 BusStart;
718 UINT64 BusEnd;
719
720 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
721 List = HostBridgeInstance->Head.ForwardLink;
722
723 while (List != &HostBridgeInstance->Head) {
724 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
725 if (RootBridgeHandle == RootBridgeInstance->Handle) {
726 //
727 // Set up the Root Bridge for Bus Enumeration
728 //
729 BusStart = RootBridgeInstance->BusBase;
730 BusEnd = RootBridgeInstance->BusLimit;
731 //
732 // Program the Hardware(if needed) if error return EFI_DEVICE_ERROR
733 //
734
735 Buffer = AllocatePool (sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof(EFI_ACPI_END_TAG_DESCRIPTOR));
736 if (Buffer == NULL) {
737 return EFI_OUT_OF_RESOURCES;
738 }
739
740 Temp = (UINT8 *)Buffer;
741
742 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->Desc = 0x8A;
743 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->Len = 0x2B;
744 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->ResType = 2;
745 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->GenFlag = 0;
746 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->SpecificFlag = 0;
747 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrSpaceGranularity = 0;
748 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrRangeMin = BusStart;
749 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrRangeMax = 0;
750 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrTranslationOffset = 0;
751 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrLen = BusEnd - BusStart + 1;
752
753 Temp = Temp + sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
754 ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79;
755 ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Checksum = 0x0;
756
757 *Configuration = Buffer;
758 return EFI_SUCCESS;
759 }
760 List = List->ForwardLink;
761 }
762
763 return EFI_INVALID_PARAMETER;
764 }
765
766 /**
767 Programs the PCI root bridge hardware so that it decodes the specified PCI bus range.
768
769 This member function programs the specified PCI root bridge to decode the bus range that is
770 specified by the input parameter Configuration.
771 The bus range information is specified in terms of the ACPI 2.0 resource descriptor format.
772
773 @param[in] This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance
774 @param[in] RootBridgeHandle The PCI Root Bridge whose bus range is to be programmed
775 @param[in] Configuration The pointer to the PCI bus resource descriptor
776
777 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
778 @retval EFI_INVALID_PARAMETER Configuration is NULL.
779 @retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI 2.0 resource descriptor.
780 @retval EFI_INVALID_PARAMETER Configuration does not include a valid ACPI 2.0 bus resource descriptor.
781 @retval EFI_INVALID_PARAMETER Configuration includes valid ACPI 2.0 resource descriptors other than
782 bus descriptors.
783 @retval EFI_INVALID_PARAMETER Configuration contains one or more invalid ACPI resource descriptors.
784 @retval EFI_INVALID_PARAMETER "Address Range Minimum" is invalid for this root bridge.
785 @retval EFI_INVALID_PARAMETER "Address Range Length" is invalid for this root bridge.
786 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error.
787 @retval EFI_SUCCESS The bus range for the PCI root bridge was programmed.
788
789 **/
790 EFI_STATUS
791 EFIAPI
792 SetBusNumbers(
793 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
794 IN EFI_HANDLE RootBridgeHandle,
795 IN VOID *Configuration
796 )
797 {
798 LIST_ENTRY *List;
799 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
800 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
801 UINT8 *Ptr;
802 UINTN BusStart;
803 UINTN BusEnd;
804 UINTN BusLen;
805
806 if (Configuration == NULL) {
807 return EFI_INVALID_PARAMETER;
808 }
809
810 Ptr = Configuration;
811
812 //
813 // Check the Configuration is valid
814 //
815 if(*Ptr != ACPI_ADDRESS_SPACE_DESCRIPTOR) {
816 return EFI_INVALID_PARAMETER;
817 }
818
819 if (((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->ResType != 2) {
820 return EFI_INVALID_PARAMETER;
821 }
822
823 Ptr += sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
824 if (*Ptr != ACPI_END_TAG_DESCRIPTOR) {
825 return EFI_INVALID_PARAMETER;
826 }
827
828 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
829 List = HostBridgeInstance->Head.ForwardLink;
830
831 Ptr = Configuration;
832
833 while (List != &HostBridgeInstance->Head) {
834 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
835 if (RootBridgeHandle == RootBridgeInstance->Handle) {
836 BusStart = (UINTN)((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrRangeMin;
837 BusLen = (UINTN)((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrLen;
838 BusEnd = BusStart + BusLen - 1;
839
840 if (BusStart > BusEnd) {
841 return EFI_INVALID_PARAMETER;
842 }
843
844 if ((BusStart < RootBridgeInstance->BusBase) || (BusEnd > RootBridgeInstance->BusLimit)) {
845 return EFI_INVALID_PARAMETER;
846 }
847
848 //
849 // Update the Bus Range
850 //
851 RootBridgeInstance->ResAllocNode[TypeBus].Base = BusStart;
852 RootBridgeInstance->ResAllocNode[TypeBus].Length = BusLen;
853 RootBridgeInstance->ResAllocNode[TypeBus].Status = ResAllocated;
854
855 //
856 // Program the Root Bridge Hardware
857 //
858
859 return EFI_SUCCESS;
860 }
861
862 List = List->ForwardLink;
863 }
864
865 return EFI_INVALID_PARAMETER;
866 }
867
868
869 /**
870 Submits the I/O and memory resource requirements for the specified PCI root bridge.
871
872 This function is used to submit all the I/O and memory resources that are required by the specified
873 PCI root bridge. The input parameter Configuration is used to specify the following:
874 - The various types of resources that are required
875 - The associated lengths in terms of ACPI 2.0 resource descriptor format
876
877 @param[in] This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
878 @param[in] RootBridgeHandle The PCI root bridge whose I/O and memory resource requirements are being submitted.
879 @param[in] Configuration The pointer to the PCI I/O and PCI memory resource descriptor.
880
881 @retval EFI_SUCCESS The I/O and memory resource requests for a PCI root bridge were accepted.
882 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
883 @retval EFI_INVALID_PARAMETER Configuration is NULL.
884 @retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI 2.0 resource descriptor.
885 @retval EFI_INVALID_PARAMETER Configuration includes requests for one or more resource types that are
886 not supported by this PCI root bridge. This error will happen if the caller
887 did not combine resources according to Attributes that were returned by
888 GetAllocAttributes().
889 @retval EFI_INVALID_PARAMETER Address Range Maximum" is invalid.
890 @retval EFI_INVALID_PARAMETER "Address Range Length" is invalid for this PCI root bridge.
891 @retval EFI_INVALID_PARAMETER "Address Space Granularity" is invalid for this PCI root bridge.
892
893 **/
894 EFI_STATUS
895 EFIAPI
896 SubmitResources(
897 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
898 IN EFI_HANDLE RootBridgeHandle,
899 IN VOID *Configuration
900 )
901 {
902 LIST_ENTRY *List;
903 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
904 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
905 UINT8 *Temp;
906 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;
907 UINT64 AddrLen;
908 UINT64 Alignment;
909
910 //
911 // Check the input parameter: Configuration
912 //
913 if (Configuration == NULL) {
914 return EFI_INVALID_PARAMETER;
915 }
916
917 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
918 List = HostBridgeInstance->Head.ForwardLink;
919
920 Temp = (UINT8 *)Configuration;
921 while ( *Temp == 0x8A) {
922 Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) ;
923 }
924 if (*Temp != 0x79) {
925 return EFI_INVALID_PARAMETER;
926 }
927
928 Temp = (UINT8 *)Configuration;
929 while (List != &HostBridgeInstance->Head) {
930 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
931 if (RootBridgeHandle == RootBridgeInstance->Handle) {
932 for (;
933 *Temp == 0x8A;
934 Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR)
935 ) {
936 Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;
937
938 //
939 // Check Address Length
940 //
941 if (Ptr->AddrLen == 0) {
942 HostBridgeInstance->ResourceSubmited = TRUE;
943 continue;
944 }
945 if (Ptr->AddrLen > 0xffffffff) {
946 return EFI_INVALID_PARAMETER;
947 }
948
949 //
950 // Check address range alignment
951 //
952 if (Ptr->AddrRangeMax >= 0xffffffff || Ptr->AddrRangeMax != (GetPowerOfTwo64 (Ptr->AddrRangeMax + 1) - 1)) {
953 return EFI_INVALID_PARAMETER;
954 }
955
956 switch (Ptr->ResType) {
957
958 case 0:
959
960 //
961 // Check invalid Address Sapce Granularity
962 //
963 if (Ptr->AddrSpaceGranularity != 32) {
964 return EFI_INVALID_PARAMETER;
965 }
966
967 //
968 // check the memory resource request is supported by PCI root bridge
969 //
970 if (RootBridgeInstance->RootBridgeAttrib == EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM &&
971 Ptr->SpecificFlag == 0x06) {
972 return EFI_INVALID_PARAMETER;
973 }
974
975 AddrLen = Ptr->AddrLen;
976 Alignment = Ptr->AddrRangeMax;
977 if (Ptr->AddrSpaceGranularity == 32) {
978 if (Ptr->SpecificFlag == 0x06) {
979 //
980 // Apply from GCD
981 //
982 RootBridgeInstance->ResAllocNode[TypePMem32].Status = ResSubmitted;
983 } else {
984 RootBridgeInstance->ResAllocNode[TypeMem32].Length = AddrLen;
985 RootBridgeInstance->ResAllocNode[TypeMem32].Alignment = Alignment;
986 RootBridgeInstance->ResAllocNode[TypeMem32].Status = ResRequested;
987 HostBridgeInstance->ResourceSubmited = TRUE;
988 }
989 }
990
991 if (Ptr->AddrSpaceGranularity == 64) {
992 if (Ptr->SpecificFlag == 0x06) {
993 RootBridgeInstance->ResAllocNode[TypePMem64].Status = ResSubmitted;
994 } else {
995 RootBridgeInstance->ResAllocNode[TypeMem64].Status = ResSubmitted;
996 }
997 }
998 break;
999
1000 case 1:
1001 AddrLen = (UINTN) Ptr->AddrLen;
1002 Alignment = (UINTN) Ptr->AddrRangeMax;
1003 RootBridgeInstance->ResAllocNode[TypeIo].Length = AddrLen;
1004 RootBridgeInstance->ResAllocNode[TypeIo].Alignment = Alignment;
1005 RootBridgeInstance->ResAllocNode[TypeIo].Status = ResRequested;
1006 HostBridgeInstance->ResourceSubmited = TRUE;
1007 break;
1008
1009 default:
1010 break;
1011 };
1012 }
1013
1014 return EFI_SUCCESS;
1015 }
1016
1017 List = List->ForwardLink;
1018 }
1019
1020 return EFI_INVALID_PARAMETER;
1021 }
1022
1023 /**
1024 Returns the proposed resource settings for the specified PCI root bridge.
1025
1026 This member function returns the proposed resource settings for the specified PCI root bridge. The
1027 proposed resource settings are prepared when NotifyPhase() is called with a Phase of
1028 EfiPciHostBridgeAllocateResources. The output parameter Configuration
1029 specifies the following:
1030 - The various types of resources, excluding bus resources, that are allocated
1031 - The associated lengths in terms of ACPI 2.0 resource descriptor format
1032
1033 @param[in] This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
1034 @param[in] RootBridgeHandle The PCI root bridge handle. Type EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.
1035 @param[out] Configuration The pointer to the pointer to the PCI I/O and memory resource descriptor.
1036
1037 @retval EFI_SUCCESS The requested parameters were returned.
1038 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
1039 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error.
1040 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
1041
1042 **/
1043 EFI_STATUS
1044 EFIAPI
1045 GetProposedResources(
1046 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
1047 IN EFI_HANDLE RootBridgeHandle,
1048 OUT VOID **Configuration
1049 )
1050 {
1051 LIST_ENTRY *List;
1052 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
1053 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
1054 UINTN Index;
1055 UINTN Number;
1056 VOID *Buffer;
1057 UINT8 *Temp;
1058 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;
1059 UINT64 ResStatus;
1060
1061 Buffer = NULL;
1062 Number = 0;
1063 //
1064 // Get the Host Bridge Instance from the resource allocation protocol
1065 //
1066 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
1067 List = HostBridgeInstance->Head.ForwardLink;
1068
1069 //
1070 // Enumerate the root bridges in this host bridge
1071 //
1072 while (List != &HostBridgeInstance->Head) {
1073 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
1074 if (RootBridgeHandle == RootBridgeInstance->Handle) {
1075 for (Index = 0; Index < TypeBus; Index ++) {
1076 if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
1077 Number ++;
1078 }
1079 }
1080
1081 if (Number == 0) {
1082 EFI_ACPI_END_TAG_DESCRIPTOR *End;
1083
1084 End = AllocateZeroPool (sizeof *End);
1085 if (End == NULL) {
1086 return EFI_OUT_OF_RESOURCES;
1087 }
1088 End->Desc = ACPI_END_TAG_DESCRIPTOR;
1089 *Configuration = End;
1090 return EFI_SUCCESS;
1091 }
1092
1093 Buffer = AllocateZeroPool (Number * sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof(EFI_ACPI_END_TAG_DESCRIPTOR));
1094 if (Buffer == NULL) {
1095 return EFI_OUT_OF_RESOURCES;
1096 }
1097
1098 Temp = Buffer;
1099 for (Index = 0; Index < TypeBus; Index ++) {
1100 if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
1101 Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;
1102 ResStatus = RootBridgeInstance->ResAllocNode[Index].Status;
1103
1104 switch (Index) {
1105
1106 case TypeIo:
1107 //
1108 // Io
1109 //
1110 Ptr->Desc = 0x8A;
1111 Ptr->Len = 0x2B;
1112 Ptr->ResType = 1;
1113 Ptr->GenFlag = 0;
1114 Ptr->SpecificFlag = 0;
1115 Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;
1116 Ptr->AddrRangeMax = 0;
1117 Ptr->AddrTranslationOffset = \
1118 (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;
1119 Ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
1120 break;
1121
1122 case TypeMem32:
1123 //
1124 // Memory 32
1125 //
1126 Ptr->Desc = 0x8A;
1127 Ptr->Len = 0x2B;
1128 Ptr->ResType = 0;
1129 Ptr->GenFlag = 0;
1130 Ptr->SpecificFlag = 0;
1131 Ptr->AddrSpaceGranularity = 32;
1132 Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;
1133 Ptr->AddrRangeMax = 0;
1134 Ptr->AddrTranslationOffset = \
1135 (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;
1136 Ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
1137 break;
1138
1139 case TypePMem32:
1140 //
1141 // Prefetch memory 32
1142 //
1143 Ptr->Desc = 0x8A;
1144 Ptr->Len = 0x2B;
1145 Ptr->ResType = 0;
1146 Ptr->GenFlag = 0;
1147 Ptr->SpecificFlag = 6;
1148 Ptr->AddrSpaceGranularity = 32;
1149 Ptr->AddrRangeMin = 0;
1150 Ptr->AddrRangeMax = 0;
1151 Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
1152 Ptr->AddrLen = 0;
1153 break;
1154
1155 case TypeMem64:
1156 //
1157 // Memory 64
1158 //
1159 Ptr->Desc = 0x8A;
1160 Ptr->Len = 0x2B;
1161 Ptr->ResType = 0;
1162 Ptr->GenFlag = 0;
1163 Ptr->SpecificFlag = 0;
1164 Ptr->AddrSpaceGranularity = 64;
1165 Ptr->AddrRangeMin = 0;
1166 Ptr->AddrRangeMax = 0;
1167 Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
1168 Ptr->AddrLen = 0;
1169 break;
1170
1171 case TypePMem64:
1172 //
1173 // Prefetch memory 64
1174 //
1175 Ptr->Desc = 0x8A;
1176 Ptr->Len = 0x2B;
1177 Ptr->ResType = 0;
1178 Ptr->GenFlag = 0;
1179 Ptr->SpecificFlag = 6;
1180 Ptr->AddrSpaceGranularity = 64;
1181 Ptr->AddrRangeMin = 0;
1182 Ptr->AddrRangeMax = 0;
1183 Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
1184 Ptr->AddrLen = 0;
1185 break;
1186 };
1187
1188 Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
1189 }
1190 }
1191
1192 ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79;
1193 ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Checksum = 0x0;
1194
1195 *Configuration = Buffer;
1196
1197 return EFI_SUCCESS;
1198 }
1199
1200 List = List->ForwardLink;
1201 }
1202
1203 return EFI_INVALID_PARAMETER;
1204 }
1205
1206 /**
1207 Provides the hooks from the PCI bus driver to every PCI controller (device/function) at various
1208 stages of the PCI enumeration process that allow the host bridge driver to preinitialize individual
1209 PCI controllers before enumeration.
1210
1211 This function is called during the PCI enumeration process. No specific action is expected from this
1212 member function. It allows the host bridge driver to preinitialize individual PCI controllers before
1213 enumeration.
1214
1215 @param This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
1216 @param RootBridgeHandle The associated PCI root bridge handle. Type EFI_HANDLE is defined in
1217 InstallProtocolInterface() in the UEFI 2.0 Specification.
1218 @param PciAddress The address of the PCI device on the PCI bus. This address can be passed to the
1219 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL member functions to access the PCI
1220 configuration space of the device. See Table 12-1 in the UEFI 2.0 Specification for
1221 the definition of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS.
1222 @param Phase The phase of the PCI device enumeration.
1223
1224 @retval EFI_SUCCESS The requested parameters were returned.
1225 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
1226 @retval EFI_INVALID_PARAMETER Phase is not a valid phase that is defined in
1227 EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE.
1228 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error. The PCI enumerator should
1229 not enumerate this device, including its child devices if it is a PCI-to-PCI
1230 bridge.
1231
1232 **/
1233 EFI_STATUS
1234 EFIAPI
1235 PreprocessController (
1236 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
1237 IN EFI_HANDLE RootBridgeHandle,
1238 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,
1239 IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase
1240 )
1241 {
1242 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
1243 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
1244 LIST_ENTRY *List;
1245
1246 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
1247 List = HostBridgeInstance->Head.ForwardLink;
1248
1249 //
1250 // Enumerate the root bridges in this host bridge
1251 //
1252 while (List != &HostBridgeInstance->Head) {
1253 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
1254 if (RootBridgeHandle == RootBridgeInstance->Handle) {
1255 break;
1256 }
1257 List = List->ForwardLink;
1258 }
1259 if (List == &HostBridgeInstance->Head) {
1260 return EFI_INVALID_PARAMETER;
1261 }
1262
1263 if ((UINT32)Phase > EfiPciBeforeResourceCollection) {
1264 return EFI_INVALID_PARAMETER;
1265 }
1266
1267 return EFI_SUCCESS;
1268 }
EFI Development Kit II mirror for PVE