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1 /** @file
2 Provides the basic interfaces to abstract a PCI Host Bridge Resource Allocation
3
4 Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials are
6 licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #include "PciHostBridge.h"
16
17 //
18 // Hard code: Root Bridge Number within the host bridge
19 // Root Bridge's attribute
20 // Root Bridge's device path
21 // Root Bridge's resource aperture
22 //
23 UINTN RootBridgeNumber[1] = { 1 };
24
25 UINT64 RootBridgeAttribute[1][1] = { { EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM } };
26
27 EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath[1][1] = {
28 {
29 {
30 {
31 {
32 ACPI_DEVICE_PATH,
33 ACPI_DP,
34 {
35 (UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),
36 (UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8)
37 }
38 },
39 EISA_PNP_ID(0x0A03),
40 0
41 },
42
43 {
44 END_DEVICE_PATH_TYPE,
45 END_ENTIRE_DEVICE_PATH_SUBTYPE,
46 {
47 END_DEVICE_PATH_LENGTH,
48 0
49 }
50 }
51 }
52 }
53 };
54
55 STATIC PCI_ROOT_BRIDGE_RESOURCE_APERTURE mResAperture[1][1];
56
57 EFI_HANDLE mDriverImageHandle;
58
59 PCI_HOST_BRIDGE_INSTANCE mPciHostBridgeInstanceTemplate = {
60 PCI_HOST_BRIDGE_SIGNATURE, // Signature
61 NULL, // HostBridgeHandle
62 0, // RootBridgeNumber
63 {NULL, NULL}, // Head
64 FALSE, // ResourceSubiteed
65 TRUE, // CanRestarted
66 {
67 NotifyPhase,
68 GetNextRootBridge,
69 GetAttributes,
70 StartBusEnumeration,
71 SetBusNumbers,
72 SubmitResources,
73 GetProposedResources,
74 PreprocessController
75 }
76 };
77
78 //
79 // Implementation
80 //
81
82 /**
83 Entry point of this driver
84
85 @param ImageHandle Handle of driver image
86 @param SystemTable Point to EFI_SYSTEM_TABLE
87
88 @retval EFI_ABORTED PCI host bridge not present
89 @retval EFI_OUT_OF_RESOURCES Can not allocate memory resource
90 @retval EFI_DEVICE_ERROR Can not install the protocol instance
91 @retval EFI_SUCCESS Success to initialize the Pci host bridge.
92 **/
93 EFI_STATUS
94 EFIAPI
95 InitializePciHostBridge (
96 IN EFI_HANDLE ImageHandle,
97 IN EFI_SYSTEM_TABLE *SystemTable
98 )
99 {
100 UINT64 MmioAttributes;
101 EFI_STATUS Status;
102 UINTN Loop1;
103 UINTN Loop2;
104 PCI_HOST_BRIDGE_INSTANCE *HostBridge;
105 PCI_ROOT_BRIDGE_INSTANCE *PrivateData;
106
107 if (PcdGet64 (PcdPciExpressBaseAddress) == 0) {
108 DEBUG ((EFI_D_INFO, "%a: PCI host bridge not present\n", __FUNCTION__));
109 return EFI_ABORTED;
110 }
111
112 mDriverImageHandle = ImageHandle;
113
114 mResAperture[0][0].BusBase = PcdGet32 (PcdPciBusMin);
115 mResAperture[0][0].BusLimit = PcdGet32 (PcdPciBusMax);
116
117 mResAperture[0][0].MemBase = PcdGet32 (PcdPciMmio32Base);
118 mResAperture[0][0].MemLimit = (UINT64)PcdGet32 (PcdPciMmio32Base) +
119 PcdGet32 (PcdPciMmio32Size) - 1;
120
121 mResAperture[0][0].IoBase = PcdGet64 (PcdPciIoBase);
122 mResAperture[0][0].IoLimit = PcdGet64 (PcdPciIoBase) +
123 PcdGet64 (PcdPciIoSize) - 1;
124 mResAperture[0][0].IoTranslation = PcdGet64 (PcdPciIoTranslation);
125
126 //
127 // Add IO and MMIO memory space, so that resources can be allocated in the
128 // EfiPciHostBridgeAllocateResources phase.
129 //
130 Status = gDS->AddIoSpace (
131 EfiGcdIoTypeIo,
132 PcdGet64 (PcdPciIoBase),
133 PcdGet64 (PcdPciIoSize)
134 );
135 ASSERT_EFI_ERROR (Status);
136
137 MmioAttributes = FeaturePcdGet (PcdKludgeMapPciMmioAsCached) ?
138 EFI_MEMORY_WB : EFI_MEMORY_UC;
139
140 Status = gDS->AddMemorySpace (
141 EfiGcdMemoryTypeMemoryMappedIo,
142 PcdGet32 (PcdPciMmio32Base),
143 PcdGet32 (PcdPciMmio32Size),
144 MmioAttributes
145 );
146 if (EFI_ERROR (Status)) {
147 DEBUG ((EFI_D_ERROR, "%a: AddMemorySpace: %r\n", __FUNCTION__, Status));
148 return Status;
149 }
150
151 Status = gDS->SetMemorySpaceAttributes (
152 PcdGet32 (PcdPciMmio32Base),
153 PcdGet32 (PcdPciMmio32Size),
154 MmioAttributes
155 );
156 if (EFI_ERROR (Status)) {
157 DEBUG ((EFI_D_ERROR, "%a: SetMemorySpaceAttributes: %r\n", __FUNCTION__,
158 Status));
159 return Status;
160 }
161
162 //
163 // Create Host Bridge Device Handle
164 //
165 for (Loop1 = 0; Loop1 < HOST_BRIDGE_NUMBER; Loop1++) {
166 HostBridge = AllocateCopyPool (sizeof(PCI_HOST_BRIDGE_INSTANCE), &mPciHostBridgeInstanceTemplate);
167 if (HostBridge == NULL) {
168 return EFI_OUT_OF_RESOURCES;
169 }
170
171 HostBridge->RootBridgeNumber = RootBridgeNumber[Loop1];
172 InitializeListHead (&HostBridge->Head);
173
174 Status = gBS->InstallMultipleProtocolInterfaces (
175 &HostBridge->HostBridgeHandle,
176 &gEfiPciHostBridgeResourceAllocationProtocolGuid, &HostBridge->ResAlloc,
177 NULL
178 );
179 if (EFI_ERROR (Status)) {
180 FreePool (HostBridge);
181 return EFI_DEVICE_ERROR;
182 }
183
184 //
185 // Create Root Bridge Device Handle in this Host Bridge
186 //
187
188 for (Loop2 = 0; Loop2 < HostBridge->RootBridgeNumber; Loop2++) {
189 PrivateData = AllocateZeroPool (sizeof(PCI_ROOT_BRIDGE_INSTANCE));
190 if (PrivateData == NULL) {
191 return EFI_OUT_OF_RESOURCES;
192 }
193
194 PrivateData->Signature = PCI_ROOT_BRIDGE_SIGNATURE;
195 PrivateData->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath[Loop1][Loop2];
196
197 RootBridgeConstructor (
198 &PrivateData->Io,
199 HostBridge->HostBridgeHandle,
200 RootBridgeAttribute[Loop1][Loop2],
201 &mResAperture[Loop1][Loop2]
202 );
203
204 Status = gBS->InstallMultipleProtocolInterfaces(
205 &PrivateData->Handle,
206 &gEfiDevicePathProtocolGuid, PrivateData->DevicePath,
207 &gEfiPciRootBridgeIoProtocolGuid, &PrivateData->Io,
208 NULL
209 );
210 if (EFI_ERROR (Status)) {
211 FreePool(PrivateData);
212 return EFI_DEVICE_ERROR;
213 }
214
215 InsertTailList (&HostBridge->Head, &PrivateData->Link);
216 }
217 }
218
219 return EFI_SUCCESS;
220 }
221
222
223 /**
224 These are the notifications from the PCI bus driver that it is about to enter a certain
225 phase of the PCI enumeration process.
226
227 This member function can be used to notify the host bridge driver to perform specific actions,
228 including any chipset-specific initialization, so that the chipset is ready to enter the next phase.
229 Eight notification points are defined at this time. See belows:
230 EfiPciHostBridgeBeginEnumeration Resets the host bridge PCI apertures and internal data
231 structures. The PCI enumerator should issue this notification
232 before starting a fresh enumeration process. Enumeration cannot
233 be restarted after sending any other notification such as
234 EfiPciHostBridgeBeginBusAllocation.
235 EfiPciHostBridgeBeginBusAllocation The bus allocation phase is about to begin. No specific action is
236 required here. This notification can be used to perform any
237 chipset-specific programming.
238 EfiPciHostBridgeEndBusAllocation The bus allocation and bus programming phase is complete. No
239 specific action is required here. This notification can be used to
240 perform any chipset-specific programming.
241 EfiPciHostBridgeBeginResourceAllocation
242 The resource allocation phase is about to begin. No specific
243 action is required here. This notification can be used to perform
244 any chipset-specific programming.
245 EfiPciHostBridgeAllocateResources Allocates resources per previously submitted requests for all the PCI
246 root bridges. These resource settings are returned on the next call to
247 GetProposedResources(). Before calling NotifyPhase() with a Phase of
248 EfiPciHostBridgeAllocateResource, the PCI bus enumerator is responsible
249 for gathering I/O and memory requests for
250 all the PCI root bridges and submitting these requests using
251 SubmitResources(). This function pads the resource amount
252 to suit the root bridge hardware, takes care of dependencies between
253 the PCI root bridges, and calls the Global Coherency Domain (GCD)
254 with the allocation request. In the case of padding, the allocated range
255 could be bigger than what was requested.
256 EfiPciHostBridgeSetResources Programs the host bridge hardware to decode previously allocated
257 resources (proposed resources) for all the PCI root bridges. After the
258 hardware is programmed, reassigning resources will not be supported.
259 The bus settings are not affected.
260 EfiPciHostBridgeFreeResources Deallocates resources that were previously allocated for all the PCI
261 root bridges and resets the I/O and memory apertures to their initial
262 state. The bus settings are not affected. If the request to allocate
263 resources fails, the PCI enumerator can use this notification to
264 deallocate previous resources, adjust the requests, and retry
265 allocation.
266 EfiPciHostBridgeEndResourceAllocation The resource allocation phase is completed. No specific action is
267 required here. This notification can be used to perform any chipsetspecific
268 programming.
269
270 @param[in] This The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
271 @param[in] Phase The phase during enumeration
272
273 @retval EFI_NOT_READY This phase cannot be entered at this time. For example, this error
274 is valid for a Phase of EfiPciHostBridgeAllocateResources if
275 SubmitResources() has not been called for one or more
276 PCI root bridges before this call
277 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error. This error is valid
278 for a Phase of EfiPciHostBridgeSetResources.
279 @retval EFI_INVALID_PARAMETER Invalid phase parameter
280 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
281 This error is valid for a Phase of EfiPciHostBridgeAllocateResources if the
282 previously submitted resource requests cannot be fulfilled or
283 were only partially fulfilled.
284 @retval EFI_SUCCESS The notification was accepted without any errors.
285
286 **/
287 EFI_STATUS
288 EFIAPI
289 NotifyPhase(
290 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
291 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase
292 )
293 {
294 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
295 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
296 PCI_RESOURCE_TYPE Index;
297 LIST_ENTRY *List;
298 EFI_PHYSICAL_ADDRESS BaseAddress;
299 UINT64 AddrLen;
300 UINTN BitsOfAlignment;
301 EFI_STATUS Status;
302 EFI_STATUS ReturnStatus;
303
304 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
305
306 switch (Phase) {
307
308 case EfiPciHostBridgeBeginEnumeration:
309 if (HostBridgeInstance->CanRestarted) {
310 //
311 // Reset the Each Root Bridge
312 //
313 List = HostBridgeInstance->Head.ForwardLink;
314
315 while (List != &HostBridgeInstance->Head) {
316 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
317 for (Index = TypeIo; Index < TypeMax; Index++) {
318 RootBridgeInstance->ResAllocNode[Index].Type = Index;
319 RootBridgeInstance->ResAllocNode[Index].Base = 0;
320 RootBridgeInstance->ResAllocNode[Index].Length = 0;
321 RootBridgeInstance->ResAllocNode[Index].Status = ResNone;
322 }
323
324 List = List->ForwardLink;
325 }
326
327 HostBridgeInstance->ResourceSubmited = FALSE;
328 HostBridgeInstance->CanRestarted = TRUE;
329 } else {
330 //
331 // Can not restart
332 //
333 return EFI_NOT_READY;
334 }
335 break;
336
337 case EfiPciHostBridgeEndEnumeration:
338 break;
339
340 case EfiPciHostBridgeBeginBusAllocation:
341 //
342 // No specific action is required here, can perform any chipset specific programing
343 //
344 HostBridgeInstance->CanRestarted = FALSE;
345 break;
346
347 case EfiPciHostBridgeEndBusAllocation:
348 //
349 // No specific action is required here, can perform any chipset specific programing
350 //
351 //HostBridgeInstance->CanRestarted = FALSE;
352 break;
353
354 case EfiPciHostBridgeBeginResourceAllocation:
355 //
356 // No specific action is required here, can perform any chipset specific programing
357 //
358 //HostBridgeInstance->CanRestarted = FALSE;
359 break;
360
361 case EfiPciHostBridgeAllocateResources:
362 ReturnStatus = EFI_SUCCESS;
363 if (HostBridgeInstance->ResourceSubmited) {
364 //
365 // Take care of the resource dependencies between the root bridges
366 //
367 List = HostBridgeInstance->Head.ForwardLink;
368
369 while (List != &HostBridgeInstance->Head) {
370 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
371 for (Index = TypeIo; Index < TypeBus; Index++) {
372 if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
373
374 AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
375
376 //
377 // Get the number of '1' in Alignment.
378 //
379 BitsOfAlignment = (UINTN) (HighBitSet64 (RootBridgeInstance->ResAllocNode[Index].Alignment) + 1);
380
381 switch (Index) {
382
383 case TypeIo:
384 //
385 // It is impossible for this chipset to align 0xFFFF for IO16
386 // So clear it
387 //
388 if (BitsOfAlignment >= 16) {
389 BitsOfAlignment = 0;
390 }
391
392 BaseAddress = mResAperture[0][0].IoLimit;
393 Status = gDS->AllocateIoSpace (
394 EfiGcdAllocateMaxAddressSearchTopDown,
395 EfiGcdIoTypeIo,
396 BitsOfAlignment,
397 AddrLen,
398 &BaseAddress,
399 mDriverImageHandle,
400 NULL
401 );
402
403 if (!EFI_ERROR (Status)) {
404 RootBridgeInstance->ResAllocNode[Index].Base = (UINTN)BaseAddress;
405 RootBridgeInstance->ResAllocNode[Index].Status = ResAllocated;
406 } else {
407 ReturnStatus = Status;
408 if (Status != EFI_OUT_OF_RESOURCES) {
409 RootBridgeInstance->ResAllocNode[Index].Length = 0;
410 }
411 }
412
413 break;
414
415
416 case TypeMem32:
417 //
418 // It is impossible for this chipset to align 0xFFFFFFFF for Mem32
419 // So clear it
420 //
421
422 if (BitsOfAlignment >= 32) {
423 BitsOfAlignment = 0;
424 }
425
426 Status = gDS->AllocateMemorySpace (
427 EfiGcdAllocateAnySearchBottomUp,
428 EfiGcdMemoryTypeMemoryMappedIo,
429 BitsOfAlignment,
430 AddrLen,
431 &BaseAddress,
432 mDriverImageHandle,
433 NULL
434 );
435
436 if (!EFI_ERROR (Status)) {
437 // We were able to allocate the PCI memory
438 RootBridgeInstance->ResAllocNode[Index].Base = (UINTN)BaseAddress;
439 RootBridgeInstance->ResAllocNode[Index].Status = ResAllocated;
440
441 } else {
442 // Not able to allocate enough PCI memory
443 ReturnStatus = Status;
444
445 if (Status != EFI_OUT_OF_RESOURCES) {
446 RootBridgeInstance->ResAllocNode[Index].Length = 0;
447 }
448 ASSERT (FALSE);
449 }
450 break;
451
452 case TypePMem32:
453 case TypeMem64:
454 case TypePMem64:
455 ReturnStatus = EFI_ABORTED;
456 break;
457 default:
458 ASSERT (FALSE);
459 break;
460 }; //end switch
461 }
462 }
463
464 List = List->ForwardLink;
465 }
466
467 return ReturnStatus;
468
469 } else {
470 return EFI_NOT_READY;
471 }
472 break;
473
474 case EfiPciHostBridgeSetResources:
475 break;
476
477 case EfiPciHostBridgeFreeResources:
478 ReturnStatus = EFI_SUCCESS;
479 List = HostBridgeInstance->Head.ForwardLink;
480 while (List != &HostBridgeInstance->Head) {
481 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
482 for (Index = TypeIo; Index < TypeBus; Index++) {
483 if (RootBridgeInstance->ResAllocNode[Index].Status == ResAllocated) {
484 AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
485 BaseAddress = RootBridgeInstance->ResAllocNode[Index].Base;
486 switch (Index) {
487
488 case TypeIo:
489 Status = gDS->FreeIoSpace (BaseAddress, AddrLen);
490 if (EFI_ERROR (Status)) {
491 ReturnStatus = Status;
492 }
493 break;
494
495 case TypeMem32:
496 Status = gDS->FreeMemorySpace (BaseAddress, AddrLen);
497 if (EFI_ERROR (Status)) {
498 ReturnStatus = Status;
499 }
500 break;
501
502 case TypePMem32:
503 break;
504
505 case TypeMem64:
506 break;
507
508 case TypePMem64:
509 break;
510
511 default:
512 ASSERT (FALSE);
513 break;
514
515 }; //end switch
516 RootBridgeInstance->ResAllocNode[Index].Type = Index;
517 RootBridgeInstance->ResAllocNode[Index].Base = 0;
518 RootBridgeInstance->ResAllocNode[Index].Length = 0;
519 RootBridgeInstance->ResAllocNode[Index].Status = ResNone;
520 }
521 }
522
523 List = List->ForwardLink;
524 }
525
526 HostBridgeInstance->ResourceSubmited = FALSE;
527 HostBridgeInstance->CanRestarted = TRUE;
528 return ReturnStatus;
529
530 case EfiPciHostBridgeEndResourceAllocation:
531 HostBridgeInstance->CanRestarted = FALSE;
532 break;
533
534 default:
535 return EFI_INVALID_PARAMETER;
536 }
537
538 return EFI_SUCCESS;
539 }
540
541 /**
542 Return the device handle of the next PCI root bridge that is associated with this Host Bridge.
543
544 This function is called multiple times to retrieve the device handles of all the PCI root bridges that
545 are associated with this PCI host bridge. Each PCI host bridge is associated with one or more PCI
546 root bridges. On each call, the handle that was returned by the previous call is passed into the
547 interface, and on output the interface returns the device handle of the next PCI root bridge. The
548 caller can use the handle to obtain the instance of the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
549 for that root bridge. When there are no more PCI root bridges to report, the interface returns
550 EFI_NOT_FOUND. A PCI enumerator must enumerate the PCI root bridges in the order that they
551 are returned by this function.
552 For D945 implementation, there is only one root bridge in PCI host bridge.
553
554 @param[in] This The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
555 @param[in, out] RootBridgeHandle Returns the device handle of the next PCI root bridge.
556
557 @retval EFI_SUCCESS If parameter RootBridgeHandle = NULL, then return the first Rootbridge handle of the
558 specific Host bridge and return EFI_SUCCESS.
559 @retval EFI_NOT_FOUND Can not find the any more root bridge in specific host bridge.
560 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not an EFI_HANDLE that was
561 returned on a previous call to GetNextRootBridge().
562 **/
563 EFI_STATUS
564 EFIAPI
565 GetNextRootBridge(
566 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
567 IN OUT EFI_HANDLE *RootBridgeHandle
568 )
569 {
570 BOOLEAN NoRootBridge;
571 LIST_ENTRY *List;
572 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
573 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
574
575 NoRootBridge = TRUE;
576 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
577 List = HostBridgeInstance->Head.ForwardLink;
578
579
580 while (List != &HostBridgeInstance->Head) {
581 NoRootBridge = FALSE;
582 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
583 if (*RootBridgeHandle == NULL) {
584 //
585 // Return the first Root Bridge Handle of the Host Bridge
586 //
587 *RootBridgeHandle = RootBridgeInstance->Handle;
588 return EFI_SUCCESS;
589 } else {
590 if (*RootBridgeHandle == RootBridgeInstance->Handle) {
591 //
592 // Get next if have
593 //
594 List = List->ForwardLink;
595 if (List!=&HostBridgeInstance->Head) {
596 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
597 *RootBridgeHandle = RootBridgeInstance->Handle;
598 return EFI_SUCCESS;
599 } else {
600 return EFI_NOT_FOUND;
601 }
602 }
603 }
604
605 List = List->ForwardLink;
606 } //end while
607
608 if (NoRootBridge) {
609 return EFI_NOT_FOUND;
610 } else {
611 return EFI_INVALID_PARAMETER;
612 }
613 }
614
615 /**
616 Returns the allocation attributes of a PCI root bridge.
617
618 The function returns the allocation attributes of a specific PCI root bridge. The attributes can vary
619 from one PCI root bridge to another. These attributes are different from the decode-related
620 attributes that are returned by the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.GetAttributes() member function. The
621 RootBridgeHandle parameter is used to specify the instance of the PCI root bridge. The device
622 handles of all the root bridges that are associated with this host bridge must be obtained by calling
623 GetNextRootBridge(). The attributes are static in the sense that they do not change during or
624 after the enumeration process. The hardware may provide mechanisms to change the attributes on
625 the fly, but such changes must be completed before EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is
626 installed. The permitted values of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ATTRIBUTES are defined in
627 "Related Definitions" below. The caller uses these attributes to combine multiple resource requests.
628 For example, if the flag EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM is set, the PCI bus enumerator needs to
629 include requests for the prefetchable memory in the nonprefetchable memory pool and not request any
630 prefetchable memory.
631 Attribute Description
632 ------------------------------------ ----------------------------------------------------------------------
633 EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM If this bit is set, then the PCI root bridge does not support separate
634 windows for nonprefetchable and prefetchable memory. A PCI bus
635 driver needs to include requests for prefetchable memory in the
636 nonprefetchable memory pool.
637
638 EFI_PCI_HOST_BRIDGE_MEM64_DECODE If this bit is set, then the PCI root bridge supports 64-bit memory
639 windows. If this bit is not set, the PCI bus driver needs to include
640 requests for a 64-bit memory address in the corresponding 32-bit
641 memory pool.
642
643 @param[in] This The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
644 @param[in] RootBridgeHandle The device handle of the PCI root bridge in which the caller is interested. Type
645 EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.
646 @param[out] Attributes The pointer to attribte of root bridge, it is output parameter
647
648 @retval EFI_INVALID_PARAMETER Attribute pointer is NULL
649 @retval EFI_INVALID_PARAMETER RootBridgehandle is invalid.
650 @retval EFI_SUCCESS Success to get attribute of interested root bridge.
651
652 **/
653 EFI_STATUS
654 EFIAPI
655 GetAttributes(
656 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
657 IN EFI_HANDLE RootBridgeHandle,
658 OUT UINT64 *Attributes
659 )
660 {
661 LIST_ENTRY *List;
662 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
663 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
664
665 if (Attributes == NULL) {
666 return EFI_INVALID_PARAMETER;
667 }
668
669 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
670 List = HostBridgeInstance->Head.ForwardLink;
671
672 while (List != &HostBridgeInstance->Head) {
673 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
674 if (RootBridgeHandle == RootBridgeInstance->Handle) {
675 *Attributes = RootBridgeInstance->RootBridgeAttrib;
676 return EFI_SUCCESS;
677 }
678 List = List->ForwardLink;
679 }
680
681 //
682 // RootBridgeHandle is not an EFI_HANDLE
683 // that was returned on a previous call to GetNextRootBridge()
684 //
685 return EFI_INVALID_PARAMETER;
686 }
687
688 /**
689 Sets up the specified PCI root bridge for the bus enumeration process.
690
691 This member function sets up the root bridge for bus enumeration and returns the PCI bus range
692 over which the search should be performed in ACPI 2.0 resource descriptor format.
693
694 @param[in] This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance.
695 @param[in] RootBridgeHandle The PCI Root Bridge to be set up.
696 @param[out] Configuration Pointer to the pointer to the PCI bus resource descriptor.
697
698 @retval EFI_INVALID_PARAMETER Invalid Root bridge's handle
699 @retval EFI_OUT_OF_RESOURCES Fail to allocate ACPI resource descriptor tag.
700 @retval EFI_SUCCESS Sucess to allocate ACPI resource descriptor.
701
702 **/
703 EFI_STATUS
704 EFIAPI
705 StartBusEnumeration(
706 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
707 IN EFI_HANDLE RootBridgeHandle,
708 OUT VOID **Configuration
709 )
710 {
711 LIST_ENTRY *List;
712 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
713 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
714 VOID *Buffer;
715 UINT8 *Temp;
716 UINT64 BusStart;
717 UINT64 BusEnd;
718
719 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
720 List = HostBridgeInstance->Head.ForwardLink;
721
722 while (List != &HostBridgeInstance->Head) {
723 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
724 if (RootBridgeHandle == RootBridgeInstance->Handle) {
725 //
726 // Set up the Root Bridge for Bus Enumeration
727 //
728 BusStart = RootBridgeInstance->BusBase;
729 BusEnd = RootBridgeInstance->BusLimit;
730 //
731 // Program the Hardware(if needed) if error return EFI_DEVICE_ERROR
732 //
733
734 Buffer = AllocatePool (sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof(EFI_ACPI_END_TAG_DESCRIPTOR));
735 if (Buffer == NULL) {
736 return EFI_OUT_OF_RESOURCES;
737 }
738
739 Temp = (UINT8 *)Buffer;
740
741 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->Desc = 0x8A;
742 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->Len = 0x2B;
743 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->ResType = 2;
744 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->GenFlag = 0;
745 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->SpecificFlag = 0;
746 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrSpaceGranularity = 0;
747 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrRangeMin = BusStart;
748 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrRangeMax = 0;
749 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrTranslationOffset = 0;
750 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrLen = BusEnd - BusStart + 1;
751
752 Temp = Temp + sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
753 ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79;
754 ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Checksum = 0x0;
755
756 *Configuration = Buffer;
757 return EFI_SUCCESS;
758 }
759 List = List->ForwardLink;
760 }
761
762 return EFI_INVALID_PARAMETER;
763 }
764
765 /**
766 Programs the PCI root bridge hardware so that it decodes the specified PCI bus range.
767
768 This member function programs the specified PCI root bridge to decode the bus range that is
769 specified by the input parameter Configuration.
770 The bus range information is specified in terms of the ACPI 2.0 resource descriptor format.
771
772 @param[in] This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance
773 @param[in] RootBridgeHandle The PCI Root Bridge whose bus range is to be programmed
774 @param[in] Configuration The pointer to the PCI bus resource descriptor
775
776 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
777 @retval EFI_INVALID_PARAMETER Configuration is NULL.
778 @retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI 2.0 resource descriptor.
779 @retval EFI_INVALID_PARAMETER Configuration does not include a valid ACPI 2.0 bus resource descriptor.
780 @retval EFI_INVALID_PARAMETER Configuration includes valid ACPI 2.0 resource descriptors other than
781 bus descriptors.
782 @retval EFI_INVALID_PARAMETER Configuration contains one or more invalid ACPI resource descriptors.
783 @retval EFI_INVALID_PARAMETER "Address Range Minimum" is invalid for this root bridge.
784 @retval EFI_INVALID_PARAMETER "Address Range Length" is invalid for this root bridge.
785 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error.
786 @retval EFI_SUCCESS The bus range for the PCI root bridge was programmed.
787
788 **/
789 EFI_STATUS
790 EFIAPI
791 SetBusNumbers(
792 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
793 IN EFI_HANDLE RootBridgeHandle,
794 IN VOID *Configuration
795 )
796 {
797 LIST_ENTRY *List;
798 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
799 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
800 UINT8 *Ptr;
801 UINTN BusStart;
802 UINTN BusEnd;
803 UINTN BusLen;
804
805 if (Configuration == NULL) {
806 return EFI_INVALID_PARAMETER;
807 }
808
809 Ptr = Configuration;
810
811 //
812 // Check the Configuration is valid
813 //
814 if(*Ptr != ACPI_ADDRESS_SPACE_DESCRIPTOR) {
815 return EFI_INVALID_PARAMETER;
816 }
817
818 if (((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->ResType != 2) {
819 return EFI_INVALID_PARAMETER;
820 }
821
822 Ptr += sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
823 if (*Ptr != ACPI_END_TAG_DESCRIPTOR) {
824 return EFI_INVALID_PARAMETER;
825 }
826
827 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
828 List = HostBridgeInstance->Head.ForwardLink;
829
830 Ptr = Configuration;
831
832 while (List != &HostBridgeInstance->Head) {
833 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
834 if (RootBridgeHandle == RootBridgeInstance->Handle) {
835 BusStart = (UINTN)((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrRangeMin;
836 BusLen = (UINTN)((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrLen;
837 BusEnd = BusStart + BusLen - 1;
838
839 if (BusStart > BusEnd) {
840 return EFI_INVALID_PARAMETER;
841 }
842
843 if ((BusStart < RootBridgeInstance->BusBase) || (BusEnd > RootBridgeInstance->BusLimit)) {
844 return EFI_INVALID_PARAMETER;
845 }
846
847 //
848 // Update the Bus Range
849 //
850 RootBridgeInstance->ResAllocNode[TypeBus].Base = BusStart;
851 RootBridgeInstance->ResAllocNode[TypeBus].Length = BusLen;
852 RootBridgeInstance->ResAllocNode[TypeBus].Status = ResAllocated;
853
854 //
855 // Program the Root Bridge Hardware
856 //
857
858 return EFI_SUCCESS;
859 }
860
861 List = List->ForwardLink;
862 }
863
864 return EFI_INVALID_PARAMETER;
865 }
866
867
868 /**
869 Submits the I/O and memory resource requirements for the specified PCI root bridge.
870
871 This function is used to submit all the I/O and memory resources that are required by the specified
872 PCI root bridge. The input parameter Configuration is used to specify the following:
873 - The various types of resources that are required
874 - The associated lengths in terms of ACPI 2.0 resource descriptor format
875
876 @param[in] This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
877 @param[in] RootBridgeHandle The PCI root bridge whose I/O and memory resource requirements are being submitted.
878 @param[in] Configuration The pointer to the PCI I/O and PCI memory resource descriptor.
879
880 @retval EFI_SUCCESS The I/O and memory resource requests for a PCI root bridge were accepted.
881 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
882 @retval EFI_INVALID_PARAMETER Configuration is NULL.
883 @retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI 2.0 resource descriptor.
884 @retval EFI_INVALID_PARAMETER Configuration includes requests for one or more resource types that are
885 not supported by this PCI root bridge. This error will happen if the caller
886 did not combine resources according to Attributes that were returned by
887 GetAllocAttributes().
888 @retval EFI_INVALID_PARAMETER Address Range Maximum" is invalid.
889 @retval EFI_INVALID_PARAMETER "Address Range Length" is invalid for this PCI root bridge.
890 @retval EFI_INVALID_PARAMETER "Address Space Granularity" is invalid for this PCI root bridge.
891
892 **/
893 EFI_STATUS
894 EFIAPI
895 SubmitResources(
896 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
897 IN EFI_HANDLE RootBridgeHandle,
898 IN VOID *Configuration
899 )
900 {
901 LIST_ENTRY *List;
902 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
903 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
904 UINT8 *Temp;
905 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;
906 UINT64 AddrLen;
907 UINT64 Alignment;
908
909 //
910 // Check the input parameter: Configuration
911 //
912 if (Configuration == NULL) {
913 return EFI_INVALID_PARAMETER;
914 }
915
916 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
917 List = HostBridgeInstance->Head.ForwardLink;
918
919 Temp = (UINT8 *)Configuration;
920 while ( *Temp == 0x8A) {
921 Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) ;
922 }
923 if (*Temp != 0x79) {
924 return EFI_INVALID_PARAMETER;
925 }
926
927 Temp = (UINT8 *)Configuration;
928 while (List != &HostBridgeInstance->Head) {
929 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
930 if (RootBridgeHandle == RootBridgeInstance->Handle) {
931 while ( *Temp == 0x8A) {
932 Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;
933
934 //
935 // Check Address Length
936 //
937 if (Ptr->AddrLen > 0xffffffff) {
938 return EFI_INVALID_PARAMETER;
939 }
940
941 //
942 // Check address range alignment
943 //
944 if (Ptr->AddrRangeMax >= 0xffffffff || Ptr->AddrRangeMax != (GetPowerOfTwo64 (Ptr->AddrRangeMax + 1) - 1)) {
945 return EFI_INVALID_PARAMETER;
946 }
947
948 switch (Ptr->ResType) {
949
950 case 0:
951
952 //
953 // Check invalid Address Sapce Granularity
954 //
955 if (Ptr->AddrSpaceGranularity != 32) {
956 return EFI_INVALID_PARAMETER;
957 }
958
959 //
960 // check the memory resource request is supported by PCI root bridge
961 //
962 if (RootBridgeInstance->RootBridgeAttrib == EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM &&
963 Ptr->SpecificFlag == 0x06) {
964 return EFI_INVALID_PARAMETER;
965 }
966
967 AddrLen = Ptr->AddrLen;
968 Alignment = Ptr->AddrRangeMax;
969 if (Ptr->AddrSpaceGranularity == 32) {
970 if (Ptr->SpecificFlag == 0x06) {
971 //
972 // Apply from GCD
973 //
974 RootBridgeInstance->ResAllocNode[TypePMem32].Status = ResSubmitted;
975 } else {
976 RootBridgeInstance->ResAllocNode[TypeMem32].Length = AddrLen;
977 RootBridgeInstance->ResAllocNode[TypeMem32].Alignment = Alignment;
978 RootBridgeInstance->ResAllocNode[TypeMem32].Status = ResRequested;
979 HostBridgeInstance->ResourceSubmited = TRUE;
980 }
981 }
982
983 if (Ptr->AddrSpaceGranularity == 64) {
984 if (Ptr->SpecificFlag == 0x06) {
985 RootBridgeInstance->ResAllocNode[TypePMem64].Status = ResSubmitted;
986 } else {
987 RootBridgeInstance->ResAllocNode[TypeMem64].Status = ResSubmitted;
988 }
989 }
990 break;
991
992 case 1:
993 AddrLen = (UINTN) Ptr->AddrLen;
994 Alignment = (UINTN) Ptr->AddrRangeMax;
995 RootBridgeInstance->ResAllocNode[TypeIo].Length = AddrLen;
996 RootBridgeInstance->ResAllocNode[TypeIo].Alignment = Alignment;
997 RootBridgeInstance->ResAllocNode[TypeIo].Status = ResRequested;
998 HostBridgeInstance->ResourceSubmited = TRUE;
999 break;
1000
1001 default:
1002 break;
1003 };
1004
1005 Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) ;
1006 }
1007
1008 return EFI_SUCCESS;
1009 }
1010
1011 List = List->ForwardLink;
1012 }
1013
1014 return EFI_INVALID_PARAMETER;
1015 }
1016
1017 /**
1018 Returns the proposed resource settings for the specified PCI root bridge.
1019
1020 This member function returns the proposed resource settings for the specified PCI root bridge. The
1021 proposed resource settings are prepared when NotifyPhase() is called with a Phase of
1022 EfiPciHostBridgeAllocateResources. The output parameter Configuration
1023 specifies the following:
1024 - The various types of resources, excluding bus resources, that are allocated
1025 - The associated lengths in terms of ACPI 2.0 resource descriptor format
1026
1027 @param[in] This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
1028 @param[in] RootBridgeHandle The PCI root bridge handle. Type EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.
1029 @param[out] Configuration The pointer to the pointer to the PCI I/O and memory resource descriptor.
1030
1031 @retval EFI_SUCCESS The requested parameters were returned.
1032 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
1033 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error.
1034 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
1035
1036 **/
1037 EFI_STATUS
1038 EFIAPI
1039 GetProposedResources(
1040 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
1041 IN EFI_HANDLE RootBridgeHandle,
1042 OUT VOID **Configuration
1043 )
1044 {
1045 LIST_ENTRY *List;
1046 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
1047 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
1048 UINTN Index;
1049 UINTN Number;
1050 VOID *Buffer;
1051 UINT8 *Temp;
1052 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;
1053 UINT64 ResStatus;
1054
1055 Buffer = NULL;
1056 Number = 0;
1057 //
1058 // Get the Host Bridge Instance from the resource allocation protocol
1059 //
1060 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
1061 List = HostBridgeInstance->Head.ForwardLink;
1062
1063 //
1064 // Enumerate the root bridges in this host bridge
1065 //
1066 while (List != &HostBridgeInstance->Head) {
1067 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
1068 if (RootBridgeHandle == RootBridgeInstance->Handle) {
1069 for (Index = 0; Index < TypeBus; Index ++) {
1070 if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
1071 Number ++;
1072 }
1073 }
1074
1075 if (Number == 0) {
1076 return EFI_INVALID_PARAMETER;
1077 }
1078
1079 Buffer = AllocateZeroPool (Number * sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof(EFI_ACPI_END_TAG_DESCRIPTOR));
1080 if (Buffer == NULL) {
1081 return EFI_OUT_OF_RESOURCES;
1082 }
1083
1084 Temp = Buffer;
1085 for (Index = 0; Index < TypeBus; Index ++) {
1086 if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
1087 Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;
1088 ResStatus = RootBridgeInstance->ResAllocNode[Index].Status;
1089
1090 switch (Index) {
1091
1092 case TypeIo:
1093 //
1094 // Io
1095 //
1096 Ptr->Desc = 0x8A;
1097 Ptr->Len = 0x2B;
1098 Ptr->ResType = 1;
1099 Ptr->GenFlag = 0;
1100 Ptr->SpecificFlag = 0;
1101 Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;
1102 Ptr->AddrRangeMax = 0;
1103 Ptr->AddrTranslationOffset = \
1104 (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;
1105 Ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
1106 break;
1107
1108 case TypeMem32:
1109 //
1110 // Memory 32
1111 //
1112 Ptr->Desc = 0x8A;
1113 Ptr->Len = 0x2B;
1114 Ptr->ResType = 0;
1115 Ptr->GenFlag = 0;
1116 Ptr->SpecificFlag = 0;
1117 Ptr->AddrSpaceGranularity = 32;
1118 Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;
1119 Ptr->AddrRangeMax = 0;
1120 Ptr->AddrTranslationOffset = \
1121 (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;
1122 Ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
1123 break;
1124
1125 case TypePMem32:
1126 //
1127 // Prefetch memory 32
1128 //
1129 Ptr->Desc = 0x8A;
1130 Ptr->Len = 0x2B;
1131 Ptr->ResType = 0;
1132 Ptr->GenFlag = 0;
1133 Ptr->SpecificFlag = 6;
1134 Ptr->AddrSpaceGranularity = 32;
1135 Ptr->AddrRangeMin = 0;
1136 Ptr->AddrRangeMax = 0;
1137 Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
1138 Ptr->AddrLen = 0;
1139 break;
1140
1141 case TypeMem64:
1142 //
1143 // Memory 64
1144 //
1145 Ptr->Desc = 0x8A;
1146 Ptr->Len = 0x2B;
1147 Ptr->ResType = 0;
1148 Ptr->GenFlag = 0;
1149 Ptr->SpecificFlag = 0;
1150 Ptr->AddrSpaceGranularity = 64;
1151 Ptr->AddrRangeMin = 0;
1152 Ptr->AddrRangeMax = 0;
1153 Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
1154 Ptr->AddrLen = 0;
1155 break;
1156
1157 case TypePMem64:
1158 //
1159 // Prefetch memory 64
1160 //
1161 Ptr->Desc = 0x8A;
1162 Ptr->Len = 0x2B;
1163 Ptr->ResType = 0;
1164 Ptr->GenFlag = 0;
1165 Ptr->SpecificFlag = 6;
1166 Ptr->AddrSpaceGranularity = 64;
1167 Ptr->AddrRangeMin = 0;
1168 Ptr->AddrRangeMax = 0;
1169 Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
1170 Ptr->AddrLen = 0;
1171 break;
1172 };
1173
1174 Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
1175 }
1176 }
1177
1178 ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79;
1179 ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Checksum = 0x0;
1180
1181 *Configuration = Buffer;
1182
1183 return EFI_SUCCESS;
1184 }
1185
1186 List = List->ForwardLink;
1187 }
1188
1189 return EFI_INVALID_PARAMETER;
1190 }
1191
1192 /**
1193 Provides the hooks from the PCI bus driver to every PCI controller (device/function) at various
1194 stages of the PCI enumeration process that allow the host bridge driver to preinitialize individual
1195 PCI controllers before enumeration.
1196
1197 This function is called during the PCI enumeration process. No specific action is expected from this
1198 member function. It allows the host bridge driver to preinitialize individual PCI controllers before
1199 enumeration.
1200
1201 @param This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
1202 @param RootBridgeHandle The associated PCI root bridge handle. Type EFI_HANDLE is defined in
1203 InstallProtocolInterface() in the UEFI 2.0 Specification.
1204 @param PciAddress The address of the PCI device on the PCI bus. This address can be passed to the
1205 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL member functions to access the PCI
1206 configuration space of the device. See Table 12-1 in the UEFI 2.0 Specification for
1207 the definition of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS.
1208 @param Phase The phase of the PCI device enumeration.
1209
1210 @retval EFI_SUCCESS The requested parameters were returned.
1211 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
1212 @retval EFI_INVALID_PARAMETER Phase is not a valid phase that is defined in
1213 EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE.
1214 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error. The PCI enumerator should
1215 not enumerate this device, including its child devices if it is a PCI-to-PCI
1216 bridge.
1217
1218 **/
1219 EFI_STATUS
1220 EFIAPI
1221 PreprocessController (
1222 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
1223 IN EFI_HANDLE RootBridgeHandle,
1224 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,
1225 IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase
1226 )
1227 {
1228 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
1229 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
1230 LIST_ENTRY *List;
1231
1232 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
1233 List = HostBridgeInstance->Head.ForwardLink;
1234
1235 //
1236 // Enumerate the root bridges in this host bridge
1237 //
1238 while (List != &HostBridgeInstance->Head) {
1239 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
1240 if (RootBridgeHandle == RootBridgeInstance->Handle) {
1241 break;
1242 }
1243 List = List->ForwardLink;
1244 }
1245 if (List == &HostBridgeInstance->Head) {
1246 return EFI_INVALID_PARAMETER;
1247 }
1248
1249 if ((UINT32)Phase > EfiPciBeforeResourceCollection) {
1250 return EFI_INVALID_PARAMETER;
1251 }
1252
1253 return EFI_SUCCESS;
1254 }
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