1 /** @file NorFlashDxe.h
3 Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15 #ifndef __NOR_FLASH_DXE_H__
16 #define __NOR_FLASH_DXE_H__
22 #include <Guid/EventGroup.h>
24 #include <Protocol/BlockIo.h>
25 #include <Protocol/DiskIo.h>
26 #include <Protocol/FirmwareVolumeBlock.h>
28 #include <Library/DebugLib.h>
29 #include <Library/IoLib.h>
30 #include <Library/NorFlashPlatformLib.h>
31 #include <Library/UefiLib.h>
32 #include <Library/UefiRuntimeLib.h>
34 #define NOR_FLASH_ERASE_RETRY 10
36 // Device access macros
37 // These are necessary because we use 2 x 16bit parts to make up 32bit data
39 #define HIGH_16_BITS 0xFFFF0000
40 #define LOW_16_BITS 0x0000FFFF
41 #define LOW_8_BITS 0x000000FF
43 #define FOLD_32BIT_INTO_16BIT(value) ( ( value >> 16 ) | ( value & LOW_16_BITS ) )
45 #define GET_LOW_BYTE(value) ( value & LOW_8_BITS )
46 #define GET_HIGH_BYTE(value) ( GET_LOW_BYTE( value >> 16 ) )
48 // Each command must be sent simultaneously to both chips,
49 // i.e. at the lower 16 bits AND at the higher 16 bits
50 #define CREATE_NOR_ADDRESS(BaseAddr,OffsetAddr) ((BaseAddr) + ((OffsetAddr) << 2))
51 #define CREATE_DUAL_CMD(Cmd) ( ( Cmd << 16) | ( Cmd & LOW_16_BITS) )
52 #define SEND_NOR_COMMAND(BaseAddr,Offset,Cmd) MmioWrite32 (CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))
53 #define GET_NOR_BLOCK_ADDRESS(BaseAddr,Lba,LbaSize)( BaseAddr + (UINTN)((Lba) * LbaSize) )
55 // Status Register Bits
56 #define P30_SR_BIT_WRITE (BIT7 << 16 | BIT7)
57 #define P30_SR_BIT_ERASE_SUSPEND (BIT6 << 16 | BIT6)
58 #define P30_SR_BIT_ERASE (BIT5 << 16 | BIT5)
59 #define P30_SR_BIT_PROGRAM (BIT4 << 16 | BIT4)
60 #define P30_SR_BIT_VPP (BIT3 << 16 | BIT3)
61 #define P30_SR_BIT_PROGRAM_SUSPEND (BIT2 << 16 | BIT2)
62 #define P30_SR_BIT_BLOCK_LOCKED (BIT1 << 16 | BIT1)
63 #define P30_SR_BIT_BEFP (BIT0 << 16 | BIT0)
65 // Device Commands for Intel StrataFlash(R) Embedded Memory (P30) Family
67 // On chip buffer size for buffered programming operations
68 // There are 2 chips, each chip can buffer up to 32 (16-bit)words, and each word is 2 bytes.
69 // Therefore the total size of the buffer is 2 x 32 x 2 = 128 bytes
70 #define P30_MAX_BUFFER_SIZE_IN_BYTES ((UINTN)128)
71 #define P30_MAX_BUFFER_SIZE_IN_WORDS (P30_MAX_BUFFER_SIZE_IN_BYTES/((UINTN)4))
72 #define MAX_BUFFERED_PROG_ITERATIONS 10000000
73 #define BOUNDARY_OF_32_WORDS 0x7F
76 #define P30_CFI_ADDR_QUERY_UNIQUE_QRY 0x10
77 #define P30_CFI_ADDR_VENDOR_ID 0x13
80 #define CFI_QRY 0x00595251
83 #define P30_CMD_READ_DEVICE_ID 0x0090
84 #define P30_CMD_READ_STATUS_REGISTER 0x0070
85 #define P30_CMD_CLEAR_STATUS_REGISTER 0x0050
86 #define P30_CMD_READ_ARRAY 0x00FF
87 #define P30_CMD_READ_CFI_QUERY 0x0098
90 #define P30_CMD_WORD_PROGRAM_SETUP 0x0040
91 #define P30_CMD_ALTERNATE_WORD_PROGRAM_SETUP 0x0010
92 #define P30_CMD_BUFFERED_PROGRAM_SETUP 0x00E8
93 #define P30_CMD_BUFFERED_PROGRAM_CONFIRM 0x00D0
94 #define P30_CMD_BEFP_SETUP 0x0080
95 #define P30_CMD_BEFP_CONFIRM 0x00D0
98 #define P30_CMD_BLOCK_ERASE_SETUP 0x0020
99 #define P30_CMD_BLOCK_ERASE_CONFIRM 0x00D0
102 #define P30_CMD_PROGRAM_OR_ERASE_SUSPEND 0x00B0
103 #define P30_CMD_SUSPEND_RESUME 0x00D0
105 // BLOCK LOCKING / UNLOCKING Commands
106 #define P30_CMD_LOCK_BLOCK_SETUP 0x0060
107 #define P30_CMD_LOCK_BLOCK 0x0001
108 #define P30_CMD_UNLOCK_BLOCK 0x00D0
109 #define P30_CMD_LOCK_DOWN_BLOCK 0x002F
111 // PROTECTION Commands
112 #define P30_CMD_PROGRAM_PROTECTION_REGISTER_SETUP 0x00C0
114 // CONFIGURATION Commands
115 #define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP 0x0060
116 #define P30_CMD_READ_CONFIGURATION_REGISTER 0x0003
118 #define NOR_FLASH_SIGNATURE SIGNATURE_32('n', 'o', 'r', '0')
119 #define INSTANCE_FROM_FVB_THIS(a) CR(a, NOR_FLASH_INSTANCE, FvbProtocol, NOR_FLASH_SIGNATURE)
120 #define INSTANCE_FROM_BLKIO_THIS(a) CR(a, NOR_FLASH_INSTANCE, BlockIoProtocol, NOR_FLASH_SIGNATURE)
121 #define INSTANCE_FROM_DISKIO_THIS(a) CR(a, NOR_FLASH_INSTANCE, DiskIoProtocol, NOR_FLASH_SIGNATURE)
123 typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE
;
125 typedef EFI_STATUS (*NOR_FLASH_INITIALIZE
) (NOR_FLASH_INSTANCE
* Instance
);
128 VENDOR_DEVICE_PATH Vendor
;
129 EFI_DEVICE_PATH_PROTOCOL End
;
130 } NOR_FLASH_DEVICE_PATH
;
132 struct _NOR_FLASH_INSTANCE
{
137 NOR_FLASH_INITIALIZE Initialize
;
139 UINTN DeviceBaseAddress
;
140 UINTN RegionBaseAddress
;
144 EFI_BLOCK_IO_PROTOCOL BlockIoProtocol
;
145 EFI_BLOCK_IO_MEDIA Media
;
146 EFI_DISK_IO_PROTOCOL DiskIoProtocol
;
149 EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL FvbProtocol
;
152 NOR_FLASH_DEVICE_PATH DevicePath
;
155 extern CONST EFI_GUID
* CONST mNorFlashVariableGuid
;
158 NorFlashReadCfiData (
159 IN UINTN DeviceBaseAddress
,
161 IN UINT32 NumberOfBytes
,
166 NorFlashWriteBuffer (
167 IN NOR_FLASH_INSTANCE
*Instance
,
168 IN UINTN TargetAddress
,
169 IN UINTN BufferSizeInBytes
,
174 // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset
178 NorFlashBlockIoReset (
179 IN EFI_BLOCK_IO_PROTOCOL
*This
,
180 IN BOOLEAN ExtendedVerification
184 // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.ReadBlocks
188 NorFlashBlockIoReadBlocks (
189 IN EFI_BLOCK_IO_PROTOCOL
*This
,
192 IN UINTN BufferSizeInBytes
,
197 // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.WriteBlocks
201 NorFlashBlockIoWriteBlocks (
202 IN EFI_BLOCK_IO_PROTOCOL
*This
,
205 IN UINTN BufferSizeInBytes
,
210 // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.FlushBlocks
214 NorFlashBlockIoFlushBlocks (
215 IN EFI_BLOCK_IO_PROTOCOL
*This
219 // DiskIO Protocol function EFI_DISK_IO_PROTOCOL.ReadDisk
223 NorFlashDiskIoReadDisk (
224 IN EFI_DISK_IO_PROTOCOL
*This
,
232 // DiskIO Protocol function EFI_DISK_IO_PROTOCOL.WriteDisk
236 NorFlashDiskIoWriteDisk (
237 IN EFI_DISK_IO_PROTOCOL
*This
,
250 NorFlashFvbInitialize (
251 IN NOR_FLASH_INSTANCE
* Instance
257 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL
*This
,
258 OUT EFI_FVB_ATTRIBUTES_2
*Attributes
264 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL
*This
,
265 IN OUT EFI_FVB_ATTRIBUTES_2
*Attributes
270 FvbGetPhysicalAddress(
271 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL
*This
,
272 OUT EFI_PHYSICAL_ADDRESS
*Address
278 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL
*This
,
280 OUT UINTN
*BlockSize
,
281 OUT UINTN
*NumberOfBlocks
287 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL
*This
,
290 IN OUT UINTN
*NumBytes
,
297 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL
*This
,
300 IN OUT UINTN
*NumBytes
,
307 IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL
*This
,
316 NorFlashUnlockAndEraseSingleBlock (
317 IN NOR_FLASH_INSTANCE
*Instance
,
318 IN UINTN BlockAddress
322 NorFlashWriteSingleBlock (
323 IN NOR_FLASH_INSTANCE
*Instance
,
326 IN OUT UINTN
*NumBytes
,
331 NorFlashWriteBlocks (
332 IN NOR_FLASH_INSTANCE
*Instance
,
334 IN UINTN BufferSizeInBytes
,
340 IN NOR_FLASH_INSTANCE
*Instance
,
342 IN UINTN BufferSizeInBytes
,
348 IN NOR_FLASH_INSTANCE
*Instance
,
351 IN UINTN BufferSizeInBytes
,
357 IN NOR_FLASH_INSTANCE
*Instance
,
360 IN OUT UINTN
*NumBytes
,
366 IN NOR_FLASH_INSTANCE
*Instance
369 #endif /* __NOR_FLASH_DXE_H__ */