3 * Copyright (c) 2011-2012, ARM Limited. All rights reserved.
5 * SPDX-License-Identifier: BSD-2-Clause-Patent
9 #include "PrePeiCore.h"
23 IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint
26 EFI_SEC_PEI_HAND_OFF SecCoreData
;
28 EFI_PEI_PPI_DESCRIPTOR
*PpiList
;
29 UINTN TemporaryRamBase
;
30 UINTN TemporaryRamSize
;
32 CreatePpiList (&PpiListSize
, &PpiList
);
34 // Adjust the Temporary Ram as the new Ppi List (Common + Platform Ppi Lists) is created at
35 // the base of the primary core stack
36 PpiListSize
= ALIGN_VALUE(PpiListSize
, CPU_STACK_ALIGNMENT
);
37 TemporaryRamBase
= (UINTN
)PcdGet64 (PcdCPUCoresStackBase
) + PpiListSize
;
38 TemporaryRamSize
= (UINTN
)PcdGet32 (PcdCPUCorePrimaryStackSize
) - PpiListSize
;
41 // Bind this information into the SEC hand-off state
42 // Note: this must be in sync with the stuff in the asm file
43 // Note also: HOBs (pei temp ram) MUST be above stack
45 SecCoreData
.DataSize
= sizeof(EFI_SEC_PEI_HAND_OFF
);
46 SecCoreData
.BootFirmwareVolumeBase
= (VOID
*)(UINTN
)PcdGet64 (PcdFvBaseAddress
);
47 SecCoreData
.BootFirmwareVolumeSize
= PcdGet32 (PcdFvSize
);
48 SecCoreData
.TemporaryRamBase
= (VOID
*)TemporaryRamBase
; // We run on the primary core (and so we use the first stack)
49 SecCoreData
.TemporaryRamSize
= TemporaryRamSize
;
50 SecCoreData
.PeiTemporaryRamBase
= SecCoreData
.TemporaryRamBase
;
51 SecCoreData
.PeiTemporaryRamSize
= ALIGN_VALUE (SecCoreData
.TemporaryRamSize
/ 2, CPU_STACK_ALIGNMENT
);
52 SecCoreData
.StackBase
= (VOID
*)((UINTN
)SecCoreData
.TemporaryRamBase
+ SecCoreData
.PeiTemporaryRamSize
);
53 SecCoreData
.StackSize
= (TemporaryRamBase
+ TemporaryRamSize
) - (UINTN
)SecCoreData
.StackBase
;
55 // Jump to PEI core entry point
56 (PeiCoreEntryPoint
)(&SecCoreData
, PpiList
);