2 * Main file supporting the transition to PEI Core in Normal World for Versatile Express
4 * Copyright (c) 2011, ARM Limited. All rights reserved.
6 * This program and the accompanying materials
7 * are licensed and made available under the terms and conditions of the BSD License
8 * which accompanies this distribution. The full text of the license may be found at
9 * http://opensource.org/licenses/bsd-license.php
11 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15 #ifndef __PREPEICORE_H_
16 #define __PREPEICORE_H_
18 #include <Library/ArmLib.h>
19 #include <Library/ArmPlatformLib.h>
20 #include <Library/BaseMemoryLib.h>
21 #include <Library/DebugLib.h>
22 #include <Library/IoLib.h>
23 #include <Library/PcdLib.h>
26 #include <Ppi/TemporaryRamSupport.h>
30 OUT UINTN
*PpiListSize
,
31 OUT EFI_PEI_PPI_DESCRIPTOR
**PpiList
36 PrePeiCoreTemporaryRamSupport (
37 IN CONST EFI_PEI_SERVICES
**PeiServices
,
38 IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase
,
39 IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase
,
44 PrePeiCoreGetGlobalVariableMemory (
45 OUT EFI_PHYSICAL_ADDRESS
*GlobalVariableBase
53 // Vector Table for Pei Phase
54 VOID
PeiVectorTable (VOID
);
59 IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint
63 * This is the main function for secondary cores. They loop around until a non Null value is written to
64 * SYS_FLAGS register.The SYS_FLAGS register is platform specific.
65 * Note:The secondary cores, while executing secondary_main, assumes that:
66 * : SGI 0 is configured as Non-secure interrupt
67 * : Priority Mask is configured to allow SGI 0
68 * : Interrupt Distributor and CPU interfaces are enabled
78 PeiCommonExceptionEntry (