2 * Main file supporting the transition to PEI Core in Normal World for Versatile Express
4 * Copyright (c) 2011, ARM Limited. All rights reserved.
6 * SPDX-License-Identifier: BSD-2-Clause-Patent
9 #ifndef __PREPEICORE_H_
10 #define __PREPEICORE_H_
12 #include <Library/ArmLib.h>
13 #include <Library/ArmPlatformLib.h>
14 #include <Library/BaseMemoryLib.h>
15 #include <Library/DebugLib.h>
16 #include <Library/IoLib.h>
17 #include <Library/PcdLib.h>
20 #include <Ppi/TemporaryRamSupport.h>
24 OUT UINTN
*PpiListSize
,
25 OUT EFI_PEI_PPI_DESCRIPTOR
**PpiList
30 PrePeiCoreTemporaryRamSupport (
31 IN CONST EFI_PEI_SERVICES
**PeiServices
,
32 IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase
,
33 IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase
,
42 // Vector Table for Pei Phase
43 VOID
PeiVectorTable (VOID
);
48 IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint
52 * This is the main function for secondary cores. They loop around until a non Null value is written to
53 * SYS_FLAGS register.The SYS_FLAGS register is platform specific.
54 * Note:The secondary cores, while executing secondary_main, assumes that:
55 * : SGI 0 is configured as Non-secure interrupt
56 * : Priority Mask is configured to allow SGI 0
57 * : Interrupt Distributor and CPU interfaces are enabled
67 PeiCommonExceptionEntry (