3 * Copyright (c) 2011-2014, ARM Limited. All rights reserved.
5 * This program and the accompanying materials
6 * are licensed and made available under the terms and conditions of the BSD License
7 * which accompanies this distribution. The full text of the license may be found at
8 * http://opensource.org/licenses/bsd-license.php
10 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 #include <Library/DebugAgentLib.h>
18 #include <Library/PrePiLib.h>
19 #include <Library/PrintLib.h>
20 #include <Library/PeCoffGetEntryPointLib.h>
21 #include <Library/PrePiHobListPointerLib.h>
22 #include <Library/TimerLib.h>
23 #include <Library/PerformanceLib.h>
25 #include <Ppi/GuidedSectionExtraction.h>
26 #include <Ppi/ArmMpCoreInfo.h>
27 #include <Guid/LzmaDecompress.h>
30 #include "LzmaDecompress.h"
32 #define IS_XIP() (((UINT64)FixedPcdGet64 (PcdFdBaseAddress) > mSystemMemoryEnd) || \
33 ((FixedPcdGet64 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) < FixedPcdGet64 (PcdSystemMemoryBase)))
37 ExtractGuidedSectionLibConstructor (
43 LzmaDecompressLibConstructor (
55 EFI_PEI_PPI_DESCRIPTOR
*PpiList
;
59 ArmPlatformGetPlatformPpiList (&PpiListSize
, &PpiList
);
60 PpiListCount
= PpiListSize
/ sizeof(EFI_PEI_PPI_DESCRIPTOR
);
61 for (Index
= 0; Index
< PpiListCount
; Index
++, PpiList
++) {
62 if (CompareGuid (PpiList
->Guid
, PpiGuid
) == TRUE
) {
73 IN UINTN UefiMemoryBase
,
75 IN UINT64 StartTimeStamp
78 EFI_HOB_HANDOFF_INFO_TABLE
* HobList
;
79 ARM_MP_CORE_INFO_PPI
* ArmMpCoreInfoPpi
;
81 ARM_CORE_INFO
* ArmCoreInfoTable
;
87 // If ensure the FD is either part of the System Memory or totally outside of the System Memory (XIP)
89 ((FixedPcdGet64 (PcdFdBaseAddress
) >= FixedPcdGet64 (PcdSystemMemoryBase
)) &&
90 ((UINT64
)(FixedPcdGet64 (PcdFdBaseAddress
) + FixedPcdGet32 (PcdFdSize
)) <= (UINT64
)mSystemMemoryEnd
)));
92 // Initialize the architecture specific bits
95 // Initialize the Serial Port
96 SerialPortInitialize ();
97 CharCount
= AsciiSPrint (Buffer
,sizeof (Buffer
),"UEFI firmware (version %s built at %a on %a)\n\r",
98 (CHAR16
*)PcdGetPtr(PcdFirmwareVersionString
), __TIME__
, __DATE__
);
99 SerialPortWrite ((UINT8
*) Buffer
, CharCount
);
101 // Initialize the Debug Agent for Source Level Debugging
102 InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC
, NULL
, NULL
);
103 SaveAndSetDebugTimerInterrupt (TRUE
);
105 // Declare the PI/UEFI memory region
106 HobList
= HobConstructor (
107 (VOID
*)UefiMemoryBase
,
108 FixedPcdGet32 (PcdSystemMemoryUefiRegionSize
),
109 (VOID
*)UefiMemoryBase
,
110 (VOID
*)StacksBase
// The top of the UEFI Memory is reserved for the stacks
112 PrePeiSetHobList (HobList
);
114 // Initialize MMU and Memory HOBs (Resource Descriptor HOBs)
115 Status
= MemoryPeim (UefiMemoryBase
, FixedPcdGet32 (PcdSystemMemoryUefiRegionSize
));
116 ASSERT_EFI_ERROR (Status
);
118 // Create the Stacks HOB (reserve the memory for all stacks)
119 if (ArmIsMpCore ()) {
120 StacksSize
= PcdGet32 (PcdCPUCorePrimaryStackSize
) +
121 ((FixedPcdGet32 (PcdCoreCount
) - 1) * FixedPcdGet32 (PcdCPUCoreSecondaryStackSize
));
123 StacksSize
= PcdGet32 (PcdCPUCorePrimaryStackSize
);
125 BuildStackHob (StacksBase
, StacksSize
);
127 //TODO: Call CpuPei as a library
128 BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize
), PcdGet8 (PcdPrePiCpuIoSize
));
130 if (ArmIsMpCore ()) {
131 // Only MP Core platform need to produce gArmMpCoreInfoPpiGuid
132 Status
= GetPlatformPpi (&gArmMpCoreInfoPpiGuid
, (VOID
**)&ArmMpCoreInfoPpi
);
134 // On MP Core Platform we must implement the ARM MP Core Info PPI (gArmMpCoreInfoPpiGuid)
135 ASSERT_EFI_ERROR (Status
);
137 // Build the MP Core Info Table
139 Status
= ArmMpCoreInfoPpi
->GetMpCoreInfo (&ArmCoreCount
, &ArmCoreInfoTable
);
140 if (!EFI_ERROR(Status
) && (ArmCoreCount
> 0)) {
141 // Build MPCore Info HOB
142 BuildGuidDataHob (&gArmMpCoreInfoGuid
, ArmCoreInfoTable
, sizeof (ARM_CORE_INFO
) * ArmCoreCount
);
147 SetBootMode (ArmPlatformGetBootMode ());
149 // Initialize Platform HOBs (CpuHob and FvHob)
150 Status
= PlatformPeim ();
151 ASSERT_EFI_ERROR (Status
);
153 // Now, the HOB List has been initialized, we can register performance information
154 PERF_START (NULL
, "PEI", NULL
, StartTimeStamp
);
156 // SEC phase needs to run library constructors by hand.
157 ExtractGuidedSectionLibConstructor ();
158 LzmaDecompressLibConstructor ();
160 // Build HOBs to pass up our version of stuff the DXE Core needs to save space
161 BuildPeCoffLoaderHob ();
162 BuildExtractSectionHob (
163 &gLzmaCustomDecompressGuid
,
164 LzmaGuidedSectionGetInfo
,
165 LzmaGuidedSectionExtraction
168 // Assume the FV that contains the SEC (our code) also contains a compressed FV.
169 Status
= DecompressFirstFv ();
170 ASSERT_EFI_ERROR (Status
);
172 // Load the DXE Core and transfer control to it
173 Status
= LoadDxeCoreFromFv (NULL
, 0);
174 ASSERT_EFI_ERROR (Status
);
180 IN UINTN UefiMemoryBase
,
184 UINT64 StartTimeStamp
;
186 // Initialize the platform specific controllers
187 ArmPlatformInitialize (MpId
);
189 if (ArmPlatformIsPrimaryCore (MpId
) && PerformanceMeasurementEnabled ()) {
190 // Initialize the Timer Library to setup the Timer HW controller
192 // We cannot call yet the PerformanceLib because the HOB List has not been initialized
193 StartTimeStamp
= GetPerformanceCounter ();
198 // Data Cache enabled on Primary core when MMU is enabled.
199 ArmDisableDataCache ();
200 // Invalidate Data cache
201 ArmInvalidateDataCache ();
202 // Invalidate instruction cache
203 ArmInvalidateInstructionCache ();
204 // Enable Instruction Caches on all cores.
205 ArmEnableInstructionCache ();
207 // Define the Global Variable region when we are not running in XIP
209 if (ArmPlatformIsPrimaryCore (MpId
)) {
211 // Signal the Global Variable Region is defined (event: ARM_CPU_EVENT_DEFAULT)
215 // Wait the Primay core has defined the address of the Global Variable region (event: ARM_CPU_EVENT_DEFAULT)
220 // If not primary Jump to Secondary Main
221 if (ArmPlatformIsPrimaryCore (MpId
)) {
222 // Goto primary Main.
223 PrimaryMain (UefiMemoryBase
, StacksBase
, StartTimeStamp
);
225 SecondaryMain (MpId
);
228 // DXE Core should always load and never return