]> git.proxmox.com Git - mirror_edk2.git/blob - ArmPlatformPkg/PrePi/PrePi.c
ARM Packages: Remove GCC filter for AARCH64 assembly files
[mirror_edk2.git] / ArmPlatformPkg / PrePi / PrePi.c
1 /** @file
2 *
3 * Copyright (c) 2011-2014, ARM Limited. All rights reserved.
4 *
5 * This program and the accompanying materials
6 * are licensed and made available under the terms and conditions of the BSD License
7 * which accompanies this distribution. The full text of the license may be found at
8 * http://opensource.org/licenses/bsd-license.php
9 *
10 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12 *
13 **/
14
15 #include <PiPei.h>
16
17 #include <Library/DebugAgentLib.h>
18 #include <Library/PrePiLib.h>
19 #include <Library/PrintLib.h>
20 #include <Library/PeCoffGetEntryPointLib.h>
21 #include <Library/PrePiHobListPointerLib.h>
22 #include <Library/TimerLib.h>
23 #include <Library/PerformanceLib.h>
24
25 #include <Ppi/GuidedSectionExtraction.h>
26 #include <Ppi/ArmMpCoreInfo.h>
27 #include <Guid/LzmaDecompress.h>
28 #include <Guid/ArmGlobalVariableHob.h>
29
30 #include "PrePi.h"
31 #include "LzmaDecompress.h"
32
33 #define IS_XIP() (((UINT32)FixedPcdGet32 (PcdFdBaseAddress) > (UINT32)(FixedPcdGet64 (PcdSystemMemoryBase) + FixedPcdGet32 (PcdSystemMemorySize))) || \
34 ((FixedPcdGet32 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) < FixedPcdGet64 (PcdSystemMemoryBase)))
35
36 // Not used when PrePi in run in XIP mode
37 UINTN mGlobalVariableBase = 0;
38
39 EFI_STATUS
40 EFIAPI
41 ExtractGuidedSectionLibConstructor (
42 VOID
43 );
44
45 EFI_STATUS
46 EFIAPI
47 LzmaDecompressLibConstructor (
48 VOID
49 );
50
51 VOID
52 EFIAPI
53 BuildGlobalVariableHob (
54 IN EFI_PHYSICAL_ADDRESS GlobalVariableBase,
55 IN UINT32 GlobalVariableSize
56 )
57 {
58 ARM_HOB_GLOBAL_VARIABLE *Hob;
59
60 Hob = CreateHob (EFI_HOB_TYPE_GUID_EXTENSION, sizeof (ARM_HOB_GLOBAL_VARIABLE));
61 ASSERT(Hob != NULL);
62
63 CopyGuid (&(Hob->Header.Name), &gArmGlobalVariableGuid);
64 Hob->GlobalVariableBase = GlobalVariableBase;
65 Hob->GlobalVariableSize = GlobalVariableSize;
66 }
67
68 EFI_STATUS
69 GetPlatformPpi (
70 IN EFI_GUID *PpiGuid,
71 OUT VOID **Ppi
72 )
73 {
74 UINTN PpiListSize;
75 UINTN PpiListCount;
76 EFI_PEI_PPI_DESCRIPTOR *PpiList;
77 UINTN Index;
78
79 PpiListSize = 0;
80 ArmPlatformGetPlatformPpiList (&PpiListSize, &PpiList);
81 PpiListCount = PpiListSize / sizeof(EFI_PEI_PPI_DESCRIPTOR);
82 for (Index = 0; Index < PpiListCount; Index++, PpiList++) {
83 if (CompareGuid (PpiList->Guid, PpiGuid) == TRUE) {
84 *Ppi = PpiList->Ppi;
85 return EFI_SUCCESS;
86 }
87 }
88
89 return EFI_NOT_FOUND;
90 }
91
92 VOID
93 PrePiMain (
94 IN UINTN UefiMemoryBase,
95 IN UINTN StacksBase,
96 IN UINTN GlobalVariableBase,
97 IN UINT64 StartTimeStamp
98 )
99 {
100 EFI_HOB_HANDOFF_INFO_TABLE* HobList;
101 ARM_MP_CORE_INFO_PPI* ArmMpCoreInfoPpi;
102 UINTN ArmCoreCount;
103 ARM_CORE_INFO* ArmCoreInfoTable;
104 EFI_STATUS Status;
105 CHAR8 Buffer[100];
106 UINTN CharCount;
107 UINTN StacksSize;
108
109 // If ensure the FD is either part of the System Memory or totally outside of the System Memory (XIP)
110 ASSERT (IS_XIP() ||
111 ((FixedPcdGet32 (PcdFdBaseAddress) >= FixedPcdGet64 (PcdSystemMemoryBase)) &&
112 ((UINT32)(FixedPcdGet32 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) <= (UINT32)(FixedPcdGet64 (PcdSystemMemoryBase) + FixedPcdGet64 (PcdSystemMemorySize)))));
113
114 // Initialize the architecture specific bits
115 ArchInitialize ();
116
117 // Initialize the Serial Port
118 SerialPortInitialize ();
119 CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"UEFI firmware (version %s built at %a on %a)\n\r",
120 (CHAR16*)PcdGetPtr(PcdFirmwareVersionString), __TIME__, __DATE__);
121 SerialPortWrite ((UINT8 *) Buffer, CharCount);
122
123 // Initialize the Debug Agent for Source Level Debugging
124 InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, NULL, NULL);
125 SaveAndSetDebugTimerInterrupt (TRUE);
126
127 // Declare the PI/UEFI memory region
128 HobList = HobConstructor (
129 (VOID*)UefiMemoryBase,
130 FixedPcdGet32 (PcdSystemMemoryUefiRegionSize),
131 (VOID*)UefiMemoryBase,
132 (VOID*)StacksBase // The top of the UEFI Memory is reserved for the stacks
133 );
134 PrePeiSetHobList (HobList);
135
136 // Initialize MMU and Memory HOBs (Resource Descriptor HOBs)
137 Status = MemoryPeim (UefiMemoryBase, FixedPcdGet32 (PcdSystemMemoryUefiRegionSize));
138 ASSERT_EFI_ERROR (Status);
139
140 // Create the Stacks HOB (reserve the memory for all stacks)
141 if (ArmIsMpCore ()) {
142 StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize) +
143 ((FixedPcdGet32 (PcdCoreCount) - 1) * FixedPcdGet32 (PcdCPUCoreSecondaryStackSize));
144 } else {
145 StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize);
146 }
147 BuildStackHob (StacksBase, StacksSize);
148
149 // Declare the Global Variable HOB
150 BuildGlobalVariableHob (GlobalVariableBase, FixedPcdGet32 (PcdPeiGlobalVariableSize));
151
152 //TODO: Call CpuPei as a library
153 BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize), PcdGet8 (PcdPrePiCpuIoSize));
154
155 if (ArmIsMpCore ()) {
156 // Only MP Core platform need to produce gArmMpCoreInfoPpiGuid
157 Status = GetPlatformPpi (&gArmMpCoreInfoPpiGuid, (VOID**)&ArmMpCoreInfoPpi);
158
159 // On MP Core Platform we must implement the ARM MP Core Info PPI (gArmMpCoreInfoPpiGuid)
160 ASSERT_EFI_ERROR (Status);
161
162 // Build the MP Core Info Table
163 ArmCoreCount = 0;
164 Status = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable);
165 if (!EFI_ERROR(Status) && (ArmCoreCount > 0)) {
166 // Build MPCore Info HOB
167 BuildGuidDataHob (&gArmMpCoreInfoGuid, ArmCoreInfoTable, sizeof (ARM_CORE_INFO) * ArmCoreCount);
168 }
169 }
170
171 // Set the Boot Mode
172 SetBootMode (ArmPlatformGetBootMode ());
173
174 // Initialize Platform HOBs (CpuHob and FvHob)
175 Status = PlatformPeim ();
176 ASSERT_EFI_ERROR (Status);
177
178 // Now, the HOB List has been initialized, we can register performance information
179 PERF_START (NULL, "PEI", NULL, StartTimeStamp);
180
181 // SEC phase needs to run library constructors by hand.
182 ExtractGuidedSectionLibConstructor ();
183 LzmaDecompressLibConstructor ();
184
185 // Build HOBs to pass up our version of stuff the DXE Core needs to save space
186 BuildPeCoffLoaderHob ();
187 BuildExtractSectionHob (
188 &gLzmaCustomDecompressGuid,
189 LzmaGuidedSectionGetInfo,
190 LzmaGuidedSectionExtraction
191 );
192
193 // Assume the FV that contains the SEC (our code) also contains a compressed FV.
194 Status = DecompressFirstFv ();
195 ASSERT_EFI_ERROR (Status);
196
197 // Load the DXE Core and transfer control to it
198 Status = LoadDxeCoreFromFv (NULL, 0);
199 ASSERT_EFI_ERROR (Status);
200 }
201
202 VOID
203 CEntryPoint (
204 IN UINTN MpId,
205 IN UINTN UefiMemoryBase,
206 IN UINTN StacksBase,
207 IN UINTN GlobalVariableBase
208 )
209 {
210 UINT64 StartTimeStamp;
211
212 ASSERT(!ArmIsMpCore() || (PcdGet32 (PcdCoreCount) > 1));
213
214 // Initialize the platform specific controllers
215 ArmPlatformInitialize (MpId);
216
217 if (ArmPlatformIsPrimaryCore (MpId) && PerformanceMeasurementEnabled ()) {
218 // Initialize the Timer Library to setup the Timer HW controller
219 TimerConstructor ();
220 // We cannot call yet the PerformanceLib because the HOB List has not been initialized
221 StartTimeStamp = GetPerformanceCounter ();
222 } else {
223 StartTimeStamp = 0;
224 }
225
226 // Data Cache enabled on Primary core when MMU is enabled.
227 ArmDisableDataCache ();
228 // Invalidate Data cache
229 ArmInvalidateDataCache ();
230 // Invalidate instruction cache
231 ArmInvalidateInstructionCache ();
232 // Enable Instruction Caches on all cores.
233 ArmEnableInstructionCache ();
234
235 // Define the Global Variable region when we are not running in XIP
236 if (!IS_XIP()) {
237 if (ArmPlatformIsPrimaryCore (MpId)) {
238 mGlobalVariableBase = GlobalVariableBase;
239 if (ArmIsMpCore()) {
240 // Signal the Global Variable Region is defined (event: ARM_CPU_EVENT_DEFAULT)
241 ArmCallSEV ();
242 }
243 } else {
244 // Wait the Primay core has defined the address of the Global Variable region (event: ARM_CPU_EVENT_DEFAULT)
245 ArmCallWFE ();
246 }
247 }
248
249 // If not primary Jump to Secondary Main
250 if (ArmPlatformIsPrimaryCore (MpId)) {
251 // Goto primary Main.
252 PrimaryMain (UefiMemoryBase, StacksBase, GlobalVariableBase, StartTimeStamp);
253 } else {
254 SecondaryMain (MpId);
255 }
256
257 // DXE Core should always load and never return
258 ASSERT (FALSE);
259 }
260