ArmPlatformPkg/PrePi/PrePi.c

   1 /** @file
   2
   3   Copyright (c) 2011-2017, ARM Limited. All rights reserved.
   4
   5   SPDX-License-Identifier: BSD-2-Clause-Patent
   6
   7 **/
   8
   9 #include <PiPei.h>
  10
  11 #include <Library/CacheMaintenanceLib.h>
  12 #include <Library/DebugAgentLib.h>
  13 #include <Library/PrePiLib.h>
  14 #include <Library/PrintLib.h>
  15 #include <Library/PrePiHobListPointerLib.h>
  16 #include <Library/TimerLib.h>
  17 #include <Library/PerformanceLib.h>
  18
  19 #include <Ppi/GuidedSectionExtraction.h>
  20 #include <Ppi/ArmMpCoreInfo.h>
  21 #include <Ppi/SecPerformance.h>
  22
  23 #include "PrePi.h"
  24
  25 #define IS_XIP()  (((UINT64)FixedPcdGet64 (PcdFdBaseAddress) > mSystemMemoryEnd) ||\
  26                   ((FixedPcdGet64 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) <= FixedPcdGet64 (PcdSystemMemoryBase)))
  27
  28 UINT64  mSystemMemoryEnd = FixedPcdGet64 (PcdSystemMemoryBase) +
  29                            FixedPcdGet64 (PcdSystemMemorySize) - 1;
  30
  31 EFI_STATUS
  32 GetPlatformPpi (
  33   IN  EFI_GUID  *PpiGuid,
  34   OUT VOID      **Ppi
  35   )
  36 {
  37   UINTN                   PpiListSize;
  38   UINTN                   PpiListCount;
  39   EFI_PEI_PPI_DESCRIPTOR  *PpiList;
  40   UINTN                   Index;
  41
  42   PpiListSize = 0;
  43   ArmPlatformGetPlatformPpiList (&PpiListSize, &PpiList);
  44   PpiListCount = PpiListSize / sizeof (EFI_PEI_PPI_DESCRIPTOR);
  45   for (Index = 0; Index < PpiListCount; Index++, PpiList++) {
  46     if (CompareGuid (PpiList->Guid, PpiGuid) == TRUE) {
  47       *Ppi = PpiList->Ppi;
  48       return EFI_SUCCESS;
  49     }
  50   }
  51
  52   return EFI_NOT_FOUND;
  53 }
  54
  55 VOID
  56 PrePiMain (
  57   IN  UINTN   UefiMemoryBase,
  58   IN  UINTN   StacksBase,
  59   IN  UINT64  StartTimeStamp
  60   )
  61 {
  62   EFI_HOB_HANDOFF_INFO_TABLE  *HobList;
  63   ARM_MP_CORE_INFO_PPI        *ArmMpCoreInfoPpi;
  64   UINTN                       ArmCoreCount;
  65   ARM_CORE_INFO               *ArmCoreInfoTable;
  66   EFI_STATUS                  Status;
  67   CHAR8                       Buffer[100];
  68   UINTN                       CharCount;
  69   UINTN                       StacksSize;
  70   FIRMWARE_SEC_PERFORMANCE    Performance;
  71
  72   // If ensure the FD is either part of the System Memory or totally outside of the System Memory (XIP)
  73   ASSERT (
  74     IS_XIP () ||
  75     ((FixedPcdGet64 (PcdFdBaseAddress) >= FixedPcdGet64 (PcdSystemMemoryBase)) &&
  76      ((UINT64)(FixedPcdGet64 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) <= (UINT64)mSystemMemoryEnd))
  77     );
  78
  79   // Initialize the architecture specific bits
  80   ArchInitialize ();
  81
  82   // Initialize the Serial Port
  83   SerialPortInitialize ();
  84   CharCount = AsciiSPrint (
  85                 Buffer,
  86                 sizeof (Buffer),
  87                 "UEFI firmware (version %s built at %a on %a)\n\r",
  88                 (CHAR16 *)PcdGetPtr (PcdFirmwareVersionString),
  89                 __TIME__,
  90                 __DATE__
  91                 );
  92   SerialPortWrite ((UINT8 *)Buffer, CharCount);
  93
  94   // Initialize the Debug Agent for Source Level Debugging
  95   InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, NULL, NULL);
  96   SaveAndSetDebugTimerInterrupt (TRUE);
  97
  98   // Declare the PI/UEFI memory region
  99   HobList = HobConstructor (
 100               (VOID *)UefiMemoryBase,
 101               FixedPcdGet32 (PcdSystemMemoryUefiRegionSize),
 102               (VOID *)UefiMemoryBase,
 103               (VOID *)StacksBase // The top of the UEFI Memory is reserved for the stacks
 104               );
 105   PrePeiSetHobList (HobList);
 106
 107   // Initialize MMU and Memory HOBs (Resource Descriptor HOBs)
 108   Status = MemoryPeim (UefiMemoryBase, FixedPcdGet32 (PcdSystemMemoryUefiRegionSize));
 109   ASSERT_EFI_ERROR (Status);
 110
 111   // Create the Stacks HOB (reserve the memory for all stacks)
 112   if (ArmIsMpCore ()) {
 113     StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize) +
 114                  ((FixedPcdGet32 (PcdCoreCount) - 1) * FixedPcdGet32 (PcdCPUCoreSecondaryStackSize));
 115   } else {
 116     StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize);
 117   }
 118
 119   BuildStackHob (StacksBase, StacksSize);
 120
 121   // TODO: Call CpuPei as a library
 122   BuildCpuHob (ArmGetPhysicalAddressBits (), PcdGet8 (PcdPrePiCpuIoSize));
 123
 124   if (ArmIsMpCore ()) {
 125     // Only MP Core platform need to produce gArmMpCoreInfoPpiGuid
 126     Status = GetPlatformPpi (&gArmMpCoreInfoPpiGuid, (VOID **)&ArmMpCoreInfoPpi);
 127
 128     // On MP Core Platform we must implement the ARM MP Core Info PPI (gArmMpCoreInfoPpiGuid)
 129     ASSERT_EFI_ERROR (Status);
 130
 131     // Build the MP Core Info Table
 132     ArmCoreCount = 0;
 133     Status       = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable);
 134     if (!EFI_ERROR (Status) && (ArmCoreCount > 0)) {
 135       // Build MPCore Info HOB
 136       BuildGuidDataHob (&gArmMpCoreInfoGuid, ArmCoreInfoTable, sizeof (ARM_CORE_INFO) * ArmCoreCount);
 137     }
 138   }
 139
 140   // Store timer value logged at the beginning of firmware image execution
 141   Performance.ResetEnd = GetTimeInNanoSecond (StartTimeStamp);
 142
 143   // Build SEC Performance Data Hob
 144   BuildGuidDataHob (&gEfiFirmwarePerformanceGuid, &Performance, sizeof (Performance));
 145
 146   // Set the Boot Mode
 147   SetBootMode (ArmPlatformGetBootMode ());
 148
 149   // Initialize Platform HOBs (CpuHob and FvHob)
 150   Status = PlatformPeim ();
 151   ASSERT_EFI_ERROR (Status);
 152
 153   // Now, the HOB List has been initialized, we can register performance information
 154   PERF_START (NULL, "PEI", NULL, StartTimeStamp);
 155
 156   // SEC phase needs to run library constructors by hand.
 157   ProcessLibraryConstructorList ();
 158
 159   // Assume the FV that contains the SEC (our code) also contains a compressed FV.
 160   Status = DecompressFirstFv ();
 161   ASSERT_EFI_ERROR (Status);
 162
 163   // Load the DXE Core and transfer control to it
 164   Status = LoadDxeCoreFromFv (NULL, 0);
 165   ASSERT_EFI_ERROR (Status);
 166 }
 167
 168 VOID
 169 CEntryPoint (
 170   IN  UINTN  MpId,
 171   IN  UINTN  UefiMemoryBase,
 172   IN  UINTN  StacksBase
 173   )
 174 {
 175   UINT64  StartTimeStamp;
 176
 177   // Initialize the platform specific controllers
 178   ArmPlatformInitialize (MpId);
 179
 180   if (ArmPlatformIsPrimaryCore (MpId) && PerformanceMeasurementEnabled ()) {
 181     // Initialize the Timer Library to setup the Timer HW controller
 182     TimerConstructor ();
 183     // We cannot call yet the PerformanceLib because the HOB List has not been initialized
 184     StartTimeStamp = GetPerformanceCounter ();
 185   } else {
 186     StartTimeStamp = 0;
 187   }
 188
 189   // Data Cache enabled on Primary core when MMU is enabled.
 190   ArmDisableDataCache ();
 191   // Invalidate instruction cache
 192   ArmInvalidateInstructionCache ();
 193   // Enable Instruction Caches on all cores.
 194   ArmEnableInstructionCache ();
 195
 196   // Define the Global Variable region when we are not running in XIP
 197   if (!IS_XIP ()) {
 198     if (ArmPlatformIsPrimaryCore (MpId)) {
 199       if (ArmIsMpCore ()) {
 200         // Signal the Global Variable Region is defined (event: ARM_CPU_EVENT_DEFAULT)
 201         ArmCallSEV ();
 202       }
 203     } else {
 204       // Wait the Primary core has defined the address of the Global Variable region (event: ARM_CPU_EVENT_DEFAULT)
 205       ArmCallWFE ();
 206     }
 207   }
 208
 209   // If not primary Jump to Secondary Main
 210   if (ArmPlatformIsPrimaryCore (MpId)) {
 211     InvalidateDataCacheRange (
 212       (VOID *)UefiMemoryBase,
 213       FixedPcdGet32 (PcdSystemMemoryUefiRegionSize)
 214       );
 215
 216     // Goto primary Main.
 217     PrimaryMain (UefiMemoryBase, StacksBase, StartTimeStamp);
 218   } else {
 219     SecondaryMain (MpId);
 220   }
 221
 222   // DXE Core should always load and never return
 223   ASSERT (FALSE);
 224 }