2 * Main file supporting the SEC Phase on ARM Platforms
4 * Copyright (c) 2011-2012, ARM Limited. All rights reserved.
6 * This program and the accompanying materials
7 * are licensed and made available under the terms and conditions of the BSD License
8 * which accompanies this distribution. The full text of the license may be found at
9 * http://opensource.org/licenses/bsd-license.php
11 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
16 #include <Library/ArmTrustedMonitorLib.h>
17 #include <Library/DebugAgentLib.h>
18 #include <Library/PrintLib.h>
19 #include <Library/BaseMemoryLib.h>
20 #include <Library/SerialPortLib.h>
21 #include <Library/ArmGicLib.h>
23 #include "SecInternal.h"
25 #define SerialPrint(txt) SerialPortWrite ((UINT8*)txt, AsciiStrLen(txt)+1);
36 // Invalidate the data cache. Doesn't have to do the Data cache clean.
37 ArmInvalidateDataCache();
39 // Invalidate Instruction Cache
40 ArmInvalidateInstructionCache();
42 // Invalidate I & D TLBs
43 ArmInvalidateInstructionAndDataTlb();
45 // CPU specific settings
48 // Enable Floating Point Coprocessor if supported by the platform
49 if (FixedPcdGet32 (PcdVFPEnabled
)) {
53 // Initialize peripherals that must be done at the early stage
54 // Example: Some L2 controller, interconnect, clock, DMC, etc
55 ArmPlatformSecInitialize (MpId
);
57 // Primary CPU clears out the SCU tag RAMs, secondaries wait
58 if (IS_PRIMARY_CORE(MpId
)) {
60 // Signal for the initial memory is configured (event: BOOT_MEM_INIT)
64 // SEC phase needs to run library constructors by hand. This assumes we are linked against the SerialLib
65 // In non SEC modules the init call is in autogenerated code.
66 SerialPortInitialize ();
69 if (FixedPcdGetBool (PcdTrustzoneSupport
)) {
70 CharCount
= AsciiSPrint (Buffer
,sizeof (Buffer
),"Secure firmware (version %s built at %a on %a)\n\r",
71 (CHAR16
*)PcdGetPtr(PcdFirmwareVersionString
), __TIME__
, __DATE__
);
73 CharCount
= AsciiSPrint (Buffer
,sizeof (Buffer
),"Boot firmware (version %s built at %a on %a)\n\r",
74 (CHAR16
*)PcdGetPtr(PcdFirmwareVersionString
), __TIME__
, __DATE__
);
76 SerialPortWrite ((UINT8
*) Buffer
, CharCount
);
78 // Initialize the Debug Agent for Source Level Debugging
79 InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC
, NULL
, NULL
);
80 SaveAndSetDebugTimerInterrupt (TRUE
);
82 // Now we've got UART, make the check:
83 // - The Vector table must be 32-byte aligned
84 ASSERT(((UINT32
)SecVectorTable
& ((1 << 5)-1)) == 0);
86 // Enable the GIC distributor and CPU Interface
87 // - no other Interrupts are enabled, doesn't have to worry about the priority.
88 // - all the cores are in secure state, use secure SGI's
89 ArmGicEnableDistributor (PcdGet32(PcdGicDistributorBase
));
90 ArmGicEnableInterruptInterface (PcdGet32(PcdGicInterruptInterfaceBase
));
92 // Enable the GIC CPU Interface
93 ArmGicEnableInterruptInterface (PcdGet32(PcdGicInterruptInterfaceBase
));
96 // Enable Full Access to CoProcessors
97 ArmWriteCpacr (CPACR_CP_FULL_ACCESS
);
99 // Test if Trustzone is supported on this platform
100 if (FixedPcdGetBool (PcdTrustzoneSupport
)) {
102 // Setup SMP in Non Secure world
103 ArmCpuSetupSmpNonSecure (GET_CORE_ID(MpId
));
106 // Either we use the Secure Stacks for Secure Monitor (in this case (Base == 0) && (Size == 0))
107 // Or we use separate Secure Monitor stacks (but (Base != 0) && (Size != 0))
108 ASSERT (((PcdGet32(PcdCPUCoresSecMonStackBase
) == 0) && (PcdGet32(PcdCPUCoreSecMonStackSize
) == 0)) ||
109 ((PcdGet32(PcdCPUCoresSecMonStackBase
) != 0) && (PcdGet32(PcdCPUCoreSecMonStackSize
) != 0)));
111 // Enter Monitor Mode
112 enter_monitor_mode ((UINTN
)TrustedWorldInitialization
, MpId
, (VOID
*)(PcdGet32(PcdCPUCoresSecMonStackBase
) + (PcdGet32(PcdCPUCoreSecMonStackSize
) * (GET_CORE_POS(MpId
) + 1))));
114 if (IS_PRIMARY_CORE(MpId
)) {
115 SerialPrint ("Trust Zone Configuration is disabled\n\r");
118 // With Trustzone support the transition from Sec to Normal world is done by return_from_exception().
119 // If we want to keep this function call we need to ensure the SVC's SPSR point to the same Program
120 // Status Register as the the current one (CPSR).
121 copy_cpsr_into_spsr ();
123 // Call the Platform specific function to execute additional actions if required
124 JumpAddress
= PcdGet32 (PcdFvBaseAddress
);
125 ArmPlatformSecExtraAction (MpId
, &JumpAddress
);
127 NonTrustedWorldTransition (MpId
, JumpAddress
);
129 ASSERT (0); // We must never return from the above function
133 TrustedWorldInitialization (
139 //-------------------- Monitor Mode ---------------------
141 // Set up Monitor World (Vector Table, etc)
142 ArmSecureMonitorWorldInitialize ();
144 // Transfer the interrupt to Non-secure World
145 ArmGicSetupNonSecure (MpId
, PcdGet32(PcdGicDistributorBase
), PcdGet32(PcdGicInterruptInterfaceBase
));
147 // Initialize platform specific security policy
148 ArmPlatformSecTrustzoneInit (MpId
);
150 // Setup the Trustzone Chipsets
151 if (IS_PRIMARY_CORE(MpId
)) {
153 // Signal the secondary core the Security settings is done (event: EVENT_SECURE_INIT)
157 // The secondary cores need to wait until the Trustzone chipsets configuration is done
158 // before switching to Non Secure World
160 // Wait for the Primary Core to finish the initialization of the Secure World (event: EVENT_SECURE_INIT)
164 // Call the Platform specific function to execute additional actions if required
165 JumpAddress
= PcdGet32 (PcdFvBaseAddress
);
166 ArmPlatformSecExtraAction (MpId
, &JumpAddress
);
168 // Write to CP15 Non-secure Access Control Register
169 ArmWriteNsacr (PcdGet32 (PcdArmNsacr
));
171 // CP15 Secure Configuration Register
172 ArmWriteScr (PcdGet32 (PcdArmScr
));
174 NonTrustedWorldTransition (MpId
, JumpAddress
);
178 NonTrustedWorldTransition (
183 // If PcdArmNonSecModeTransition is defined then set this specific mode to CPSR before the transition
184 // By not set, the mode for Non Secure World is SVC
185 if (PcdGet32 (PcdArmNonSecModeTransition
) != 0) {
186 set_non_secure_mode ((ARM_PROCESSOR_MODE
)PcdGet32 (PcdArmNonSecModeTransition
));
189 return_from_exception (JumpAddress
);
190 //-------------------- Non Secure Mode ---------------------
192 // PEI Core should always load and never return
197 SecCommonExceptionEntry (
207 CharCount
= AsciiSPrint (Buffer
,sizeof (Buffer
),"Reset Exception at 0x%X\n\r",LR
);
210 CharCount
= AsciiSPrint (Buffer
,sizeof (Buffer
),"Undefined Exception at 0x%X\n\r",LR
);
213 CharCount
= AsciiSPrint (Buffer
,sizeof (Buffer
),"SWI Exception at 0x%X\n\r",LR
);
216 CharCount
= AsciiSPrint (Buffer
,sizeof (Buffer
),"PrefetchAbort Exception at 0x%X\n\r",LR
);
219 CharCount
= AsciiSPrint (Buffer
,sizeof (Buffer
),"DataAbort Exception at 0x%X\n\r",LR
);
222 CharCount
= AsciiSPrint (Buffer
,sizeof (Buffer
),"Reserved Exception at 0x%X\n\r",LR
);
225 CharCount
= AsciiSPrint (Buffer
,sizeof (Buffer
),"IRQ Exception at 0x%X\n\r",LR
);
228 CharCount
= AsciiSPrint (Buffer
,sizeof (Buffer
),"FIQ Exception at 0x%X\n\r",LR
);
231 CharCount
= AsciiSPrint (Buffer
,sizeof (Buffer
),"Unknown Exception at 0x%X\n\r",LR
);
234 SerialPortWrite ((UINT8
*) Buffer
, CharCount
);