2 // Copyright (c) 2011, ARM Limited. All rights reserved.
4 // This program and the accompanying materials
5 // are licensed and made available under the terms and conditions of the BSD License
6 // which accompanies this distribution. The full text of the license may be found at
7 // http://opensource.org/licenses/bsd-license.php
9 // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15 #include <AsmMacroIoLib.h>
17 #include <Library/PcdLib.h>
18 #include <Library/ArmPlatformLib.h>
20 INCLUDE AsmMacroIoLib.inc
23 IMPORT ArmPlatformSecBootAction
24 IMPORT ArmPlatformInitializeBootMemory
25 IMPORT ArmDisableInterrupts
26 IMPORT ArmDisableCachesAndMmu
30 EXPORT _ModuleEntryPoint
32 #if (FixedPcdGet32(PcdMPCoreSupport))
37 AREA SecEntryPoint, CODE, READONLY
39 StartupAddr DCD CEntryPoint
42 // First ensure all interrupts are disabled
43 blx ArmDisableInterrupts
45 // Ensure that the MMU and caches are off
46 blx ArmDisableCachesAndMmu
48 // Jump to Platform Specific Boot Action function
49 blx ArmPlatformSecBootAction
51 // Set VBAR to the start of the exception vectors in Secure Mode
52 ldr r0, =SecVectorTable
58 // Get ID of this CPU in Multicore system
59 LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)
62 // Is it the Primary Core ?
63 LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r1)
65 // Only the primary core initialize the memory (SMC)
68 #if (FixedPcdGet32(PcdMPCoreSupport))
69 // ... The secondary cores wait for SCU to be enabled
73 beq _WaitForEnabledScu
74 b _SetupSecondaryCoreStack
78 // Initialize Init Boot Memory
79 bl ArmPlatformInitializeBootMemory
81 // Only Primary CPU could run this line (the secondary cores have jumped from _IdentifyCpu to _SetupStack)
82 LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r5)
84 _SetupPrimaryCoreStack
85 LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r2)
86 LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r3)
87 // Calculate the Top of the Stack
89 LoadConstantToReg (FixedPcdGet32(PcdSecGlobalVariableSize), r3)
91 // The reserved space for global variable must be 8-bytes aligned for pushing
92 // 64-bit variable on the stack
93 SetPrimaryStack (r2, r3, r1)
95 // Set all the SEC global variables to 0
105 _SetupSecondaryCoreStack
106 // Get the Core Position (ClusterId * 4) + CoreId
107 GetCorePositionInStack(r0, r5, r1)
108 // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
111 // Get the base of the stack for the secondary cores
112 LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)
113 LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecSecondaryStackSize), r2)
116 // StackOffset = CorePos * StackSize
118 // SP = StackBase + StackOffset
123 // Move sec startup address into a data register
124 // Ensure we're jumping to FV version of the code (not boot remapped alias)
127 // Jump to SEC C code