2 C Entry point for the SEC. First C code after the reset vector.
4 Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 #include <Ppi/TemporaryRamSupport.h>
18 #include <Library/PcdLib.h>
19 #include <Library/IoLib.h>
20 #include <Library/BaseLib.h>
21 #include <Library/BaseMemoryLib.h>
22 #include <ArmEb/ArmEb.h>
26 SecTemporaryRamSupport (
27 IN CONST EFI_PEI_SERVICES
**PeiServices
,
28 IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase
,
29 IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase
,
38 TEMPORARY_RAM_SUPPORT_PPI mSecTemporaryRamSupportPpi
= {SecTemporaryRamSupport
};
40 EFI_PEI_PPI_DESCRIPTOR gSecPpiTable
[] = {
42 EFI_PEI_PPI_DESCRIPTOR_PPI
| EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST
,
43 &gEfiTemporaryRamSupportPpiGuid
,
44 &mSecTemporaryRamSupportPpi
59 IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint
62 EFI_SEC_PEI_HAND_OFF SecCoreData
;
64 // Turn off remapping NOR to 0. We can will now see DRAM in low memory (although it is not yet initialized)
65 // note: this makes SEC platform-specific for the EB platform
66 MmioOr32 (0x10001000 ,BIT8
); //EB_SP810_CTRL_BASE
69 // Bind this information into the SEC hand-off state
70 // Note: this must be in sync with the stuff in the asm file
71 // Note also: HOBs (pei temp ram) MUST be above stack
73 SecCoreData
.DataSize
= sizeof(EFI_SEC_PEI_HAND_OFF
);
74 SecCoreData
.BootFirmwareVolumeBase
= (VOID
*)(UINTN
)PcdGet32 (PcdEmbeddedFdBaseAddress
);
75 SecCoreData
.BootFirmwareVolumeSize
= PcdGet32 (PcdEmbeddedFdSize
);
76 SecCoreData
.TemporaryRamBase
= (VOID
*)(UINTN
)TempRamBase
;
77 SecCoreData
.TemporaryRamSize
= TempRamSize
;
78 SecCoreData
.PeiTemporaryRamBase
= (VOID
*)(UINTN
)(SecCoreData
.TemporaryRamBase
+ (SecCoreData
.TemporaryRamSize
/ 2));
79 SecCoreData
.PeiTemporaryRamSize
= SecCoreData
.TemporaryRamSize
/ 2;
80 SecCoreData
.StackBase
= (VOID
*)(UINTN
)(SecCoreData
.TemporaryRamBase
);
81 SecCoreData
.StackSize
= SecCoreData
.TemporaryRamSize
- SecCoreData
.PeiTemporaryRamSize
;
83 // jump to pei core entry point
84 (PeiCoreEntryPoint
)(&SecCoreData
, (VOID
*)&gSecPpiTable
);
89 SecTemporaryRamSupport (
90 IN CONST EFI_PEI_SERVICES
**PeiServices
,
91 IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase
,
92 IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase
,
97 // Migrate the whole temporary memory to permenent memory.
100 (VOID
*)(UINTN
)PermanentMemoryBase
,
101 (VOID
*)(UINTN
)TemporaryMemoryBase
,
105 SecSwitchStack((UINTN
)(PermanentMemoryBase
- TemporaryMemoryBase
));
108 // We need *not* fix the return address because currently,
109 // The PeiCore is excuted in flash.
113 // Simulate to invalid temporary memory, terminate temporary memory
115 //ZeroMem ((VOID*)(UINTN)TemporaryMemoryBase, CopySize);