ArmVirtPkg/Library/FdtPciHostBridgeLib/FdtPciHostBridgeLib.c

   1 /** @file
   2   PCI Host Bridge Library instance for pci-ecam-generic DT nodes
   3
   4   Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
   5
   6   SPDX-License-Identifier: BSD-2-Clause-Patent
   7
   8 **/
   9 #include <PiDxe.h>
  10 #include <Library/PciHostBridgeLib.h>
  11 #include <Library/DebugLib.h>
  12 #include <Library/DevicePathLib.h>
  13 #include <Library/DxeServicesTableLib.h>
  14 #include <Library/MemoryAllocationLib.h>
  15 #include <Library/PcdLib.h>
  16 #include <Library/UefiBootServicesTableLib.h>
  17
  18 #include <Protocol/FdtClient.h>
  19 #include <Protocol/PciRootBridgeIo.h>
  20 #include <Protocol/PciHostBridgeResourceAllocation.h>
  21
  22 #pragma pack(1)
  23 typedef struct {
  24   ACPI_HID_DEVICE_PATH     AcpiDevicePath;
  25   EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
  26 } EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;
  27 #pragma pack ()
  28
  29 STATIC EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath = {
  30   {
  31     {
  32       ACPI_DEVICE_PATH,
  33       ACPI_DP,
  34       {
  35         (UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),
  36         (UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8)
  37       }
  38     },
  39     EISA_PNP_ID(0x0A03),
  40     0
  41   },
  42
  43   {
  44     END_DEVICE_PATH_TYPE,
  45     END_ENTIRE_DEVICE_PATH_SUBTYPE,
  46     {
  47       END_DEVICE_PATH_LENGTH,
  48       0
  49     }
  50   }
  51 };
  52
  53 GLOBAL_REMOVE_IF_UNREFERENCED
  54 CHAR16 *mPciHostBridgeLibAcpiAddressSpaceTypeStr[] = {
  55   L"Mem", L"I/O", L"Bus"
  56 };
  57
  58 //
  59 // We expect the "ranges" property of "pci-host-ecam-generic" to consist of
  60 // records like this.
  61 //
  62 #pragma pack (1)
  63 typedef struct {
  64   UINT32 Type;
  65   UINT64 ChildBase;
  66   UINT64 CpuBase;
  67   UINT64 Size;
  68 } DTB_PCI_HOST_RANGE_RECORD;
  69 #pragma pack ()
  70
  71 #define DTB_PCI_HOST_RANGE_RELOCATABLE  BIT31
  72 #define DTB_PCI_HOST_RANGE_PREFETCHABLE BIT30
  73 #define DTB_PCI_HOST_RANGE_ALIASED      BIT29
  74 #define DTB_PCI_HOST_RANGE_MMIO32       BIT25
  75 #define DTB_PCI_HOST_RANGE_MMIO64       (BIT25 | BIT24)
  76 #define DTB_PCI_HOST_RANGE_IO           BIT24
  77 #define DTB_PCI_HOST_RANGE_TYPEMASK     (BIT31 | BIT30 | BIT29 | BIT25 | BIT24)
  78
  79 STATIC
  80 EFI_STATUS
  81 MapGcdMmioSpace (
  82   IN    UINT64    Base,
  83   IN    UINT64    Size
  84   )
  85 {
  86   EFI_STATUS    Status;
  87
  88   Status = gDS->AddMemorySpace (EfiGcdMemoryTypeMemoryMappedIo, Base, Size,
  89                   EFI_MEMORY_UC);
  90   if (EFI_ERROR (Status)) {
  91     DEBUG ((DEBUG_ERROR,
  92       "%a: failed to add GCD memory space for region [0x%Lx+0x%Lx)\n",
  93       __FUNCTION__, Base, Size));
  94     return Status;
  95   }
  96
  97   Status = gDS->SetMemorySpaceAttributes (Base, Size, EFI_MEMORY_UC);
  98   if (EFI_ERROR (Status)) {
  99     DEBUG ((DEBUG_ERROR,
 100       "%a: failed to set memory space attributes for region [0x%Lx+0x%Lx)\n",
 101       __FUNCTION__, Base, Size));
 102   }
 103   return Status;
 104 }
 105
 106 STATIC
 107 EFI_STATUS
 108 ProcessPciHost (
 109   OUT  UINT64    *IoBase,
 110   OUT  UINT64    *IoSize,
 111   OUT  UINT64    *Mmio32Base,
 112   OUT  UINT64    *Mmio32Size,
 113   OUT  UINT64    *Mmio64Base,
 114   OUT  UINT64    *Mmio64Size,
 115   OUT  UINT32    *BusMin,
 116   OUT  UINT32    *BusMax
 117   )
 118 {
 119   FDT_CLIENT_PROTOCOL         *FdtClient;
 120   INT32                       Node;
 121   UINT64                      ConfigBase, ConfigSize;
 122   CONST VOID                  *Prop;
 123   UINT32                      Len;
 124   UINT32                      RecordIdx;
 125   EFI_STATUS                  Status;
 126   UINT64                      IoTranslation;
 127   UINT64                      Mmio32Translation;
 128   UINT64                      Mmio64Translation;
 129
 130   //
 131   // The following output arguments are initialized only in
 132   // order to suppress '-Werror=maybe-uninitialized' warnings
 133   // *incorrectly* emitted by some gcc versions.
 134   //
 135   *IoBase = 0;
 136   *Mmio32Base = 0;
 137   *Mmio64Base = MAX_UINT64;
 138   *BusMin = 0;
 139   *BusMax = 0;
 140
 141   //
 142   // *IoSize, *Mmio##Size and IoTranslation are initialized to zero because the
 143   // logic below requires it. However, since they are also affected by the issue
 144   // reported above, they are initialized early.
 145   //
 146   *IoSize = 0;
 147   *Mmio32Size = 0;
 148   *Mmio64Size = 0;
 149   IoTranslation = 0;
 150
 151   Status = gBS->LocateProtocol (&gFdtClientProtocolGuid, NULL,
 152                   (VOID **)&FdtClient);
 153   ASSERT_EFI_ERROR (Status);
 154
 155   Status = FdtClient->FindCompatibleNode (FdtClient, "pci-host-ecam-generic",
 156                         &Node);
 157   if (EFI_ERROR (Status)) {
 158     DEBUG ((EFI_D_INFO,
 159       "%a: No 'pci-host-ecam-generic' compatible DT node found\n",
 160       __FUNCTION__));
 161     return EFI_NOT_FOUND;
 162   }
 163
 164   DEBUG_CODE (
 165     INT32 Tmp;
 166
 167     //
 168     // A DT can legally describe multiple PCI host bridges, but we are not
 169     // equipped to deal with that. So assert that there is only one.
 170     //
 171     Status = FdtClient->FindNextCompatibleNode (FdtClient,
 172                           "pci-host-ecam-generic", Node, &Tmp);
 173     ASSERT (Status == EFI_NOT_FOUND);
 174   );
 175
 176   Status = FdtClient->GetNodeProperty (FdtClient, Node, "reg", &Prop, &Len);
 177   if (EFI_ERROR (Status) || Len != 2 * sizeof (UINT64)) {
 178     DEBUG ((EFI_D_ERROR, "%a: 'reg' property not found or invalid\n",
 179       __FUNCTION__));
 180     return EFI_PROTOCOL_ERROR;
 181   }
 182
 183   //
 184   // Fetch the ECAM window.
 185   //
 186   ConfigBase = SwapBytes64 (((CONST UINT64 *)Prop)[0]);
 187   ConfigSize = SwapBytes64 (((CONST UINT64 *)Prop)[1]);
 188
 189   //
 190   // Fetch the bus range (note: inclusive).
 191   //
 192   Status = FdtClient->GetNodeProperty (FdtClient, Node, "bus-range", &Prop,
 193                         &Len);
 194   if (EFI_ERROR (Status) || Len != 2 * sizeof (UINT32)) {
 195     DEBUG ((EFI_D_ERROR, "%a: 'bus-range' not found or invalid\n",
 196       __FUNCTION__));
 197     return EFI_PROTOCOL_ERROR;
 198   }
 199   *BusMin = SwapBytes32 (((CONST UINT32 *)Prop)[0]);
 200   *BusMax = SwapBytes32 (((CONST UINT32 *)Prop)[1]);
 201
 202   //
 203   // Sanity check: the config space must accommodate all 4K register bytes of
 204   // all 8 functions of all 32 devices of all buses.
 205   //
 206   if (*BusMax < *BusMin || *BusMax - *BusMin == MAX_UINT32 ||
 207       DivU64x32 (ConfigSize, SIZE_4KB * 8 * 32) < *BusMax - *BusMin + 1) {
 208     DEBUG ((EFI_D_ERROR, "%a: invalid 'bus-range' and/or 'reg'\n",
 209       __FUNCTION__));
 210     return EFI_PROTOCOL_ERROR;
 211   }
 212
 213   //
 214   // Iterate over "ranges".
 215   //
 216   Status = FdtClient->GetNodeProperty (FdtClient, Node, "ranges", &Prop, &Len);
 217   if (EFI_ERROR (Status) || Len == 0 ||
 218       Len % sizeof (DTB_PCI_HOST_RANGE_RECORD) != 0) {
 219     DEBUG ((EFI_D_ERROR, "%a: 'ranges' not found or invalid\n", __FUNCTION__));
 220     return EFI_PROTOCOL_ERROR;
 221   }
 222
 223   for (RecordIdx = 0; RecordIdx < Len / sizeof (DTB_PCI_HOST_RANGE_RECORD);
 224        ++RecordIdx) {
 225     CONST DTB_PCI_HOST_RANGE_RECORD *Record;
 226
 227     Record = (CONST DTB_PCI_HOST_RANGE_RECORD *)Prop + RecordIdx;
 228     switch (SwapBytes32 (Record->Type) & DTB_PCI_HOST_RANGE_TYPEMASK) {
 229     case DTB_PCI_HOST_RANGE_IO:
 230       *IoBase = SwapBytes64 (Record->ChildBase);
 231       *IoSize = SwapBytes64 (Record->Size);
 232       IoTranslation = SwapBytes64 (Record->CpuBase) - *IoBase;
 233
 234       ASSERT (PcdGet64 (PcdPciIoTranslation) == IoTranslation);
 235       break;
 236
 237     case DTB_PCI_HOST_RANGE_MMIO32:
 238       *Mmio32Base = SwapBytes64 (Record->ChildBase);
 239       *Mmio32Size = SwapBytes64 (Record->Size);
 240       Mmio32Translation = SwapBytes64 (Record->CpuBase) - *Mmio32Base;
 241
 242       if (*Mmio32Base > MAX_UINT32 || *Mmio32Size > MAX_UINT32 ||
 243           *Mmio32Base + *Mmio32Size > SIZE_4GB) {
 244         DEBUG ((EFI_D_ERROR, "%a: MMIO32 space invalid\n", __FUNCTION__));
 245         return EFI_PROTOCOL_ERROR;
 246       }
 247
 248       ASSERT (PcdGet64 (PcdPciMmio32Translation) == Mmio32Translation);
 249
 250       if (Mmio32Translation != 0) {
 251         DEBUG ((EFI_D_ERROR, "%a: unsupported nonzero MMIO32 translation "
 252           "0x%Lx\n", __FUNCTION__, Mmio32Translation));
 253         return EFI_UNSUPPORTED;
 254       }
 255
 256       break;
 257
 258     case DTB_PCI_HOST_RANGE_MMIO64:
 259       *Mmio64Base = SwapBytes64 (Record->ChildBase);
 260       *Mmio64Size = SwapBytes64 (Record->Size);
 261       Mmio64Translation = SwapBytes64 (Record->CpuBase) - *Mmio64Base;
 262
 263       ASSERT (PcdGet64 (PcdPciMmio64Translation) == Mmio64Translation);
 264
 265       if (Mmio64Translation != 0) {
 266         DEBUG ((EFI_D_ERROR, "%a: unsupported nonzero MMIO64 translation "
 267           "0x%Lx\n", __FUNCTION__, Mmio64Translation));
 268         return EFI_UNSUPPORTED;
 269       }
 270
 271       break;
 272     }
 273   }
 274   if (*IoSize == 0 || *Mmio32Size == 0) {
 275     DEBUG ((EFI_D_ERROR, "%a: %a space empty\n", __FUNCTION__,
 276       (*IoSize == 0) ? "IO" : "MMIO32"));
 277     return EFI_PROTOCOL_ERROR;
 278   }
 279
 280   //
 281   // The dynamic PCD PcdPciExpressBaseAddress should have already been set,
 282   // and should match the value we found in the DT node.
 283   //
 284   ASSERT (PcdGet64 (PcdPciExpressBaseAddress) == ConfigBase);
 285
 286   DEBUG ((EFI_D_INFO, "%a: Config[0x%Lx+0x%Lx) Bus[0x%x..0x%x] "
 287     "Io[0x%Lx+0x%Lx)@0x%Lx Mem32[0x%Lx+0x%Lx)@0x0 Mem64[0x%Lx+0x%Lx)@0x0\n",
 288     __FUNCTION__, ConfigBase, ConfigSize, *BusMin, *BusMax, *IoBase, *IoSize,
 289     IoTranslation, *Mmio32Base, *Mmio32Size, *Mmio64Base, *Mmio64Size));
 290
 291   // Map the ECAM space in the GCD memory map
 292   Status = MapGcdMmioSpace (ConfigBase, ConfigSize);
 293   ASSERT_EFI_ERROR (Status);
 294   if (EFI_ERROR (Status)) {
 295     return Status;
 296   }
 297
 298   //
 299   // Map the MMIO window that provides I/O access - the PCI host bridge code
 300   // is not aware of this translation and so it will only map the I/O view
 301   // in the GCD I/O map.
 302   //
 303   Status = MapGcdMmioSpace (*IoBase + IoTranslation, *IoSize);
 304   ASSERT_EFI_ERROR (Status);
 305
 306   return Status;
 307 }
 308
 309 STATIC PCI_ROOT_BRIDGE mRootBridge;
 310
 311 /**
 312   Return all the root bridge instances in an array.
 313
 314   @param Count  Return the count of root bridge instances.
 315
 316   @return All the root bridge instances in an array.
 317           The array should be passed into PciHostBridgeFreeRootBridges()
 318           when it's not used.
 319 **/
 320 PCI_ROOT_BRIDGE *
 321 EFIAPI
 322 PciHostBridgeGetRootBridges (
 323   UINTN *Count
 324   )
 325 {
 326   UINT64              IoBase, IoSize;
 327   UINT64              Mmio32Base, Mmio32Size;
 328   UINT64              Mmio64Base, Mmio64Size;
 329   UINT32              BusMin, BusMax;
 330   EFI_STATUS          Status;
 331
 332   if (PcdGet64 (PcdPciExpressBaseAddress) == 0) {
 333     DEBUG ((EFI_D_INFO, "%a: PCI host bridge not present\n", __FUNCTION__));
 334
 335     *Count = 0;
 336     return NULL;
 337   }
 338
 339   Status = ProcessPciHost (&IoBase, &IoSize, &Mmio32Base, &Mmio32Size,
 340              &Mmio64Base, &Mmio64Size, &BusMin, &BusMax);
 341   if (EFI_ERROR (Status)) {
 342     DEBUG ((EFI_D_ERROR, "%a: failed to discover PCI host bridge: %r\n",
 343       __FUNCTION__, Status));
 344     *Count = 0;
 345     return NULL;
 346   }
 347
 348   *Count = 1;
 349
 350   mRootBridge.Segment               = 0;
 351   mRootBridge.Supports              = EFI_PCI_ATTRIBUTE_ISA_IO_16 |
 352                                       EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO |
 353                                       EFI_PCI_ATTRIBUTE_VGA_IO_16  |
 354                                       EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;
 355   mRootBridge.Attributes            = mRootBridge.Supports;
 356
 357   mRootBridge.DmaAbove4G            = TRUE;
 358   mRootBridge.NoExtendedConfigSpace = FALSE;
 359   mRootBridge.ResourceAssigned      = FALSE;
 360
 361   mRootBridge.AllocationAttributes  = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM;
 362
 363   mRootBridge.Bus.Base              = BusMin;
 364   mRootBridge.Bus.Limit             = BusMax;
 365   mRootBridge.Io.Base               = IoBase;
 366   mRootBridge.Io.Limit              = IoBase + IoSize - 1;
 367   mRootBridge.Mem.Base              = Mmio32Base;
 368   mRootBridge.Mem.Limit             = Mmio32Base + Mmio32Size - 1;
 369
 370   if (sizeof (UINTN) == sizeof (UINT64)) {
 371     mRootBridge.MemAbove4G.Base       = Mmio64Base;
 372     mRootBridge.MemAbove4G.Limit      = Mmio64Base + Mmio64Size - 1;
 373     if (Mmio64Size > 0) {
 374       mRootBridge.AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;
 375     }
 376   } else {
 377     //
 378     // UEFI mandates a 1:1 virtual-to-physical mapping, so on a 32-bit
 379     // architecture such as ARM, we will not be able to access 64-bit MMIO
 380     // BARs unless they are allocated below 4 GB. So ignore the range above
 381     // 4 GB in this case.
 382     //
 383     mRootBridge.MemAbove4G.Base       = MAX_UINT64;
 384     mRootBridge.MemAbove4G.Limit      = 0;
 385   }
 386
 387   //
 388   // No separate ranges for prefetchable and non-prefetchable BARs
 389   //
 390   mRootBridge.PMem.Base             = MAX_UINT64;
 391   mRootBridge.PMem.Limit            = 0;
 392   mRootBridge.PMemAbove4G.Base      = MAX_UINT64;
 393   mRootBridge.PMemAbove4G.Limit     = 0;
 394
 395   mRootBridge.DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath;
 396
 397   return &mRootBridge;
 398 }
 399
 400 /**
 401   Free the root bridge instances array returned from
 402   PciHostBridgeGetRootBridges().
 403
 404   @param Bridges The root bridge instances array.
 405   @param Count   The count of the array.
 406 **/
 407 VOID
 408 EFIAPI
 409 PciHostBridgeFreeRootBridges (
 410   PCI_ROOT_BRIDGE *Bridges,
 411   UINTN           Count
 412   )
 413 {
 414   ASSERT (Count == 1);
 415 }
 416
 417 /**
 418   Inform the platform that the resource conflict happens.
 419
 420   @param HostBridgeHandle Handle of the Host Bridge.
 421   @param Configuration    Pointer to PCI I/O and PCI memory resource
 422                           descriptors. The Configuration contains the resources
 423                           for all the root bridges. The resource for each root
 424                           bridge is terminated with END descriptor and an
 425                           additional END is appended indicating the end of the
 426                           entire resources. The resource descriptor field
 427                           values follow the description in
 428                           EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
 429                           .SubmitResources().
 430 **/
 431 VOID
 432 EFIAPI
 433 PciHostBridgeResourceConflict (
 434   EFI_HANDLE                        HostBridgeHandle,
 435   VOID                              *Configuration
 436   )
 437 {
 438   EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;
 439   UINTN                             RootBridgeIndex;
 440   DEBUG ((EFI_D_ERROR, "PciHostBridge: Resource conflict happens!\n"));
 441
 442   RootBridgeIndex = 0;
 443   Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Configuration;
 444   while (Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR) {
 445     DEBUG ((EFI_D_ERROR, "RootBridge[%d]:\n", RootBridgeIndex++));
 446     for (; Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR; Descriptor++) {
 447       ASSERT (Descriptor->ResType <
 448               (sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr) /
 449                sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr[0])
 450                )
 451               );
 452       DEBUG ((EFI_D_ERROR, " %s: Length/Alignment = 0x%lx / 0x%lx\n",
 453               mPciHostBridgeLibAcpiAddressSpaceTypeStr[Descriptor->ResType],
 454               Descriptor->AddrLen, Descriptor->AddrRangeMax
 455               ));
 456       if (Descriptor->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) {
 457         DEBUG ((EFI_D_ERROR, "     Granularity/SpecificFlag = %ld / %02x%s\n",
 458                 Descriptor->AddrSpaceGranularity, Descriptor->SpecificFlag,
 459                 ((Descriptor->SpecificFlag &
 460                   EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE
 461                   ) != 0) ? L" (Prefetchable)" : L""
 462                 ));
 463       }
 464     }
 465     //
 466     // Skip the END descriptor for root bridge
 467     //
 468     ASSERT (Descriptor->Desc == ACPI_END_TAG_DESCRIPTOR);
 469     Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)(
 470                    (EFI_ACPI_END_TAG_DESCRIPTOR *)Descriptor + 1
 471                    );
 472   }
 473 }