BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoard.c

   1 /** @file
   2 *
   3 *  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
   4 *
   5 *  SPDX-License-Identifier: BSD-2-Clause-Patent
   6 *
   7 **/
   8
   9 #include <Library/IoLib.h>
  10 #include <Library/ArmPlatformLib.h>
  11 #include <Library/DebugLib.h>
  12 #include <Library/PcdLib.h>
  13
  14 #include <Omap3530/Omap3530.h>
  15 #include <BeagleBoard.h>
  16
  17 VOID
  18 PadConfiguration (
  19   BEAGLEBOARD_REVISION Revision
  20   );
  21
  22 VOID
  23 ClockInit (
  24   VOID
  25   );
  26
  27 /**
  28   Detect board revision
  29
  30   @return Board revision
  31 **/
  32 BEAGLEBOARD_REVISION
  33 BeagleBoardGetRevision (
  34   VOID
  35   )
  36 {
  37   UINT32 OldPinDir;
  38   UINT32 Revision;
  39
  40   // Read GPIO 171, 172, 173
  41   OldPinDir = MmioRead32 (GPIO6_BASE + GPIO_OE);
  42   MmioWrite32(GPIO6_BASE + GPIO_OE, (OldPinDir | BIT11 | BIT12 | BIT13));
  43   Revision = MmioRead32 (GPIO6_BASE + GPIO_DATAIN);
  44
  45   // Restore I/O settings
  46   MmioWrite32 (GPIO6_BASE + GPIO_OE, OldPinDir);
  47
  48   return (BEAGLEBOARD_REVISION)((Revision >> 11) & 0x7);
  49 }
  50
  51 /**
  52   Return the current Boot Mode
  53
  54   This function returns the boot reason on the platform
  55
  56 **/
  57 EFI_BOOT_MODE
  58 ArmPlatformGetBootMode (
  59   VOID
  60   )
  61 {
  62   return BOOT_WITH_FULL_CONFIGURATION;
  63 }
  64
  65 /**
  66   Initialize controllers that must setup at the early stage
  67
  68   Some peripherals must be initialized in Secure World.
  69   For example, some L2x0 requires to be initialized in Secure World
  70
  71 **/
  72 RETURN_STATUS
  73 ArmPlatformInitialize (
  74   IN  UINTN                     MpId
  75   )
  76 {
  77   BEAGLEBOARD_REVISION Revision;
  78
  79   Revision = BeagleBoardGetRevision();
  80
  81   // Set up Pin muxing.
  82   PadConfiguration (Revision);
  83
  84   // Set up system clocking
  85   ClockInit ();
  86
  87   // Turn off the functional clock for Timer 3
  88   MmioAnd32 (CM_FCLKEN_PER, 0xFFFFFFFF ^ CM_ICLKEN_PER_EN_GPT3_ENABLE );
  89   ArmDataSynchronizationBarrier ();
  90
  91   // Clear IRQs
  92   MmioWrite32 (INTCPS_CONTROL, INTCPS_CONTROL_NEWIRQAGR);
  93   ArmDataSynchronizationBarrier ();
  94
  95   return RETURN_SUCCESS;
  96 }
  97
  98 VOID
  99 ArmPlatformGetPlatformPpiList (
 100   OUT UINTN                   *PpiListSize,
 101   OUT EFI_PEI_PPI_DESCRIPTOR  **PpiList
 102   )
 103 {
 104   *PpiListSize = 0;
 105   *PpiList = NULL;
 106 }
 107
 108 UINTN
 109 ArmPlatformGetCorePosition (
 110   IN UINTN MpId
 111   )
 112 {
 113   return 1;
 114 }
 115