2 C Entry point for the SEC. First C code after the reset vector.
4 Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18 #include <Library/DebugLib.h>
19 #include <Library/PrePiLib.h>
20 #include <Library/PcdLib.h>
21 #include <Library/IoLib.h>
22 #include <Library/OmapLib.h>
23 #include <Library/ArmLib.h>
24 #include <Library/PeCoffGetEntryPointLib.h>
25 #include <Library/DebugAgentLib.h>
27 #include <Ppi/GuidedSectionExtraction.h>
28 #include <Guid/LzmaDecompress.h>
29 #include <Omap3530/Omap3530.h>
31 #include "LzmaDecompress.h"
49 UINTN Timer
= FixedPcdGet32(PcdOmap35xxFreeTimer
);
50 UINT32 TimerBaseAddress
= TimerBase(Timer
);
52 // Set source clock for GPT3 & GPT4 to SYS_CLK
53 MmioOr32 (CM_CLKSEL_PER
, CM_CLKSEL_PER_CLKSEL_GPT3_SYS
| CM_CLKSEL_PER_CLKSEL_GPT4_SYS
);
55 // Set count & reload registers
56 MmioWrite32 (TimerBaseAddress
+ GPTIMER_TCRR
, 0x00000000);
57 MmioWrite32 (TimerBaseAddress
+ GPTIMER_TLDR
, 0x00000000);
60 MmioWrite32 (TimerBaseAddress
+ GPTIMER_TIER
, TIER_TCAR_IT_DISABLE
| TIER_OVF_IT_DISABLE
| TIER_MAT_IT_DISABLE
);
63 MmioWrite32 (TimerBaseAddress
+ GPTIMER_TCLR
, TCLR_AR_AUTORELOAD
| TCLR_ST_ON
);
65 //Disable OMAP Watchdog timer (WDT2)
66 MmioWrite32 (WDTIMER2_BASE
+ WSPR
, 0xAAAA);
67 DEBUG ((EFI_D_ERROR
, "Magic delay to disable watchdog timers properly.\n"));
68 MmioWrite32 (WDTIMER2_BASE
+ WSPR
, 0x5555);
76 UINTN Uart
= FixedPcdGet32(PcdOmap35xxConsoleUart
);
77 UINT32 UartBaseAddress
= UartBase(Uart
);
79 // Set MODE_SELECT=DISABLE before trying to initialize or modify DLL, DLH registers.
80 MmioWrite32 (UartBaseAddress
+ UART_MDR1_REG
, UART_MDR1_MODE_SELECT_DISABLE
);
82 // Put device in configuration mode.
83 MmioWrite32 (UartBaseAddress
+ UART_LCR_REG
, UART_LCR_DIV_EN_ENABLE
);
85 // Programmable divisor N = 48Mhz/16/115200 = 26
86 MmioWrite32 (UartBaseAddress
+ UART_DLL_REG
, 3000000/FixedPcdGet64 (PcdUartDefaultBaudRate
)); // low divisor
87 MmioWrite32 (UartBaseAddress
+ UART_DLH_REG
, 0); // high divisor
89 // Enter into UART operational mode.
90 MmioWrite32 (UartBaseAddress
+ UART_LCR_REG
, UART_LCR_DIV_EN_DISABLE
| UART_LCR_CHAR_LENGTH_8
);
92 // Force DTR and RTS output to active
93 MmioWrite32 (UartBaseAddress
+ UART_MCR_REG
, UART_MCR_RTS_FORCE_ACTIVE
| UART_MCR_DTR_FORCE_ACTIVE
);
95 // Clear & enable fifos
96 MmioWrite32 (UartBaseAddress
+ UART_FCR_REG
, UART_FCR_TX_FIFO_CLEAR
| UART_FCR_RX_FIFO_CLEAR
| UART_FCR_FIFO_ENABLE
);
98 // Restore MODE_SELECT
99 MmioWrite32 (UartBaseAddress
+ UART_MDR1_REG
, UART_MDR1_MODE_SELECT_UART_16X
);
104 IN UINT32 MemoryBase
,
105 IN UINT32 MemoryLength
110 ExtractGuidedSectionLibConstructor (
116 LzmaDecompressLibConstructor (
131 // Build a basic HOB list
132 HobBase
= (VOID
*)(UINTN
)(FixedPcdGet32(PcdEmbeddedFdBaseAddress
) + FixedPcdGet32(PcdEmbeddedFdSize
));
133 CreateHobList (MemoryBase
, MemorySize
, HobBase
, StackBase
);
138 // Set up system clocking
142 // Enable program flow prediction, if supported.
143 ArmEnableBranchPrediction ();
145 // Initialize CPU cache
146 InitCache ((UINT32
)MemoryBase
, (UINT32
)MemorySize
);
148 // Add memory allocation hob for relocated FD
149 BuildMemoryAllocationHob (FixedPcdGet32(PcdEmbeddedFdBaseAddress
), FixedPcdGet32(PcdEmbeddedFdSize
), EfiBootServicesData
);
151 // Add the FVs to the hob list
152 BuildFvHob (PcdGet32(PcdFlashFvMainBase
), PcdGet32(PcdFlashFvMainSize
));
157 InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC
, NULL
, NULL
);
158 SaveAndSetDebugTimerInterrupt (TRUE
);
160 DEBUG ((EFI_D_ERROR
, "UART Enabled\n"));
162 // Start up a free running timer so that the timer lib will work
165 // SEC phase needs to run library constructors by hand.
166 ExtractGuidedSectionLibConstructor ();
167 LzmaDecompressLibConstructor ();
169 // Build HOBs to pass up our version of stuff the DXE Core needs to save space
170 BuildPeCoffLoaderHob ();
171 BuildExtractSectionHob (
172 &gLzmaCustomDecompressGuid
,
173 LzmaGuidedSectionGetInfo
,
174 LzmaGuidedSectionExtraction
177 // Assume the FV that contains the SEC (our code) also contains a compressed FV.
178 DecompressFirstFv ();
180 // Load the DXE Core and transfer control to it
181 LoadDxeCoreFromFv (NULL
, 0);
183 // DXE Core should always load and never return