2 Library instance of PciHostBridgeLib library class for coreboot.
4 Copyright (C) 2016, Red Hat, Inc.
5 Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
7 This program and the accompanying materials are licensed and made available
8 under the terms and conditions of the BSD License which accompanies this
9 distribution. The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php.
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
13 WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18 #include <IndustryStandard/Pci.h>
19 #include <Protocol/PciHostBridgeResourceAllocation.h>
20 #include <Protocol/PciRootBridgeIo.h>
22 #include <Library/BaseMemoryLib.h>
23 #include <Library/DebugLib.h>
24 #include <Library/DevicePathLib.h>
25 #include <Library/MemoryAllocationLib.h>
26 #include <Library/PciHostBridgeLib.h>
27 #include <Library/PciLib.h>
29 #include "PciHostBridge.h"
33 CB_PCI_ROOT_BRIDGE_DEVICE_PATH mRootBridgeDevicePathTemplate
= {
39 (UINT8
) (sizeof(ACPI_HID_DEVICE_PATH
)),
40 (UINT8
) ((sizeof(ACPI_HID_DEVICE_PATH
)) >> 8)
43 EISA_PNP_ID(0x0A03), // HID
49 END_ENTIRE_DEVICE_PATH_SUBTYPE
,
51 END_DEVICE_PATH_LENGTH
,
59 Initialize a PCI_ROOT_BRIDGE structure.
61 @param[in] Supports Supported attributes.
63 @param[in] Attributes Initial attributes.
65 @param[in] AllocAttributes Allocation attributes.
67 @param[in] RootBusNumber The bus number to store in RootBus.
69 @param[in] MaxSubBusNumber The inclusive maximum bus number that can be
70 assigned to any subordinate bus found behind any
71 PCI bridge hanging off this root bus.
73 The caller is repsonsible for ensuring that
74 RootBusNumber <= MaxSubBusNumber. If
75 RootBusNumber equals MaxSubBusNumber, then the
76 root bus has no room for subordinate buses.
78 @param[in] Io IO aperture.
80 @param[in] Mem MMIO aperture.
82 @param[in] MemAbove4G MMIO aperture above 4G.
84 @param[in] PMem Prefetchable MMIO aperture.
86 @param[in] PMemAbove4G Prefetchable MMIO aperture above 4G.
88 @param[out] RootBus The PCI_ROOT_BRIDGE structure (allocated by the
89 caller) that should be filled in by this
92 @retval EFI_SUCCESS Initialization successful. A device path
93 consisting of an ACPI device path node, with
94 UID = RootBusNumber, has been allocated and
97 @retval EFI_OUT_OF_RESOURCES Memory allocation failed.
102 IN UINT64 Attributes
,
103 IN UINT64 AllocAttributes
,
104 IN UINT8 RootBusNumber
,
105 IN UINT8 MaxSubBusNumber
,
106 IN PCI_ROOT_BRIDGE_APERTURE
*Io
,
107 IN PCI_ROOT_BRIDGE_APERTURE
*Mem
,
108 IN PCI_ROOT_BRIDGE_APERTURE
*MemAbove4G
,
109 IN PCI_ROOT_BRIDGE_APERTURE
*PMem
,
110 IN PCI_ROOT_BRIDGE_APERTURE
*PMemAbove4G
,
111 OUT PCI_ROOT_BRIDGE
*RootBus
114 CB_PCI_ROOT_BRIDGE_DEVICE_PATH
*DevicePath
;
117 // Be safe if other fields are added to PCI_ROOT_BRIDGE later.
119 ZeroMem (RootBus
, sizeof *RootBus
);
121 RootBus
->Segment
= 0;
123 RootBus
->Supports
= Supports
;
124 RootBus
->Attributes
= Attributes
;
126 RootBus
->DmaAbove4G
= FALSE
;
128 RootBus
->AllocationAttributes
= AllocAttributes
;
129 RootBus
->Bus
.Base
= RootBusNumber
;
130 RootBus
->Bus
.Limit
= MaxSubBusNumber
;
131 CopyMem (&RootBus
->Io
, Io
, sizeof (*Io
));
132 CopyMem (&RootBus
->Mem
, Mem
, sizeof (*Mem
));
133 CopyMem (&RootBus
->MemAbove4G
, MemAbove4G
, sizeof (*MemAbove4G
));
134 CopyMem (&RootBus
->PMem
, PMem
, sizeof (*PMem
));
135 CopyMem (&RootBus
->PMemAbove4G
, PMemAbove4G
, sizeof (*PMemAbove4G
));
137 RootBus
->NoExtendedConfigSpace
= FALSE
;
139 DevicePath
= AllocateCopyPool (sizeof (mRootBridgeDevicePathTemplate
),
140 &mRootBridgeDevicePathTemplate
);
141 if (DevicePath
== NULL
) {
142 DEBUG ((EFI_D_ERROR
, "%a: %r\n", __FUNCTION__
, EFI_OUT_OF_RESOURCES
));
143 return EFI_OUT_OF_RESOURCES
;
145 DevicePath
->AcpiDevicePath
.UID
= RootBusNumber
;
146 RootBus
->DevicePath
= (EFI_DEVICE_PATH_PROTOCOL
*)DevicePath
;
149 "%a: populated root bus %d, with room for %d subordinate bus(es)\n",
150 __FUNCTION__
, RootBusNumber
, MaxSubBusNumber
- RootBusNumber
));
156 Return all the root bridge instances in an array.
158 @param Count Return the count of root bridge instances.
160 @return All the root bridge instances in an array.
161 The array should be passed into PciHostBridgeFreeRootBridges()
166 PciHostBridgeGetRootBridges (
170 return ScanForRootBridges (Count
);
175 Free the root bridge instances array returned from
176 PciHostBridgeGetRootBridges().
178 @param The root bridge instances array.
179 @param The count of the array.
183 PciHostBridgeFreeRootBridges (
184 PCI_ROOT_BRIDGE
*Bridges
,
188 if (Bridges
== NULL
&& Count
== 0) {
191 ASSERT (Bridges
!= NULL
&& Count
> 0);
195 FreePool (Bridges
[Count
].DevicePath
);
203 Inform the platform that the resource conflict happens.
205 @param HostBridgeHandle Handle of the Host Bridge.
206 @param Configuration Pointer to PCI I/O and PCI memory resource
207 descriptors. The Configuration contains the resources
208 for all the root bridges. The resource for each root
209 bridge is terminated with END descriptor and an
210 additional END is appended indicating the end of the
211 entire resources. The resource descriptor field
212 values follow the description in
213 EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
218 PciHostBridgeResourceConflict (
219 EFI_HANDLE HostBridgeHandle
,
224 // coreboot UEFI Payload does not do PCI enumeration and should not call this
225 // library interface.