3 Copyright (c) 2005 - 2006, Intel Corporation
4 All rights reserved. This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution. The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
28 PciReadCommandRegister (
29 IN PCI_IO_DEVICE
*PciIoDevice
,
45 EFI_PCI_IO_PROTOCOL
*PciIo
;
48 PciIo
= &PciIoDevice
->PciIo
;
50 return PciIo
->Pci
.Read (
60 PciSetCommandRegister (
61 IN PCI_IO_DEVICE
*PciIoDevice
,
77 EFI_PCI_IO_PROTOCOL
*PciIo
;
80 PciIo
= &PciIoDevice
->PciIo
;
82 return PciIo
->Pci
.Write (
94 PciEnableCommandRegister (
95 IN PCI_IO_DEVICE
*PciIoDevice
,
111 EFI_PCI_IO_PROTOCOL
*PciIo
;
114 PciIo
= &PciIoDevice
->PciIo
;
124 OldCommand
|= Command
;
126 return PciIo
->Pci
.Write (
138 PciDisableCommandRegister (
139 IN PCI_IO_DEVICE
*PciIoDevice
,
155 EFI_PCI_IO_PROTOCOL
*PciIo
;
158 PciIo
= &PciIoDevice
->PciIo
;
168 OldCommand
&= ~(Command
);
170 return PciIo
->Pci
.Write (
183 PciSetBridgeControlRegister (
184 IN PCI_IO_DEVICE
*PciIoDevice
,
200 EFI_PCI_IO_PROTOCOL
*PciIo
;
203 PciIo
= &PciIoDevice
->PciIo
;
205 return PciIo
->Pci
.Write (
208 PCI_BRIDGE_CONTROL_REGISTER_OFFSET
,
217 PciEnableBridgeControlRegister (
218 IN PCI_IO_DEVICE
*PciIoDevice
,
234 EFI_PCI_IO_PROTOCOL
*PciIo
;
237 PciIo
= &PciIoDevice
->PciIo
;
242 PCI_BRIDGE_CONTROL_REGISTER_OFFSET
,
247 OldCommand
|= Command
;
249 return PciIo
->Pci
.Write (
252 PCI_BRIDGE_CONTROL_REGISTER_OFFSET
,
260 PciDisableBridgeControlRegister (
261 IN PCI_IO_DEVICE
*PciIoDevice
,
277 EFI_PCI_IO_PROTOCOL
*PciIo
;
280 PciIo
= &PciIoDevice
->PciIo
;
285 PCI_BRIDGE_CONTROL_REGISTER_OFFSET
,
290 OldCommand
&= ~(Command
);
292 return PciIo
->Pci
.Write (
295 PCI_BRIDGE_CONTROL_REGISTER_OFFSET
,
305 PciReadBridgeControlRegister (
306 IN PCI_IO_DEVICE
*PciIoDevice
,
322 EFI_PCI_IO_PROTOCOL
*PciIo
;
325 PciIo
= &PciIoDevice
->PciIo
;
327 return PciIo
->Pci
.Read (
330 PCI_BRIDGE_CONTROL_REGISTER_OFFSET
,
338 PciCapabilitySupport (
339 IN PCI_IO_DEVICE
*PciIoDevice
352 // TODO: PciIoDevice - add argument and description to function comment
355 if (PciIoDevice
->Pci
.Hdr
.Status
& EFI_PCI_STATUS_CAPABILITY
) {
363 LocateCapabilityRegBlock (
364 IN PCI_IO_DEVICE
*PciIoDevice
,
366 IN OUT UINT8
*Offset
,
367 OUT UINT8
*NextRegBlock OPTIONAL
373 Locate Capability register.
377 PciIoDevice - A pointer to the PCI_IO_DEVICE.
378 CapId - The capability ID.
379 Offset - A pointer to the offset.
380 As input: the default offset;
381 As output: the offset of the found block.
382 NextRegBlock - An optional pointer to return the value of next block.
386 EFI_UNSUPPORTED - The Pci Io device is not supported.
387 EFI_NOT_FOUND - The Pci Io device cannot be found.
388 EFI_SUCCESS - The Pci Io device is successfully located.
393 UINT16 CapabilityEntry
;
398 // To check the capability of this device supports
400 if (!PciCapabilitySupport (PciIoDevice
)) {
401 return EFI_UNSUPPORTED
;
405 CapabilityPtr
= *Offset
;
409 if (IS_CARDBUS_BRIDGE (&PciIoDevice
->Pci
)) {
411 PciIoDevice
->PciIo
.Pci
.Read (
414 EFI_PCI_CARDBUS_BRIDGE_CAPABILITY_PTR
,
420 PciIoDevice
->PciIo
.Pci
.Read (
423 PCI_CAPBILITY_POINTER_OFFSET
,
428 // Do not get byte read directly, because some PCI card will return 0xFF
429 // when perform PCI-Express byte read, while return correct 0x00
430 // when perform PCI-Express dword read, or PCI dword read.
432 CapabilityPtr
= (UINT8
)Temp
;
436 while (CapabilityPtr
> 0x3F) {
438 // Mask it to DWORD alignment per PCI spec
440 CapabilityPtr
&= 0xFC;
441 PciIoDevice
->PciIo
.Pci
.Read (
449 CapabilityID
= (UINT8
) CapabilityEntry
;
451 if (CapabilityID
== CapId
) {
452 *Offset
= CapabilityPtr
;
453 if (NextRegBlock
!= NULL
) {
454 *NextRegBlock
= (UINT8
) (CapabilityEntry
>> 8);
460 CapabilityPtr
= (UINT8
) (CapabilityEntry
>> 8);
463 return EFI_NOT_FOUND
;