3 Copyright (c) 2004 - 2007, Intel Corporation. All rights reserved.<BR>
4 This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution. The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
22 #ifndef _EFI_SCRIPT_H_
23 #define _EFI_SCRIPT_H_
27 #define EFI_ACPI_S3_RESUME_SCRIPT_TABLE 0x00
30 // Boot Script Opcode Definitions
32 typedef const UINT16 EFI_BOOT_SCRIPT_OPCODE
;
34 #define EFI_BOOT_SCRIPT_IO_WRITE_OPCODE 0x00
35 #define EFI_BOOT_SCRIPT_IO_READ_WRITE_OPCODE 0x01
36 #define EFI_BOOT_SCRIPT_MEM_WRITE_OPCODE 0x02
37 #define EFI_BOOT_SCRIPT_MEM_READ_WRITE_OPCODE 0x03
38 #define EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE_OPCODE 0x04
39 #define EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE_OPCODE 0x05
40 #define EFI_BOOT_SCRIPT_SMBUS_EXECUTE_OPCODE 0x06
41 #define EFI_BOOT_SCRIPT_STALL_OPCODE 0x07
42 #define EFI_BOOT_SCRIPT_DISPATCH_OPCODE 0x08
45 // Extensions to boot script definitions
47 #define EFI_BOOT_SCRIPT_MEM_POLL_OPCODE 0x09
48 #define EFI_BOOT_SCRIPT_INFORMATION_OPCODE 0x0A
49 #define EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE_OPCODE 0x0B
50 #define EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE_OPCODE 0x0C
52 #define EFI_BOOT_SCRIPT_TABLE_OPCODE 0xAA
53 #define EFI_BOOT_SCRIPT_TERMINATE_OPCODE 0xFF
58 // EFI Boot Script Width
61 EfiBootScriptWidthUint8
,
62 EfiBootScriptWidthUint16
,
63 EfiBootScriptWidthUint32
,
64 EfiBootScriptWidthUint64
,
65 EfiBootScriptWidthFifoUint8
,
66 EfiBootScriptWidthFifoUint16
,
67 EfiBootScriptWidthFifoUint32
,
68 EfiBootScriptWidthFifoUint64
,
69 EfiBootScriptWidthFillUint8
,
70 EfiBootScriptWidthFillUint16
,
71 EfiBootScriptWidthFillUint32
,
72 EfiBootScriptWidthFillUint64
,
73 EfiBootScriptWidthMaximum
74 } EFI_BOOT_SCRIPT_WIDTH
;
79 } EFI_BOOT_SCRIPT_GENERIC_HEADER
;
87 } EFI_BOOT_SCRIPT_TABLE_HEADER
;
93 } EFI_BOOT_SCRIPT_COMMON_HEADER
;
101 } EFI_BOOT_SCRIPT_IO_WRITE
;
108 } EFI_BOOT_SCRIPT_IO_READ_WRITE
;
116 } EFI_BOOT_SCRIPT_MEM_WRITE
;
123 } EFI_BOOT_SCRIPT_MEM_READ_WRITE
;
131 } EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE
;
140 } EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE
;
147 } EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE
;
155 } EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE
;
166 } EFI_BOOT_SCRIPT_SMBUS_EXECUTE
;
172 } EFI_BOOT_SCRIPT_STALL
;
177 EFI_PHYSICAL_ADDRESS EntryPoint
;
178 } EFI_BOOT_SCRIPT_DISPATCH
;
189 } EFI_BOOT_SCRIPT_MEM_POLL
;
194 UINT32 InformationLength
;
195 EFI_PHYSICAL_ADDRESS Information
;
196 } EFI_BOOT_SCRIPT_INFORMATION
;
201 } EFI_BOOT_SCRIPT_TERMINATE
;
204 EFI_BOOT_SCRIPT_GENERIC_HEADER
*Header
;
205 EFI_BOOT_SCRIPT_TABLE_HEADER
*TableInfo
;
206 EFI_BOOT_SCRIPT_IO_WRITE
*IoWrite
;
207 EFI_BOOT_SCRIPT_IO_READ_WRITE
*IoReadWrite
;
208 EFI_BOOT_SCRIPT_MEM_WRITE
*MemWrite
;
209 EFI_BOOT_SCRIPT_MEM_READ_WRITE
*MemReadWrite
;
210 EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE
*PciWrite
;
211 EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE
*PciReadWrite
;
212 EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE
*PciWrite2
;
213 EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE
*PciReadWrite2
;
214 EFI_BOOT_SCRIPT_SMBUS_EXECUTE
*SmbusExecute
;
215 EFI_BOOT_SCRIPT_STALL
*Stall
;
216 EFI_BOOT_SCRIPT_DISPATCH
*Dispatch
;
217 EFI_BOOT_SCRIPT_MEM_POLL
*MemPoll
;
218 EFI_BOOT_SCRIPT_INFORMATION
*Information
;
219 EFI_BOOT_SCRIPT_TERMINATE
*Terminate
;
220 EFI_BOOT_SCRIPT_COMMON_HEADER
*CommonHeader
;
222 } BOOT_SCRIPT_POINTERS
;