3 Copyright (c) 2005, Intel Corporation
4 All rights reserved. This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution. The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
19 Define data structures used by EFI_SMM_CPU_SAVE_STATE protocol.
25 #ifndef _CPUSAVESTATE_H_
26 #define _CPUSAVESTATE_H_
28 typedef unsigned char ASM_UINT8
;
29 typedef ASM_UINT8 ASM_BOOL
;
30 typedef unsigned short ASM_UINT16
;
31 typedef unsigned long ASM_UINT32
;
34 typedef double ASM_UINT64
;
36 typedef unsigned __int64 ASM_UINT64
;
42 typedef struct _EFI_SMM_CPU_STATE32
{
43 ASM_UINT8 Reserved1
[0xf8]; // fe00h
44 ASM_UINT32 SMBASE
; // fef8h
45 ASM_UINT32 SMMRevId
; // fefch
46 ASM_UINT16 IORestart
; // ff00h
47 ASM_UINT16 AutoHALTRestart
; // ff02h
48 ASM_UINT32 IEDBASE
; // ff04h
49 ASM_UINT8 Reserved2
[0x98]; // ff08h
50 ASM_UINT32 IOMemAddr
; // ffa0h
51 ASM_UINT32 IOMisc
; // ffa4h
74 } EFI_SMM_CPU_STATE32
;
76 typedef struct _EFI_SMM_CPU_STATE64
{
77 ASM_UINT8 Reserved1
[0x1d0]; // fc00h
78 ASM_UINT32 GdtBaseHiDword
; // fdd0h
79 ASM_UINT32 LdtBaseHiDword
; // fdd4h
80 ASM_UINT32 IdtBaseHiDword
; // fdd8h
81 ASM_UINT8 Reserved2
[0xc]; // fddch
82 ASM_UINT64 IO_EIP
; // fde8h
83 ASM_UINT8 Reserved3
[0x50]; // fdf0h
84 ASM_UINT32 _CR4
; // fe40h
85 ASM_UINT8 Reserved4
[0x48]; // fe44h
86 ASM_UINT32 GdtBaseLoDword
; // fe8ch
87 ASM_UINT32 GdtLimit
; // fe90h
88 ASM_UINT32 IdtBaseLoDword
; // fe94h
89 ASM_UINT32 IdtLimit
; // fe98h
90 ASM_UINT32 LdtBaseLoDword
; // fe9ch
91 ASM_UINT32 LdtLimit
; // fea0h
92 ASM_UINT32 LdtInfo
; // fea4h
93 ASM_UINT8 Reserved5
[0x50]; // fea8h
94 ASM_UINT32 SMBASE
; // fef8h
95 ASM_UINT32 SMMRevId
; // fefch
96 ASM_UINT16 IORestart
; // ff00h
97 ASM_UINT16 AutoHALTRestart
; // ff02h
98 ASM_UINT32 IEDBASE
; // ff04h
99 ASM_UINT8 Reserved6
[0x14]; // ff08h
100 ASM_UINT64 _R15
; // ff1ch
108 ASM_UINT64 _RAX
; // ff5ch
116 ASM_UINT64 IOMemAddr
; // ff9ch
117 ASM_UINT32 IOMisc
; // ffa4h
118 ASM_UINT32 _ES
; // ffa8h
124 ASM_UINT32 _LDTR
; // ffc0h
126 ASM_UINT64 _DR7
; // ffc8h
128 ASM_UINT64 _RIP
; // ffd8h
129 ASM_UINT64 IA32_EFER
; // ffe0h
130 ASM_UINT64 _RFLAGS
; // ffe8h
131 ASM_UINT64 _CR3
; // fff0h
132 ASM_UINT64 _CR0
; // fff8h
133 } EFI_SMM_CPU_STATE64
;
135 #pragma warning (push)
136 #pragma warning (disable: 4201)
137 typedef union _EFI_SMM_CPU_STATE
{
139 ASM_UINT8 Reserved
[0x200];
140 EFI_SMM_CPU_STATE32 x86
;
142 EFI_SMM_CPU_STATE64 x64
;
144 #pragma warning (pop)
148 #define EFI_SMM_MIN_REV_ID_x64 0x30006