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git.proxmox.com Git - mirror_edk2.git/blob - EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BasePciLibCf8/PciLib.c
68f99fd995882a24aca0142c42be8f78c5209181
3 Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>
4 This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution. The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
19 PCI Library using Port CF8/CFC access.
23 #include "EdkIIGlueBase.h"
26 Reads an 8-bit PCI configuration register.
28 Reads and returns the 8-bit PCI configuration register specified by Address.
29 This function must guarantee that all PCI read and write operations are
32 If Address > 0x0FFFFFFF, then ASSERT().
34 @param Address Address that encodes the PCI Bus, Device, Function and
37 @return The read value from the PCI configuration register.
46 return PciCf8Read8 (Address
);
50 Writes an 8-bit PCI configuration register.
52 Writes the 8-bit PCI configuration register specified by Address with the
53 value specified by Value. Value is returned. This function must guarantee
54 that all PCI read and write operations are serialized.
56 If Address > 0x0FFFFFFF, then ASSERT().
58 @param Address Address that encodes the PCI Bus, Device, Function and
60 @param Value The value to write.
62 @return The value written to the PCI configuration register.
72 return PciCf8Write8 (Address
, Data
);
76 Performs a bitwise inclusive OR of an 8-bit PCI configuration register with
79 Reads the 8-bit PCI configuration register specified by Address, performs a
80 bitwise inclusive OR between the read result and the value specified by
81 OrData, and writes the result to the 8-bit PCI configuration register
82 specified by Address. The value written to the PCI configuration register is
83 returned. This function must guarantee that all PCI read and write operations
86 If Address > 0x0FFFFFFF, then ASSERT().
88 @param Address Address that encodes the PCI Bus, Device, Function and
90 @param OrData The value to OR with the PCI configuration register.
92 @return The value written back to the PCI configuration register.
102 return PciCf8Or8 (Address
, OrData
);
106 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
109 Reads the 8-bit PCI configuration register specified by Address, performs a
110 bitwise AND between the read result and the value specified by AndData, and
111 writes the result to the 8-bit PCI configuration register specified by
112 Address. The value written to the PCI configuration register is returned.
113 This function must guarantee that all PCI read and write operations are
116 If Address > 0x0FFFFFFF, then ASSERT().
118 @param Address Address that encodes the PCI Bus, Device, Function and
120 @param AndData The value to AND with the PCI configuration register.
122 @return The value written back to the PCI configuration register.
132 return PciCf8And8 (Address
, AndData
);
136 Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
137 value, followed a bitwise inclusive OR with another 8-bit value.
139 Reads the 8-bit PCI configuration register specified by Address, performs a
140 bitwise AND between the read result and the value specified by AndData,
141 performs a bitwise inclusive OR between the result of the AND operation and
142 the value specified by OrData, and writes the result to the 8-bit PCI
143 configuration register specified by Address. The value written to the PCI
144 configuration register is returned. This function must guarantee that all PCI
145 read and write operations are serialized.
147 If Address > 0x0FFFFFFF, then ASSERT().
149 @param Address Address that encodes the PCI Bus, Device, Function and
151 @param AndData The value to AND with the PCI configuration register.
152 @param OrData The value to OR with the result of the AND operation.
154 @return The value written back to the PCI configuration register.
165 return PciCf8AndThenOr8 (Address
, AndData
, OrData
);
169 Reads a bit field of a PCI configuration register.
171 Reads the bit field in an 8-bit PCI configuration register. The bit field is
172 specified by the StartBit and the EndBit. The value of the bit field is
175 If Address > 0x0FFFFFFF, then ASSERT().
176 If StartBit is greater than 7, then ASSERT().
177 If EndBit is greater than 7, then ASSERT().
178 If EndBit is less than StartBit, then ASSERT().
180 @param Address PCI configuration register to read.
181 @param StartBit The ordinal of the least significant bit in the bit field.
183 @param EndBit The ordinal of the most significant bit in the bit field.
186 @return The value of the bit field read from the PCI configuration register.
197 return PciCf8BitFieldRead8 (Address
, StartBit
, EndBit
);
201 Writes a bit field to a PCI configuration register.
203 Writes Value to the bit field of the PCI configuration register. The bit
204 field is specified by the StartBit and the EndBit. All other bits in the
205 destination PCI configuration register are preserved. The new value of the
206 8-bit register is returned.
208 If Address > 0x0FFFFFFF, then ASSERT().
209 If StartBit is greater than 7, then ASSERT().
210 If EndBit is greater than 7, then ASSERT().
211 If EndBit is less than StartBit, then ASSERT().
213 @param Address PCI configuration register to write.
214 @param StartBit The ordinal of the least significant bit in the bit field.
216 @param EndBit The ordinal of the most significant bit in the bit field.
218 @param Value New value of the bit field.
220 @return The value written back to the PCI configuration register.
232 return PciCf8BitFieldWrite8 (Address
, StartBit
, EndBit
, Value
);
236 Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and
237 writes the result back to the bit field in the 8-bit port.
239 Reads the 8-bit PCI configuration register specified by Address, performs a
240 bitwise inclusive OR between the read result and the value specified by
241 OrData, and writes the result to the 8-bit PCI configuration register
242 specified by Address. The value written to the PCI configuration register is
243 returned. This function must guarantee that all PCI read and write operations
244 are serialized. Extra left bits in OrData are stripped.
246 If Address > 0x0FFFFFFF, then ASSERT().
247 If StartBit is greater than 7, then ASSERT().
248 If EndBit is greater than 7, then ASSERT().
249 If EndBit is less than StartBit, then ASSERT().
251 @param Address PCI configuration register to write.
252 @param StartBit The ordinal of the least significant bit in the bit field.
254 @param EndBit The ordinal of the most significant bit in the bit field.
256 @param OrData The value to OR with the PCI configuration register.
258 @return The value written back to the PCI configuration register.
270 return PciCf8BitFieldOr8 (Address
, StartBit
, EndBit
, OrData
);
274 Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
275 AND, and writes the result back to the bit field in the 8-bit register.
277 Reads the 8-bit PCI configuration register specified by Address, performs a
278 bitwise AND between the read result and the value specified by AndData, and
279 writes the result to the 8-bit PCI configuration register specified by
280 Address. The value written to the PCI configuration register is returned.
281 This function must guarantee that all PCI read and write operations are
282 serialized. Extra left bits in AndData are stripped.
284 If Address > 0x0FFFFFFF, then ASSERT().
285 If StartBit is greater than 7, then ASSERT().
286 If EndBit is greater than 7, then ASSERT().
287 If EndBit is less than StartBit, then ASSERT().
289 @param Address PCI configuration register to write.
290 @param StartBit The ordinal of the least significant bit in the bit field.
292 @param EndBit The ordinal of the most significant bit in the bit field.
294 @param AndData The value to AND with the PCI configuration register.
296 @return The value written back to the PCI configuration register.
308 return PciCf8BitFieldAnd8 (Address
, StartBit
, EndBit
, AndData
);
312 Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
313 bitwise inclusive OR, and writes the result back to the bit field in the
316 Reads the 8-bit PCI configuration register specified by Address, performs a
317 bitwise AND followed by a bitwise inclusive OR between the read result and
318 the value specified by AndData, and writes the result to the 8-bit PCI
319 configuration register specified by Address. The value written to the PCI
320 configuration register is returned. This function must guarantee that all PCI
321 read and write operations are serialized. Extra left bits in both AndData and
324 If Address > 0x0FFFFFFF, then ASSERT().
325 If StartBit is greater than 7, then ASSERT().
326 If EndBit is greater than 7, then ASSERT().
327 If EndBit is less than StartBit, then ASSERT().
329 @param Address PCI configuration register to write.
330 @param StartBit The ordinal of the least significant bit in the bit field.
332 @param EndBit The ordinal of the most significant bit in the bit field.
334 @param AndData The value to AND with the PCI configuration register.
335 @param OrData The value to OR with the result of the AND operation.
337 @return The value written back to the PCI configuration register.
342 PciBitFieldAndThenOr8 (
350 return PciCf8BitFieldAndThenOr8 (Address
, StartBit
, EndBit
, AndData
, OrData
);
354 Reads a 16-bit PCI configuration register.
356 Reads and returns the 16-bit PCI configuration register specified by Address.
357 This function must guarantee that all PCI read and write operations are
360 If Address > 0x0FFFFFFF, then ASSERT().
362 @param Address Address that encodes the PCI Bus, Device, Function and
365 @return The read value from the PCI configuration register.
374 return PciCf8Read16 (Address
);
378 Writes a 16-bit PCI configuration register.
380 Writes the 16-bit PCI configuration register specified by Address with the
381 value specified by Value. Value is returned. This function must guarantee
382 that all PCI read and write operations are serialized.
384 If Address > 0x0FFFFFFF, then ASSERT().
386 @param Address Address that encodes the PCI Bus, Device, Function and
388 @param Value The value to write.
390 @return The value written to the PCI configuration register.
400 return PciCf8Write16 (Address
, Data
);
404 Performs a bitwise inclusive OR of a 16-bit PCI configuration register with
407 Reads the 16-bit PCI configuration register specified by Address, performs a
408 bitwise inclusive OR between the read result and the value specified by
409 OrData, and writes the result to the 16-bit PCI configuration register
410 specified by Address. The value written to the PCI configuration register is
411 returned. This function must guarantee that all PCI read and write operations
414 If Address > 0x0FFFFFFF, then ASSERT().
416 @param Address Address that encodes the PCI Bus, Device, Function and
418 @param OrData The value to OR with the PCI configuration register.
420 @return The value written back to the PCI configuration register.
430 return PciCf8Or16 (Address
, OrData
);
434 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
437 Reads the 16-bit PCI configuration register specified by Address, performs a
438 bitwise AND between the read result and the value specified by AndData, and
439 writes the result to the 16-bit PCI configuration register specified by
440 Address. The value written to the PCI configuration register is returned.
441 This function must guarantee that all PCI read and write operations are
444 If Address > 0x0FFFFFFF, then ASSERT().
446 @param Address Address that encodes the PCI Bus, Device, Function and
448 @param AndData The value to AND with the PCI configuration register.
450 @return The value written back to the PCI configuration register.
460 return PciCf8And16 (Address
, AndData
);
464 Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
465 value, followed a bitwise inclusive OR with another 16-bit value.
467 Reads the 16-bit PCI configuration register specified by Address, performs a
468 bitwise AND between the read result and the value specified by AndData,
469 performs a bitwise inclusive OR between the result of the AND operation and
470 the value specified by OrData, and writes the result to the 16-bit PCI
471 configuration register specified by Address. The value written to the PCI
472 configuration register is returned. This function must guarantee that all PCI
473 read and write operations are serialized.
475 If Address > 0x0FFFFFFF, then ASSERT().
477 @param Address Address that encodes the PCI Bus, Device, Function and
479 @param AndData The value to AND with the PCI configuration register.
480 @param OrData The value to OR with the result of the AND operation.
482 @return The value written back to the PCI configuration register.
493 return PciCf8AndThenOr16 (Address
, AndData
, OrData
);
497 Reads a bit field of a PCI configuration register.
499 Reads the bit field in a 16-bit PCI configuration register. The bit field is
500 specified by the StartBit and the EndBit. The value of the bit field is
503 If Address > 0x0FFFFFFF, then ASSERT().
504 If StartBit is greater than 15, then ASSERT().
505 If EndBit is greater than 15, then ASSERT().
506 If EndBit is less than StartBit, then ASSERT().
508 @param Address PCI configuration register to read.
509 @param StartBit The ordinal of the least significant bit in the bit field.
511 @param EndBit The ordinal of the most significant bit in the bit field.
514 @return The value of the bit field read from the PCI configuration register.
525 return PciCf8BitFieldRead16 (Address
, StartBit
, EndBit
);
529 Writes a bit field to a PCI configuration register.
531 Writes Value to the bit field of the PCI configuration register. The bit
532 field is specified by the StartBit and the EndBit. All other bits in the
533 destination PCI configuration register are preserved. The new value of the
534 16-bit register is returned.
536 If Address > 0x0FFFFFFF, then ASSERT().
537 If StartBit is greater than 15, then ASSERT().
538 If EndBit is greater than 15, then ASSERT().
539 If EndBit is less than StartBit, then ASSERT().
541 @param Address PCI configuration register to write.
542 @param StartBit The ordinal of the least significant bit in the bit field.
544 @param EndBit The ordinal of the most significant bit in the bit field.
546 @param Value New value of the bit field.
548 @return The value written back to the PCI configuration register.
560 return PciCf8BitFieldWrite16 (Address
, StartBit
, EndBit
, Value
);
564 Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and
565 writes the result back to the bit field in the 16-bit port.
567 Reads the 16-bit PCI configuration register specified by Address, performs a
568 bitwise inclusive OR between the read result and the value specified by
569 OrData, and writes the result to the 16-bit PCI configuration register
570 specified by Address. The value written to the PCI configuration register is
571 returned. This function must guarantee that all PCI read and write operations
572 are serialized. Extra left bits in OrData are stripped.
574 If Address > 0x0FFFFFFF, then ASSERT().
575 If StartBit is greater than 15, then ASSERT().
576 If EndBit is greater than 15, then ASSERT().
577 If EndBit is less than StartBit, then ASSERT().
579 @param Address PCI configuration register to write.
580 @param StartBit The ordinal of the least significant bit in the bit field.
582 @param EndBit The ordinal of the most significant bit in the bit field.
584 @param OrData The value to OR with the PCI configuration register.
586 @return The value written back to the PCI configuration register.
598 return PciCf8BitFieldOr16 (Address
, StartBit
, EndBit
, OrData
);
602 Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
603 AND, and writes the result back to the bit field in the 16-bit register.
605 Reads the 16-bit PCI configuration register specified by Address, performs a
606 bitwise AND between the read result and the value specified by AndData, and
607 writes the result to the 16-bit PCI configuration register specified by
608 Address. The value written to the PCI configuration register is returned.
609 This function must guarantee that all PCI read and write operations are
610 serialized. Extra left bits in AndData are stripped.
612 If Address > 0x0FFFFFFF, then ASSERT().
613 If StartBit is greater than 15, then ASSERT().
614 If EndBit is greater than 15, then ASSERT().
615 If EndBit is less than StartBit, then ASSERT().
617 @param Address PCI configuration register to write.
618 @param StartBit The ordinal of the least significant bit in the bit field.
620 @param EndBit The ordinal of the most significant bit in the bit field.
622 @param AndData The value to AND with the PCI configuration register.
624 @return The value written back to the PCI configuration register.
636 return PciCf8BitFieldAnd16 (Address
, StartBit
, EndBit
, AndData
);
640 Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
641 bitwise inclusive OR, and writes the result back to the bit field in the
644 Reads the 16-bit PCI configuration register specified by Address, performs a
645 bitwise AND followed by a bitwise inclusive OR between the read result and
646 the value specified by AndData, and writes the result to the 16-bit PCI
647 configuration register specified by Address. The value written to the PCI
648 configuration register is returned. This function must guarantee that all PCI
649 read and write operations are serialized. Extra left bits in both AndData and
652 If Address > 0x0FFFFFFF, then ASSERT().
653 If StartBit is greater than 15, then ASSERT().
654 If EndBit is greater than 15, then ASSERT().
655 If EndBit is less than StartBit, then ASSERT().
657 @param Address PCI configuration register to write.
658 @param StartBit The ordinal of the least significant bit in the bit field.
660 @param EndBit The ordinal of the most significant bit in the bit field.
662 @param AndData The value to AND with the PCI configuration register.
663 @param OrData The value to OR with the result of the AND operation.
665 @return The value written back to the PCI configuration register.
670 PciBitFieldAndThenOr16 (
678 return PciCf8BitFieldAndThenOr16 (Address
, StartBit
, EndBit
, AndData
, OrData
);
682 Reads a 32-bit PCI configuration register.
684 Reads and returns the 32-bit PCI configuration register specified by Address.
685 This function must guarantee that all PCI read and write operations are
688 If Address > 0x0FFFFFFF, then ASSERT().
690 @param Address Address that encodes the PCI Bus, Device, Function and
693 @return The read value from the PCI configuration register.
702 return PciCf8Read32 (Address
);
706 Writes a 32-bit PCI configuration register.
708 Writes the 32-bit PCI configuration register specified by Address with the
709 value specified by Value. Value is returned. This function must guarantee
710 that all PCI read and write operations are serialized.
712 If Address > 0x0FFFFFFF, then ASSERT().
714 @param Address Address that encodes the PCI Bus, Device, Function and
716 @param Value The value to write.
718 @return The value written to the PCI configuration register.
728 return PciCf8Write32 (Address
, Data
);
732 Performs a bitwise inclusive OR of a 32-bit PCI configuration register with
735 Reads the 32-bit PCI configuration register specified by Address, performs a
736 bitwise inclusive OR between the read result and the value specified by
737 OrData, and writes the result to the 32-bit PCI configuration register
738 specified by Address. The value written to the PCI configuration register is
739 returned. This function must guarantee that all PCI read and write operations
742 If Address > 0x0FFFFFFF, then ASSERT().
744 @param Address Address that encodes the PCI Bus, Device, Function and
746 @param OrData The value to OR with the PCI configuration register.
748 @return The value written back to the PCI configuration register.
758 return PciCf8Or32 (Address
, OrData
);
762 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
765 Reads the 32-bit PCI configuration register specified by Address, performs a
766 bitwise AND between the read result and the value specified by AndData, and
767 writes the result to the 32-bit PCI configuration register specified by
768 Address. The value written to the PCI configuration register is returned.
769 This function must guarantee that all PCI read and write operations are
772 If Address > 0x0FFFFFFF, then ASSERT().
774 @param Address Address that encodes the PCI Bus, Device, Function and
776 @param AndData The value to AND with the PCI configuration register.
778 @return The value written back to the PCI configuration register.
788 return PciCf8And32 (Address
, AndData
);
792 Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
793 value, followed a bitwise inclusive OR with another 32-bit value.
795 Reads the 32-bit PCI configuration register specified by Address, performs a
796 bitwise AND between the read result and the value specified by AndData,
797 performs a bitwise inclusive OR between the result of the AND operation and
798 the value specified by OrData, and writes the result to the 32-bit PCI
799 configuration register specified by Address. The value written to the PCI
800 configuration register is returned. This function must guarantee that all PCI
801 read and write operations are serialized.
803 If Address > 0x0FFFFFFF, then ASSERT().
805 @param Address Address that encodes the PCI Bus, Device, Function and
807 @param AndData The value to AND with the PCI configuration register.
808 @param OrData The value to OR with the result of the AND operation.
810 @return The value written back to the PCI configuration register.
821 return PciCf8AndThenOr32 (Address
, AndData
, OrData
);
825 Reads a bit field of a PCI configuration register.
827 Reads the bit field in a 32-bit PCI configuration register. The bit field is
828 specified by the StartBit and the EndBit. The value of the bit field is
831 If Address > 0x0FFFFFFF, then ASSERT().
832 If StartBit is greater than 31, then ASSERT().
833 If EndBit is greater than 31, then ASSERT().
834 If EndBit is less than StartBit, then ASSERT().
836 @param Address PCI configuration register to read.
837 @param StartBit The ordinal of the least significant bit in the bit field.
839 @param EndBit The ordinal of the most significant bit in the bit field.
842 @return The value of the bit field read from the PCI configuration register.
853 return PciCf8BitFieldRead32 (Address
, StartBit
, EndBit
);
857 Writes a bit field to a PCI configuration register.
859 Writes Value to the bit field of the PCI configuration register. The bit
860 field is specified by the StartBit and the EndBit. All other bits in the
861 destination PCI configuration register are preserved. The new value of the
862 32-bit register is returned.
864 If Address > 0x0FFFFFFF, then ASSERT().
865 If StartBit is greater than 31, then ASSERT().
866 If EndBit is greater than 31, then ASSERT().
867 If EndBit is less than StartBit, then ASSERT().
869 @param Address PCI configuration register to write.
870 @param StartBit The ordinal of the least significant bit in the bit field.
872 @param EndBit The ordinal of the most significant bit in the bit field.
874 @param Value New value of the bit field.
876 @return The value written back to the PCI configuration register.
888 return PciCf8BitFieldWrite32 (Address
, StartBit
, EndBit
, Value
);
892 Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and
893 writes the result back to the bit field in the 32-bit port.
895 Reads the 32-bit PCI configuration register specified by Address, performs a
896 bitwise inclusive OR between the read result and the value specified by
897 OrData, and writes the result to the 32-bit PCI configuration register
898 specified by Address. The value written to the PCI configuration register is
899 returned. This function must guarantee that all PCI read and write operations
900 are serialized. Extra left bits in OrData are stripped.
902 If Address > 0x0FFFFFFF, then ASSERT().
903 If StartBit is greater than 31, then ASSERT().
904 If EndBit is greater than 31, then ASSERT().
905 If EndBit is less than StartBit, then ASSERT().
907 @param Address PCI configuration register to write.
908 @param StartBit The ordinal of the least significant bit in the bit field.
910 @param EndBit The ordinal of the most significant bit in the bit field.
912 @param OrData The value to OR with the PCI configuration register.
914 @return The value written back to the PCI configuration register.
926 return PciCf8BitFieldOr32 (Address
, StartBit
, EndBit
, OrData
);
930 Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
931 AND, and writes the result back to the bit field in the 32-bit register.
933 Reads the 32-bit PCI configuration register specified by Address, performs a
934 bitwise AND between the read result and the value specified by AndData, and
935 writes the result to the 32-bit PCI configuration register specified by
936 Address. The value written to the PCI configuration register is returned.
937 This function must guarantee that all PCI read and write operations are
938 serialized. Extra left bits in AndData are stripped.
940 If Address > 0x0FFFFFFF, then ASSERT().
941 If StartBit is greater than 31, then ASSERT().
942 If EndBit is greater than 31, then ASSERT().
943 If EndBit is less than StartBit, then ASSERT().
945 @param Address PCI configuration register to write.
946 @param StartBit The ordinal of the least significant bit in the bit field.
948 @param EndBit The ordinal of the most significant bit in the bit field.
950 @param AndData The value to AND with the PCI configuration register.
952 @return The value written back to the PCI configuration register.
964 return PciCf8BitFieldAnd32 (Address
, StartBit
, EndBit
, AndData
);
968 Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
969 bitwise inclusive OR, and writes the result back to the bit field in the
972 Reads the 32-bit PCI configuration register specified by Address, performs a
973 bitwise AND followed by a bitwise inclusive OR between the read result and
974 the value specified by AndData, and writes the result to the 32-bit PCI
975 configuration register specified by Address. The value written to the PCI
976 configuration register is returned. This function must guarantee that all PCI
977 read and write operations are serialized. Extra left bits in both AndData and
980 If Address > 0x0FFFFFFF, then ASSERT().
981 If StartBit is greater than 31, then ASSERT().
982 If EndBit is greater than 31, then ASSERT().
983 If EndBit is less than StartBit, then ASSERT().
985 @param Address PCI configuration register to write.
986 @param StartBit The ordinal of the least significant bit in the bit field.
988 @param EndBit The ordinal of the most significant bit in the bit field.
990 @param AndData The value to AND with the PCI configuration register.
991 @param OrData The value to OR with the result of the AND operation.
993 @return The value written back to the PCI configuration register.
998 PciBitFieldAndThenOr32 (
1006 return PciCf8BitFieldAndThenOr32 (Address
, StartBit
, EndBit
, AndData
, OrData
);
1010 Reads a range of PCI configuration registers into a caller supplied buffer.
1012 Reads the range of PCI configuration registers specified by StartAddress and
1013 Size into the buffer specified by Buffer. This function only allows the PCI
1014 configuration registers from a single PCI function to be read. Size is
1015 returned. When possible 32-bit PCI configuration read cycles are used to read
1016 from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
1017 and 16-bit PCI configuration read cycles may be used at the beginning and the
1020 If StartAddress > 0x0FFFFFFF, then ASSERT().
1021 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1022 If Size > 0 and Buffer is NULL, then ASSERT().
1024 @param StartAddress Starting address that encodes the PCI Bus, Device,
1025 Function and Register.
1026 @param Size Size in bytes of the transfer.
1027 @param Buffer Pointer to a buffer receiving the data read.
1035 IN UINTN StartAddress
,
1040 return PciCf8ReadBuffer (StartAddress
, Size
, Buffer
);
1044 Copies the data in a caller supplied buffer to a specified range of PCI
1045 configuration space.
1047 Writes the range of PCI configuration registers specified by StartAddress and
1048 Size from the buffer specified by Buffer. This function only allows the PCI
1049 configuration registers from a single PCI function to be written. Size is
1050 returned. When possible 32-bit PCI configuration write cycles are used to
1051 write from StartAdress to StartAddress + Size. Due to alignment restrictions,
1052 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
1053 and the end of the range.
1055 If StartAddress > 0x0FFFFFFF, then ASSERT().
1056 If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
1057 If Size > 0 and Buffer is NULL, then ASSERT().
1059 @param StartAddress Starting address that encodes the PCI Bus, Device,
1060 Function and Register.
1061 @param Size Size in bytes of the transfer.
1062 @param Buffer Pointer to a buffer containing the data to write.
1070 IN UINTN StartAddress
,
1075 return PciCf8WriteBuffer (StartAddress
, Size
, Buffer
);