1 ;******************************************************************************
3 ;* Copyright (c) 2006, Intel Corporation
4 ;* All rights reserved. This program and the accompanying materials
5 ;* are licensed and made available under the terms and conditions of the BSD License
6 ;* which accompanies this distribution. The full text of the license may be found at
7 ;* http://opensource.org/licenses/bsd-license.php
9 ;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 ;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12 ;******************************************************************************
14 EXCPT64_DIVIDE_ERROR EQU 0
17 EXCPT64_BREAKPOINT EQU 3
18 EXCPT64_OVERFLOW EQU 4
20 EXCPT64_INVALID_OPCODE EQU 6
21 EXCPT64_DOUBLE_FAULT EQU 8
22 EXCPT64_INVALID_TSS EQU 10
23 EXCPT64_SEG_NOT_PRESENT EQU 11
24 EXCPT64_STACK_FAULT EQU 12
25 EXCPT64_GP_FAULT EQU 13
26 EXCPT64_PAGE_FAULT EQU 14
27 EXCPT64_FP_ERROR EQU 16
28 EXCPT64_ALIGNMENT_CHECK EQU 17
29 EXCPT64_MACHINE_CHECK EQU 18
32 FXSTOR_FLAG EQU 01000000h ; bit cpuid 24 of feature flags
34 ;; The FXSTOR and FXRSTOR commands are used for saving and restoring the x87,
35 ;; MMX, SSE, SSE2, etc registers. The initialization of the debugsupport driver
36 ;; MUST check the CPUID feature flags to see that these instructions are available
37 ;; and fail to init if they are not.
41 db 0fh, 0aeh, 00000111y ; mod = 00, reg/op = 000, r/m = 111 = [rdi]
46 db 0fh, 0aeh, 00001110y ; mod = 00, reg/op = 001, r/m = 110 = [rsi]
51 public OrigVector, InterruptEntryStub, StubSize, CommonIdtEntry, FxStorSupport
53 StubSize dd InterruptEntryStubEnd - InterruptEntryStub
54 AppRsp dq 1111111111111111h ; ?
55 DebugRsp dq 2222222222222222h ; ?
56 ExtraPush dq 3333333333333333h ; ?
57 ExceptData dq 4444444444444444h ; ?
58 Rflags dq 5555555555555555h ; ?
59 OrigVector dq 6666666666666666h ; ?
61 ;; The declarations below define the memory region that will be used for the debug stack.
62 ;; The context record will be built by pushing register values onto this stack.
63 ;; It is imparitive that alignment be carefully managed, since the FXSTOR and
64 ;; FXRSTOR instructions will GP fault if their memory operand is not 16 byte aligned.
66 ;; The stub will switch stacks from the application stack to the debuger stack
67 ;; and pushes the exception number.
69 ;; Then we building the context record on the stack. Since the stack grows down,
70 ;; we push the fields of the context record from the back to the front. There
71 ;; are 336 bytes of stack used prior allocating the 512 bytes of stack to be
72 ;; used as the memory buffer for the fxstor instruction. Therefore address of
73 ;; the buffer used for the FXSTOR instruction is &Eax - 336 - 512, which
74 ;; must be 16 byte aligned.
76 ;; We carefully locate the stack to make this happen.
78 ;; For reference, the context structure looks like this:
80 ;; UINT64 ExceptionData;
81 ;; FX_SAVE_STATE_X64 FxSaveState; // 512 bytes, must be 16 byte aligned
82 ;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
83 ;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
86 ;; UINT64 Gdtr[2], Idtr[2];
88 ;; UINT64 Gs, Fs, Es, Ds, Cs, Ss;
89 ;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
90 ;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
91 ;; } SYSTEM_CONTEXT_X64; // 64 bit system context record
94 DebugStackEnd db "DbgStkEnd >>>>>>" ;; 16 byte long string - must be 16 bytes to preserve alignment
95 dd 1ffch dup (000000000h) ;; 32K should be enough stack
96 ;; This allocation is coocked to insure
97 ;; that the the buffer for the FXSTORE instruction
98 ;; will be 16 byte aligned also.
100 ExceptionNumber dq ? ;; first entry will be the vector number pushed by the stub
102 DebugStackBegin db "<<<< DbgStkBegin" ;; initial debug ESP == DebugStackBegin, set in stub
108 externdef InterruptDistrubutionHub:near
110 ;------------------------------------------------------------------------------
116 ; Abstract: Writeback and invalidate cache
118 EfiWbinvd PROC PUBLIC
123 ;------------------------------------------------------------------------------
129 ; Abstract: Returns TRUE if FxStor instructions are supported
131 FxStorSupport PROC PUBLIC
134 ; cpuid corrupts rbx which must be preserved per the C calling convention
147 ;------------------------------------------------------------------------------
153 ; Abstract: Returns physical address of IDTR
160 sidt QWORD PTR [rbp - 6]
161 mov rax, QWORD PTR [rbp - 4]
169 ;------------------------------------------------------------------------------
171 ; WriteInterruptFlag (
172 ; BOOLEAN NewState // rcx
175 ; Abstract: Programs interrupt flag to the requested state and returns previous
178 WriteInterruptFlag PROC PUBLIC
192 WriteInterruptFlag ENDP
196 ;------------------------------------------------------------------------------
199 ; DESCRIPTOR * DestDesc, // rcx
200 ; void (*Vector) (void) // rdx
203 ; Abstract: Encodes an IDT descriptor with the given physical address
205 Vect2Desc PROC PUBLIC
208 mov word ptr [rcx], ax ; write bits 15..0 of offset
210 mov word ptr [rcx+2], dx ; SYS_CODE_SEL from GDT
211 mov word ptr [rcx+4], 0e00h OR 8000h ; type = 386 interrupt gate, present
213 mov word ptr [rcx+6], ax ; write bits 31..16 of offset
215 mov dword ptr [rcx+8], eax ; write bits 63..32 of offset
223 ;------------------------------------------------------------------------------
226 ; Abstract: This code is not a function, but is a small piece of code that is
227 ; copied and fixed up once for each IDT entry that is hooked.
230 push 0 ; push vector number - will be modified before installed
232 dd 0 ; fixed up to relative address of CommonIdtEntry
233 InterruptEntryStubEnd:
237 ;------------------------------------------------------------------------------
240 ; Abstract: This code is not a function, but is the common part for all IDT
245 ;; At this point, the stub has saved the current application stack esp into AppRsp
246 ;; and switched stacks to the debug stack, where it pushed the vector number
248 ;; The application stack looks like this:
251 ;; (last application stack entry)
252 ;; [16 bytes alignment, do not care it]
253 ;; SS from interrupted task
254 ;; RSP from interrupted task
255 ;; rflags from interrupted task
256 ;; CS from interrupted task
257 ;; RIP from interrupted task
258 ;; Error code <-------------------- Only present for some exeption types
260 ;; Vector Number <----------------- pushed in our IDT Entry
264 ;; The stub switched us to the debug stack and pushed the interrupt number.
266 ;; Next, construct the context record. It will be build on the debug stack by
267 ;; pushing the registers in the correct order so as to create the context structure
268 ;; on the debug stack. The context record must be built from the end back to the
269 ;; beginning because the stack grows down...
271 ;; For reference, the context record looks like this:
275 ;; UINT64 ExceptionData;
276 ;; FX_SAVE_STATE_X64 FxSaveState;
277 ;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
278 ;; UINT64 Cr0, Cr2, Cr3, Cr4, Cr8;
281 ;; UINT64 Gdtr[2], Idtr[2];
283 ;; UINT64 Gs, Fs, Es, Ds, Cs, Ss;
284 ;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
285 ;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
286 ;; } SYSTEM_CONTEXT_X64; // 64 bit system context record
288 ;; NOTE: we save rsp here to prevent compiler put rip reference cause error AppRsp
290 mov rax, qword ptr [rsp][8] ; save vector number
291 mov ExceptionNumber, rax ; save vector number
293 add rsp, 8 ; pop vector number
294 mov AppRsp, rsp ; save stack top
295 mov rsp, offset DebugStackBegin ; switch to debugger stack
296 sub rsp, 8 ; leave space for vector number
298 ;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
299 ;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
317 ;; Save interrupt state rflags register...
320 mov qword ptr Rflags, rax
322 ;; We need to determine if any extra data was pushed by the exception, and if so, save it
323 ;; To do this, we check the exception number pushed by the stub, and cache the
324 ;; result in a variable since we'll need this again.
325 cmp ExceptionNumber, EXCPT64_DOUBLE_FAULT
327 cmp ExceptionNumber, EXCPT64_INVALID_TSS
329 cmp ExceptionNumber, EXCPT64_SEG_NOT_PRESENT
331 cmp ExceptionNumber, EXCPT64_STACK_FAULT
333 cmp ExceptionNumber, EXCPT64_GP_FAULT
335 cmp ExceptionNumber, EXCPT64_PAGE_FAULT
337 cmp ExceptionNumber, EXCPT64_ALIGNMENT_CHECK
345 ;; If there's some extra data, save it also, and modify the saved AppRsp to effectively
346 ;; pop this value off the application's stack.
355 ;; The "push" above pushed the debug stack rsp. Since what we're actually doing
356 ;; is building the context record on the debug stack, we need to save the pushed
357 ;; debug RSP, and replace it with the application's last stack entry...
362 ; application stack has ss, rsp, rflags, cs, & rip, so
363 ; last actual application stack entry is
364 ; 40 bytes into the application stack.
367 ;; continue building context record
368 ;; UINT64 Gs, Fs, Es, Ds, Cs, Ss; insure high 16 bits of each is zero
372 ; CS from application is one entry back in application stack
374 movzx rax, word ptr [rax + 8]
387 ; Rip from application is on top of application stack
391 ;; UINT64 Gdtr[2], Idtr[2];
407 ;; Rflags from application is two entries back in application stack
409 push qword ptr [rax + 16]
411 ;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
412 ;; insure FXSAVE/FXRSTOR is enabled in CR4...
413 ;; ... while we're at it, make sure DE is also enabled...
428 ;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
431 ;; clear Dr7 while executing debugger itself
437 ;; insure all status bits in dr6 are clear...
450 ;; FX_SAVE_STATE_X64 FxSaveState;
453 ; IMPORTANT!! The debug stack has been carefully constructed to
454 ; insure that rsp and rdi are 16 byte aligned when we get here.
455 ; They MUST be. If they are not, a GP fault will occur.
458 ;; UINT64 ExceptionData;
462 ; call to C code which will in turn call registered handler
463 ; pass in the vector number
465 mov rcx, ExceptionNumber
467 call InterruptDistrubutionHub
471 ;; UINT64 ExceptionData;
474 ;; FX_SAVE_STATE_X64 FxSaveState;
479 ;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
488 ;; skip restore of dr6. We cleared dr6 during the context save.
493 ;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
508 pop qword ptr [rax + 16]
511 ;; UINT64 Gdtr[2], Idtr[2];
512 ;; Best not let anyone mess with these particular registers...
518 ;; UINT64 Gs, Fs, Es, Ds, Cs, Ss;
519 ;; NOTE - modified segment registers could hang the debugger... We
520 ;; could attempt to insulate ourselves against this possibility,
521 ;; but that poses risks as well.
533 pop qword ptr [rax + 8]
537 ;; The next stuff to restore is the general purpose registers that were pushed
538 ;; using the "push" instruction.
540 ;; The value of RSP as stored in the context record is the application RSP
541 ;; including the 5 entries on the application stack caused by the exception
542 ;; itself. It may have been modified by the debug agent, so we need to
543 ;; determine if we need to relocate the application stack.
545 mov rbx, [rsp + 24] ; move the potentially modified AppRsp into rbx
555 mov rcx, [rax + 8] ; CS
558 mov rcx, [rax + 16] ; RFLAGS
561 mov rcx, [rax + 24] ; RSP
564 mov rcx, [rax + 32] ; SS
567 mov rax, rbx ; modify the saved AppRsp to the new AppRsp
570 mov rax, DebugRsp ; restore the DebugRsp on the debug stack
571 ; so our "pop" will not cause a stack switch
574 cmp ExceptionNumber, 068h
579 ;; Restore rflags so when we chain, the flags will be exactly as if we were never here.
580 ;; We gin up the stack to do an iretq so we can get ALL the flags.
591 and rbx, NOT 300h ; special handling for IF and TF
595 mov rax, offset PhonyIretq
600 ;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
601 ;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
619 ;; Switch back to application stack
622 ;; Jump to original handler
626 ;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
627 ;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
645 ;; Switch back to application stack
648 ;; We're outa here...