IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciBus.h

   1 /** @file
   2   Header files and data structures needed by PCI Bus module.
   3
   4 Copyright (c) 2006 - 2009, Intel Corporation
   5 All rights reserved. This program and the accompanying materials
   6 are licensed and made available under the terms and conditions of the BSD License
   7 which accompanies this distribution.  The full text of the license may be found at
   8 http://opensource.org/licenses/bsd-license.php
   9
  10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15
  16 #ifndef _EFI_PCI_BUS_H_
  17 #define _EFI_PCI_BUS_H_
  18
  19 #include <FrameworkDxe.h>
  20
  21 #include <Protocol/LoadedImage.h>
  22 #include <Protocol/PciHostBridgeResourceAllocation.h>
  23 #include <Protocol/PciIo.h>
  24 #include <Protocol/LoadFile2.h>
  25 #include <Protocol/PciRootBridgeIo.h>
  26 #include <Protocol/PciHotPlugRequest.h>
  27 #include <Protocol/DevicePath.h>
  28 #include <Protocol/PciPlatform.h>
  29 #include <Protocol/PciHotPlugInit.h>
  30 #include <Protocol/Decompress.h>
  31 #include <Protocol/BusSpecificDriverOverride.h>
  32 #include <Protocol/IncompatiblePciDeviceSupport.h>
  33
  34 #include <Library/DebugLib.h>
  35 #include <Library/UefiDriverEntryPoint.h>
  36 #include <Library/BaseLib.h>
  37 #include <Library/UefiLib.h>
  38 #include <Library/BaseMemoryLib.h>
  39 #include <Library/ReportStatusCodeLib.h>
  40 #include <Library/MemoryAllocationLib.h>
  41 #include <Library/UefiBootServicesTableLib.h>
  42 #include <Library/DevicePathLib.h>
  43 #include <Library/PcdLib.h>
  44 #include <Library/PciIncompatibleDeviceSupportLib.h>
  45 #include <Library/PeCoffLib.h>
  46
  47 #include <IndustryStandard/Pci.h>
  48 #include <IndustryStandard/PeImage.h>
  49 #include <IndustryStandard/Acpi.h>
  50
  51 typedef struct _PCI_IO_DEVICE              PCI_IO_DEVICE;
  52 typedef struct _PCI_BAR                    PCI_BAR;
  53
  54 typedef enum {
  55   PciBarTypeUnknown = 0,
  56   PciBarTypeIo16,
  57   PciBarTypeIo32,
  58   PciBarTypeMem32,
  59   PciBarTypePMem32,
  60   PciBarTypeMem64,
  61   PciBarTypePMem64,
  62   PciBarTypeIo,
  63   PciBarTypeMem,
  64   PciBarTypeMaxType
  65 } PCI_BAR_TYPE;
  66
  67 #include "ComponentName.h"
  68 #include "PciIo.h"
  69 #include "PciCommand.h"
  70 #include "PciDeviceSupport.h"
  71 #include "PciEnumerator.h"
  72 #include "PciEnumeratorSupport.h"
  73 #include "PciDriverOverride.h"
  74 #include "PciRomTable.h"
  75 #include "PciOptionRomSupport.h"
  76 #include "PciPowerManagement.h"
  77 #include "PciHotPlugSupport.h"
  78 #include "PciLib.h"
  79
  80 #define VGABASE1  0x3B0
  81 #define VGALIMIT1 0x3BB
  82
  83 #define VGABASE2  0x3C0
  84 #define VGALIMIT2 0x3DF
  85
  86 #define ISABASE   0x100
  87 #define ISALIMIT  0x3FF
  88
  89 //
  90 // PCI BAR parameters
  91 //
  92 struct _PCI_BAR {
  93   UINT64        BaseAddress;
  94   UINT64        Length;
  95   UINT64        Alignment;
  96   PCI_BAR_TYPE  BarType;
  97   BOOLEAN       Prefetchable;
  98   UINT8         MemType;
  99   UINT8         Offset;
 100 };
 101
 102 #define PPB_BAR_0                             0
 103 #define PPB_BAR_1                             1
 104 #define PPB_IO_RANGE                          2
 105 #define PPB_MEM32_RANGE                       3
 106 #define PPB_PMEM32_RANGE                      4
 107 #define PPB_PMEM64_RANGE                      5
 108 #define PPB_MEM64_RANGE                       0xFF
 109
 110 #define P2C_BAR_0                             0
 111 #define P2C_MEM_1                             1
 112 #define P2C_MEM_2                             2
 113 #define P2C_IO_1                              3
 114 #define P2C_IO_2                              4
 115
 116 #define EFI_BRIDGE_IO32_DECODE_SUPPORTED      0x0001
 117 #define EFI_BRIDGE_PMEM32_DECODE_SUPPORTED    0x0002
 118 #define EFI_BRIDGE_PMEM64_DECODE_SUPPORTED    0x0004
 119 #define EFI_BRIDGE_IO16_DECODE_SUPPORTED      0x0008
 120 #define EFI_BRIDGE_PMEM_MEM_COMBINE_SUPPORTED 0x0010
 121 #define EFI_BRIDGE_MEM64_DECODE_SUPPORTED     0x0020
 122 #define EFI_BRIDGE_MEM32_DECODE_SUPPORTED     0x0040
 123
 124 #define PCI_MAX_HOST_BRIDGE_NUM               0x0010
 125
 126 //
 127 // Define option for attribute
 128 //
 129 #define EFI_SET_SUPPORTS    0
 130 #define EFI_SET_ATTRIBUTES  1
 131
 132 #define PCI_IO_DEVICE_SIGNATURE               SIGNATURE_32 ('p', 'c', 'i', 'o')
 133
 134 struct _PCI_IO_DEVICE {
 135   UINT32                                    Signature;
 136   EFI_HANDLE                                Handle;
 137   EFI_PCI_IO_PROTOCOL                       PciIo;
 138   LIST_ENTRY                                Link;
 139
 140   EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL PciDriverOverride;
 141   EFI_DEVICE_PATH_PROTOCOL                  *DevicePath;
 142   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL           *PciRootBridgeIo;
 143   EFI_LOAD_FILE2_PROTOCOL                   LoadFile2;
 144
 145   //
 146   // PCI configuration space header type
 147   //
 148   PCI_TYPE00                                Pci;
 149
 150   //
 151   // Bus number, Device number, Function number
 152   //
 153   UINT8                                     BusNumber;
 154   UINT8                                     DeviceNumber;
 155   UINT8                                     FunctionNumber;
 156
 157   //
 158   // BAR for this PCI Device
 159   //
 160   PCI_BAR                                   PciBar[PCI_MAX_BAR];
 161
 162   //
 163   // The bridge device this pci device is subject to
 164   //
 165   PCI_IO_DEVICE                             *Parent;
 166
 167   //
 168   // A linked list for children Pci Device if it is bridge device
 169   //
 170   LIST_ENTRY                                ChildList;
 171
 172   //
 173   // TURE if the PCI bus driver creates the handle for this PCI device
 174   //
 175   BOOLEAN                                   Registered;
 176
 177   //
 178   // TRUE if the PCI bus driver successfully allocates the resource required by
 179   // this PCI device
 180   //
 181   BOOLEAN                                   Allocated;
 182
 183   //
 184   // The attribute this PCI device currently set
 185   //
 186   UINT64                                    Attributes;
 187
 188   //
 189   // The attributes this PCI device actually supports
 190   //
 191   UINT64                                    Supports;
 192
 193   //
 194   // The resource decode the bridge supports
 195   //
 196   UINT32                                    Decodes;
 197
 198   //
 199   // The OptionRom Size
 200   //
 201   UINT64                                    RomSize;
 202
 203   //
 204   // The OptionRom Size
 205   //
 206   UINT64                                    RomBase;
 207
 208   //
 209   // TRUE if all OpROM (in device or in platform specific position) have been processed
 210   //
 211   BOOLEAN                                   AllOpRomProcessed;
 212
 213   //
 214   // TRUE if there is any EFI driver in the OptionRom
 215   //
 216   BOOLEAN                                   BusOverride;
 217
 218   //
 219   // A list tracking reserved resource on a bridge device
 220   //
 221   LIST_ENTRY                                ReservedResourceList;
 222
 223   //
 224   // A list tracking image handle of platform specific overriding driver
 225   //
 226   LIST_ENTRY                                OptionRomDriverList;
 227
 228   EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR         *ResourcePaddingDescriptors;
 229   EFI_HPC_PADDING_ATTRIBUTES                PaddingAttributes;
 230
 231   BOOLEAN                                   IsPciExp;
 232
 233 };
 234
 235 #define PCI_IO_DEVICE_FROM_PCI_IO_THIS(a) \
 236   CR (a, PCI_IO_DEVICE, PciIo, PCI_IO_DEVICE_SIGNATURE)
 237
 238 #define PCI_IO_DEVICE_FROM_PCI_DRIVER_OVERRIDE_THIS(a) \
 239   CR (a, PCI_IO_DEVICE, PciDriverOverride, PCI_IO_DEVICE_SIGNATURE)
 240
 241 #define PCI_IO_DEVICE_FROM_LINK(a) \
 242   CR (a, PCI_IO_DEVICE, Link, PCI_IO_DEVICE_SIGNATURE)
 243
 244 #define PCI_IO_DEVICE_FROM_LOAD_FILE2_THIS(a) \
 245   CR (a, PCI_IO_DEVICE, LoadFile2, PCI_IO_DEVICE_SIGNATURE)
 246
 247
 248
 249 //
 250 // Global Variables
 251 //
 252 extern EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL *gEfiIncompatiblePciDeviceSupport;
 253 extern EFI_DRIVER_BINDING_PROTOCOL                  gPciBusDriverBinding;
 254 extern EFI_COMPONENT_NAME_PROTOCOL                  gPciBusComponentName;
 255 extern EFI_COMPONENT_NAME2_PROTOCOL                 gPciBusComponentName2;
 256 extern BOOLEAN                                      gFullEnumeration;
 257 extern UINTN                                        gPciHostBridgeNumber;
 258 extern EFI_HANDLE                                   gPciHostBrigeHandles[PCI_MAX_HOST_BRIDGE_NUM];
 259 extern UINT64                                       gAllOne;
 260 extern UINT64                                       gAllZero;
 261 extern EFI_PCI_PLATFORM_PROTOCOL                    *gPciPlatformProtocol;
 262
 263
 264 /**
 265   Macro that checks whether device is a GFX device.
 266
 267   @param  _p      Specified device.
 268
 269   @retval TRUE    Device is a a GFX device.
 270   @retval FALSE   Device is not a a GFX device.
 271
 272 **/
 273 #define IS_PCI_GFX(_p)     IS_CLASS2 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_OTHER)
 274
 275 /**
 276   Test to see if this driver supports ControllerHandle. Any ControllerHandle
 277   than contains a gEfiPciRootBridgeIoProtocolGuid protocol can be supported.
 278
 279   @param  This                Protocol instance pointer.
 280   @param  Controller          Handle of device to test.
 281   @param  RemainingDevicePath Optional parameter use to pick a specific child.
 282                               device to start.
 283
 284   @retval EFI_SUCCESS         This driver supports this device.
 285   @retval EFI_ALREADY_STARTED This driver is already running on this device.
 286   @retval other               This driver does not support this device.
 287
 288 **/
 289 EFI_STATUS
 290 EFIAPI
 291 PciBusDriverBindingSupported (
 292   IN EFI_DRIVER_BINDING_PROTOCOL    *This,
 293   IN EFI_HANDLE                     Controller,
 294   IN EFI_DEVICE_PATH_PROTOCOL       *RemainingDevicePath
 295   );
 296
 297 /**
 298   Start this driver on ControllerHandle and enumerate Pci bus and start
 299   all device under PCI bus.
 300
 301   @param  This                 Protocol instance pointer.
 302   @param  Controller           Handle of device to bind driver to.
 303   @param  RemainingDevicePath  Optional parameter use to pick a specific child.
 304                                device to start.
 305
 306   @retval EFI_SUCCESS          This driver is added to ControllerHandle.
 307   @retval EFI_ALREADY_STARTED  This driver is already running on ControllerHandle.
 308   @retval other                This driver does not support this device.
 309
 310 **/
 311 EFI_STATUS
 312 EFIAPI
 313 PciBusDriverBindingStart (
 314   IN EFI_DRIVER_BINDING_PROTOCOL    *This,
 315   IN EFI_HANDLE                     Controller,
 316   IN EFI_DEVICE_PATH_PROTOCOL       *RemainingDevicePath
 317   );
 318
 319 /**
 320   Stop this driver on ControllerHandle. Support stoping any child handles
 321   created by this driver.
 322
 323   @param  This              Protocol instance pointer.
 324   @param  Controller        Handle of device to stop driver on.
 325   @param  NumberOfChildren  Number of Handles in ChildHandleBuffer. If number of
 326                             children is zero stop the entire bus driver.
 327   @param  ChildHandleBuffer List of Child Handles to Stop.
 328
 329   @retval EFI_SUCCESS       This driver is removed ControllerHandle.
 330   @retval other             This driver was not removed from this device.
 331
 332 **/
 333 EFI_STATUS
 334 EFIAPI
 335 PciBusDriverBindingStop (
 336   IN  EFI_DRIVER_BINDING_PROTOCOL   *This,
 337   IN  EFI_HANDLE                    Controller,
 338   IN  UINTN                         NumberOfChildren,
 339   IN  EFI_HANDLE                    *ChildHandleBuffer
 340   );
 341
 342 #endif