IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciLib.h

   1 /** @file
   2
   3 Copyright (c) 2006 - 2007, Intel Corporation
   4 All rights reserved. This program and the accompanying materials
   5 are licensed and made available under the terms and conditions of the BSD License
   6 which accompanies this distribution.  The full text of the license may be found at
   7 http://opensource.org/licenses/bsd-license.php
   8
   9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12 Module Name:
  13
  14   PciLib.h
  15
  16 Abstract:
  17
  18   PCI Bus Driver Lib header file.
  19   Please use PCD feature flag PcdPciBusHotplugDeviceSupport to enable
  20   support hot plug.
  21
  22 Revision History
  23
  24 **/
  25
  26 #ifndef _EFI_PCI_LIB_H_
  27 #define _EFI_PCI_LIB_H_
  28
  29 //
  30 // Mask definistions for PCD PcdPciIncompatibleDeviceSupportMask
  31 //
  32 #define PCI_INCOMPATIBLE_ACPI_RESOURCE_SUPPORT         0x01
  33 #define PCI_INCOMPATIBLE_READ_SUPPORT                  0x02
  34 #define PCI_INCOMPATIBLE_WRITE_SUPPORT                 0x04
  35 #define PCI_INCOMPATIBLE_REGISTER_UPDATE_SUPPORT       0x08
  36 #define PCI_INCOMPATIBLE_ACCESS_WIDTH_SUPPORT          0x0a
  37
  38 typedef struct {
  39   EFI_HANDLE            Handle;
  40 } EFI_DEVICE_HANDLE_EXTENDED_DATA_PAYLOAD;
  41
  42 typedef struct {
  43   UINT32                             Bar;
  44   UINT16                             DevicePathSize;
  45   UINT16                             ReqResSize;
  46   UINT16                             AllocResSize;
  47   UINT8                              *DevicePath;
  48   UINT8                              *ReqRes;
  49   UINT8                              *AllocRes;
  50 } EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA_PAYLOAD;
  51
  52
  53 /**
  54   Retrieve the BAR information via PciIo interface.
  55
  56   @param PciIoDevice Pci device instance.
  57 **/
  58 VOID
  59 GetBackPcCardBar (
  60   IN  PCI_IO_DEVICE                  *PciIoDevice
  61   );
  62
  63 /**
  64   Remove rejected pci device from specific root bridge
  65   handle.
  66
  67   @param RootBridgeHandle  specific parent root bridge handle.
  68   @param Bridge            Bridge device instance.
  69
  70   @retval EFI_SUCCESS  Success operation.
  71 **/
  72 EFI_STATUS
  73 RemoveRejectedPciDevices (
  74   EFI_HANDLE        RootBridgeHandle,
  75   IN PCI_IO_DEVICE  *Bridge
  76   );
  77
  78 /**
  79   Wrapper function for allocating resource for pci host bridge.
  80
  81   @param PciResAlloc Point to protocol instance EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
  82
  83 **/
  84 EFI_STATUS
  85 PciHostBridgeResourceAllocator (
  86   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
  87   );
  88
  89 /**
  90   Wrapper function for allocating resource for pci host bridge without hotplug device support.
  91
  92   @param PciResAlloc Point to protocol instance EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
  93
  94 **/
  95 EFI_STATUS
  96 PciHostBridgeResourceAllocator_WithoutHotPlugDeviceSupport (
  97   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
  98   );
  99
 100 /**
 101   Wrapper function for allocating resource for pci host bridge with hotplug device support.
 102
 103   @param PciResAlloc Point to protocol instance EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
 104
 105 **/
 106 EFI_STATUS
 107 PciHostBridgeResourceAllocator_WithHotPlugDeviceSupport (
 108   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
 109   );
 110
 111 /**
 112   Wapper function of scanning pci bus and assign bus number to the given PCI bus system
 113   Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.
 114
 115   @param  Bridge          Bridge device instance.
 116   @param  StartBusNumber  start point.
 117   @param  SubBusNumber    Point to sub bus number.
 118   @param  PaddedBusRange  Customized bus number.
 119
 120   @retval EFI_SUCCESS     Success.
 121   @retval EFI_DEVICE_ERROR Fail to scan bus.
 122 **/
 123 EFI_STATUS
 124 PciScanBus (
 125   IN PCI_IO_DEVICE                      *Bridge,
 126   IN UINT8                              StartBusNumber,
 127   OUT UINT8                             *SubBusNumber,
 128   OUT UINT8                             *PaddedBusRange
 129   );
 130
 131 /**
 132   Wapper function of scanning pci bus and assign bus number to the given PCI bus system
 133   Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.
 134
 135   @param  Bridge          Bridge device instance.
 136   @param  StartBusNumber  start point.
 137   @param  SubBusNumber    Point to sub bus number.
 138   @param  PaddedBusRange  Customized bus number.
 139
 140   @retval EFI_SUCCESS     Success.
 141   @retval EFI_DEVICE_ERROR Fail to scan bus.
 142 **/
 143 EFI_STATUS
 144 PciScanBus_WithHotPlugDeviceSupport (
 145   IN PCI_IO_DEVICE                      *Bridge,
 146   IN UINT8                              StartBusNumber,
 147   OUT UINT8                             *SubBusNumber,
 148   OUT UINT8                             *PaddedBusRange
 149   );
 150
 151 /**
 152   Wapper function of scanning pci bus and assign bus number to the given PCI bus system
 153   Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.
 154
 155   @param  Bridge          Bridge device instance.
 156   @param  StartBusNumber  start point.
 157   @param  SubBusNumber    Point to sub bus number.
 158   @param  PaddedBusRange  Customized bus number.
 159
 160   @retval EFI_SUCCESS     Success.
 161   @retval EFI_DEVICE_ERROR Fail to scan bus.
 162 **/
 163 EFI_STATUS
 164 PciScanBus_WithoutHotPlugDeviceSupport (
 165   IN PCI_IO_DEVICE                      *Bridge,
 166   IN UINT8                              StartBusNumber,
 167   OUT UINT8                             *SubBusNumber,
 168   OUT UINT8                             *PaddedBusRange
 169   );
 170
 171 /**
 172   Process Option Rom on this host bridge.
 173
 174   @param Bridge  Pci bridge device instance.
 175
 176   @retval EFI_SUCCESS Success.
 177 **/
 178 EFI_STATUS
 179 PciRootBridgeP2CProcess (
 180   IN PCI_IO_DEVICE *Bridge
 181   );
 182
 183 /**
 184   Process Option Rom on this host bridge.
 185
 186   @param PciResAlloc Pointer to instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
 187
 188   @retval EFI_NOT_FOUND Can not find the root bridge instance.
 189   @retval EFI_SUCCESS   Success process.
 190 **/
 191 EFI_STATUS
 192 PciHostBridgeP2CProcess (
 193   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
 194   );
 195
 196 /**
 197   This function is used to enumerate the entire host bridge
 198   in a given platform.
 199
 200   @param PciResAlloc   A pointer to the resource allocate protocol.
 201
 202   @retval EFI_OUT_OF_RESOURCES no enough resource.
 203   @retval EFI_SUCCESS Success.
 204
 205 **/
 206 EFI_STATUS
 207 PciHostBridgeEnumerator (
 208   EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL  *PciResAlloc
 209   );
 210
 211 /**
 212   Read PCI configuration space through EFI_PCI_IO_PROTOCOL.
 213
 214   @param  PciIo               A pointer to the EFI_PCI_O_PROTOCOL.
 215   @param  Width               Signifies the width of the memory operations.
 216   @param  Address             The address within the PCI configuration space for the PCI controller.
 217   @param  Count               The number of unit to be read.
 218   @param  Buffer              For read operations, the destination buffer to store the results. For
 219                               write operations, the source buffer to write data from.
 220
 221   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
 222   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
 223   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 224   @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.
 225
 226 **/
 227 EFI_STATUS
 228 PciIoRead (
 229   IN       EFI_PCI_IO_PROTOCOL                    *PciIo,
 230   IN       EFI_PCI_IO_PROTOCOL_WIDTH              Width,
 231   IN       UINT32                                 Address,
 232   IN       UINTN                                  Count,
 233   IN OUT   VOID                                   *Buffer
 234   );
 235
 236 /**
 237   Write PCI configuration space through EFI_PCI_IO_PROTOCOL.
 238
 239   @param  PciIo               A pointer to the EFI_PCI_O_PROTOCOL.
 240   @param  Width               Signifies the width of the memory operations.
 241   @param  Address             The address within the PCI configuration space for the PCI controller.
 242   @param  Count               The number of unit to be write.
 243   @param  Buffer              For read operations, the destination buffer to store the results. For
 244                               write operations, the source buffer to write data from.
 245
 246   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
 247   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
 248   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 249   @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.
 250
 251 **/
 252 EFI_STATUS
 253 PciIoWrite (
 254   IN       EFI_PCI_IO_PROTOCOL                    *PciIo,
 255   IN       EFI_PCI_IO_PROTOCOL_WIDTH              Width,
 256   IN       UINT32                                 Address,
 257   IN       UINTN                                  Count,
 258   IN OUT   VOID                                   *Buffer
 259   );
 260
 261 /**
 262   Write PCI configuration space through EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
 263
 264   @param  PciRootBridgeIo     A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
 265   @param  Pci                 A pointer to PCI_TYPE00.
 266   @param  Width               Signifies the width of the memory operations.
 267   @param  Address             The address within the PCI configuration space for the PCI controller.
 268   @param  Count               The number of unit to be write.
 269   @param  Buffer              For read operations, the destination buffer to store the results. For
 270                               write operations, the source buffer to write data from.
 271
 272   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
 273   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
 274   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 275   @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.
 276
 277 **/
 278 EFI_STATUS
 279 PciRootBridgeIoWrite (
 280   IN       EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL        *PciRootBridgeIo,
 281   IN       PCI_TYPE00                             *Pci,
 282   IN       EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH  Width,
 283   IN       UINT64                                 Address,
 284   IN       UINTN                                  Count,
 285   IN OUT   VOID                                   *Buffer
 286   );
 287
 288 /**
 289   Read PCI configuration space through EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
 290
 291   @param  PciRootBridgeIo     A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
 292   @param  Pci                 A pointer to PCI_TYPE00.
 293   @param  Width               Signifies the width of the memory operations.
 294   @param  Address             The address within the PCI configuration space for the PCI controller.
 295   @param  Count               The number of unit to be read.
 296   @param  Buffer              For read operations, the destination buffer to store the results. For
 297                               write operations, the source buffer to write data from.
 298
 299   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
 300   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
 301   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 302   @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.
 303
 304 **/
 305 EFI_STATUS
 306 PciRootBridgeIoRead (
 307   IN       EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL        *PciRootBridgeIo,
 308   IN       PCI_TYPE00                             *Pci,         OPTIONAL
 309   IN       EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH  Width,
 310   IN       UINT64                                 Address,
 311   IN       UINTN                                  Count,
 312   IN OUT   VOID                                   *Buffer
 313   );
 314 #endif