2 Internal include file of CPU I/O DXE Driver.
4 Copyright (c) 2004 - 2010, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15 #ifndef __CPU_IO_DXE_H__
16 #define __CPU_IO_DXE_H__
21 #include <Protocol/CpuIo.h>
23 #include <Library/BaseLib.h>
24 #include <Library/DebugLib.h>
25 #include <Library/IoLib.h>
26 #include <Library/UefiBootServicesTableLib.h>
28 #define MAX_IO_PORT_ADDRESS 0xFFFF
31 Reads memory-mapped registers.
33 The I/O operations are carried out exactly as requested. The caller is responsible
34 for satisfying any alignment and I/O width restrictions that a PI System on a
35 platform might require. For example on some platforms, width requests of
36 EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
37 be handled by the driver.
39 If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
40 or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
41 each of the Count operations that is performed.
43 If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
44 EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
45 incremented for each of the Count operations that is performed. The read or
46 write operation is performed Count times on the same Address.
48 If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
49 EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
50 incremented for each of the Count operations that is performed. The read or
51 write operation is performed Count times from the first element of Buffer.
53 @param[in] This A pointer to the EFI_CPU_IO_PROTOCOL instance.
54 @param[in] Width Signifies the width of the I/O or Memory operation.
55 @param[in] Address The base address of the I/O operation.
56 @param[in] Count The number of I/O operations to perform. The number of
57 bytes moved is Width size * Count, starting at Address.
58 @param[out] Buffer For read operations, the destination buffer to store the results.
59 For write operations, the source buffer from which to write data.
61 @retval EFI_SUCCESS The data was read from or written to the PI system.
62 @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
63 @retval EFI_INVALID_PARAMETER Buffer is NULL.
64 @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
65 @retval EFI_UNSUPPORTED The address range specified by Address, Width,
66 and Count is not valid for this PI system.
71 CpuMemoryServiceRead (
72 IN EFI_CPU_IO_PROTOCOL
*This
,
73 IN EFI_CPU_IO_PROTOCOL_WIDTH Width
,
80 Writes memory-mapped registers.
82 The I/O operations are carried out exactly as requested. The caller is responsible
83 for satisfying any alignment and I/O width restrictions that a PI System on a
84 platform might require. For example on some platforms, width requests of
85 EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
86 be handled by the driver.
88 If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
89 or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
90 each of the Count operations that is performed.
92 If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
93 EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
94 incremented for each of the Count operations that is performed. The read or
95 write operation is performed Count times on the same Address.
97 If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
98 EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
99 incremented for each of the Count operations that is performed. The read or
100 write operation is performed Count times from the first element of Buffer.
102 @param[in] This A pointer to the EFI_CPU_IO_PROTOCOL instance.
103 @param[in] Width Signifies the width of the I/O or Memory operation.
104 @param[in] Address The base address of the I/O operation.
105 @param[in] Count The number of I/O operations to perform. The number of
106 bytes moved is Width size * Count, starting at Address.
107 @param[in] Buffer For read operations, the destination buffer to store the results.
108 For write operations, the source buffer from which to write data.
110 @retval EFI_SUCCESS The data was read from or written to the PI system.
111 @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
112 @retval EFI_INVALID_PARAMETER Buffer is NULL.
113 @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
114 @retval EFI_UNSUPPORTED The address range specified by Address, Width,
115 and Count is not valid for this PI system.
120 CpuMemoryServiceWrite (
121 IN EFI_CPU_IO_PROTOCOL
*This
,
122 IN EFI_CPU_IO_PROTOCOL_WIDTH Width
,
131 The I/O operations are carried out exactly as requested. The caller is responsible
132 for satisfying any alignment and I/O width restrictions that a PI System on a
133 platform might require. For example on some platforms, width requests of
134 EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
135 be handled by the driver.
137 If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
138 or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
139 each of the Count operations that is performed.
141 If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
142 EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
143 incremented for each of the Count operations that is performed. The read or
144 write operation is performed Count times on the same Address.
146 If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
147 EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
148 incremented for each of the Count operations that is performed. The read or
149 write operation is performed Count times from the first element of Buffer.
151 @param[in] This A pointer to the EFI_CPU_IO_PROTOCOL instance.
152 @param[in] Width Signifies the width of the I/O or Memory operation.
153 @param[in] Address The base address of the I/O operation.
154 @param[in] Count The number of I/O operations to perform. The number of
155 bytes moved is Width size * Count, starting at Address.
156 @param[out] Buffer For read operations, the destination buffer to store the results.
157 For write operations, the source buffer from which to write data.
159 @retval EFI_SUCCESS The data was read from or written to the PI system.
160 @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
161 @retval EFI_INVALID_PARAMETER Buffer is NULL.
162 @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
163 @retval EFI_UNSUPPORTED The address range specified by Address, Width,
164 and Count is not valid for this PI system.
170 IN EFI_CPU_IO_PROTOCOL
*This
,
171 IN EFI_CPU_IO_PROTOCOL_WIDTH Width
,
180 The I/O operations are carried out exactly as requested. The caller is responsible
181 for satisfying any alignment and I/O width restrictions that a PI System on a
182 platform might require. For example on some platforms, width requests of
183 EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
184 be handled by the driver.
186 If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
187 or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
188 each of the Count operations that is performed.
190 If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
191 EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
192 incremented for each of the Count operations that is performed. The read or
193 write operation is performed Count times on the same Address.
195 If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
196 EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
197 incremented for each of the Count operations that is performed. The read or
198 write operation is performed Count times from the first element of Buffer.
200 @param[in] This A pointer to the EFI_CPU_IO_PROTOCOL instance.
201 @param[in] Width Signifies the width of the I/O or Memory operation.
202 @param[in] Address The base address of the I/O operation.
203 @param[in] Count The number of I/O operations to perform. The number of
204 bytes moved is Width size * Count, starting at Address.
205 @param[in] Buffer For read operations, the destination buffer to store the results.
206 For write operations, the source buffer from which to write data.
208 @retval EFI_SUCCESS The data was read from or written to the PI system.
209 @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
210 @retval EFI_INVALID_PARAMETER Buffer is NULL.
211 @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
212 @retval EFI_UNSUPPORTED The address range specified by Address, Width,
213 and Count is not valid for this PI system.
219 IN EFI_CPU_IO_PROTOCOL
*This
,
220 IN EFI_CPU_IO_PROTOCOL_WIDTH Width
,