IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIo.h

   1 /** @file
   2   Internal include file of CPU I/O DXE Driver.
   3
   4   Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
   5   SPDX-License-Identifier: BSD-2-Clause-Patent
   6
   7 **/
   8
   9 #ifndef __CPU_IO_DXE_H__
  10 #define __CPU_IO_DXE_H__
  11
  12
  13 #include <PiDxe.h>
  14
  15 #include <Protocol/CpuIo.h>
  16
  17 #include <Library/BaseLib.h>
  18 #include <Library/DebugLib.h>
  19 #include <Library/IoLib.h>
  20 #include <Library/UefiBootServicesTableLib.h>
  21
  22 #define MAX_IO_PORT_ADDRESS   0xFFFF
  23
  24 /**
  25   Reads memory-mapped registers.
  26
  27   The I/O operations are carried out exactly as requested. The caller is responsible
  28   for satisfying any alignment and I/O width restrictions that a PI System on a
  29   platform might require. For example on some platforms, width requests of
  30   EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
  31   be handled by the driver.
  32
  33   If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
  34   or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
  35   each of the Count operations that is performed.
  36
  37   If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
  38   EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
  39   incremented for each of the Count operations that is performed. The read or
  40   write operation is performed Count times on the same Address.
  41
  42   If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
  43   EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
  44   incremented for each of the Count operations that is performed. The read or
  45   write operation is performed Count times from the first element of Buffer.
  46
  47   @param[in]  This     A pointer to the EFI_CPU_IO_PROTOCOL instance.
  48   @param[in]  Width    Signifies the width of the I/O or Memory operation.
  49   @param[in]  Address  The base address of the I/O operation.
  50   @param[in]  Count    The number of I/O operations to perform. The number of
  51                        bytes moved is Width size * Count, starting at Address.
  52   @param[out] Buffer   For read operations, the destination buffer to store the results.
  53                        For write operations, the source buffer from which to write data.
  54
  55   @retval EFI_SUCCESS            The data was read from or written to the PI system.
  56   @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.
  57   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
  58   @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.
  59   @retval EFI_UNSUPPORTED        The address range specified by Address, Width,
  60                                  and Count is not valid for this PI system.
  61
  62 **/
  63 EFI_STATUS
  64 EFIAPI
  65 CpuMemoryServiceRead (
  66   IN  EFI_CPU_IO_PROTOCOL        *This,
  67   IN  EFI_CPU_IO_PROTOCOL_WIDTH  Width,
  68   IN  UINT64                     Address,
  69   IN  UINTN                      Count,
  70   OUT VOID                       *Buffer
  71   );
  72
  73 /**
  74   Writes memory-mapped registers.
  75
  76   The I/O operations are carried out exactly as requested. The caller is responsible
  77   for satisfying any alignment and I/O width restrictions that a PI System on a
  78   platform might require. For example on some platforms, width requests of
  79   EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
  80   be handled by the driver.
  81
  82   If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
  83   or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
  84   each of the Count operations that is performed.
  85
  86   If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
  87   EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
  88   incremented for each of the Count operations that is performed. The read or
  89   write operation is performed Count times on the same Address.
  90
  91   If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
  92   EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
  93   incremented for each of the Count operations that is performed. The read or
  94   write operation is performed Count times from the first element of Buffer.
  95
  96   @param[in]  This     A pointer to the EFI_CPU_IO_PROTOCOL instance.
  97   @param[in]  Width    Signifies the width of the I/O or Memory operation.
  98   @param[in]  Address  The base address of the I/O operation.
  99   @param[in]  Count    The number of I/O operations to perform. The number of
 100                        bytes moved is Width size * Count, starting at Address.
 101   @param[in]  Buffer   For read operations, the destination buffer to store the results.
 102                        For write operations, the source buffer from which to write data.
 103
 104   @retval EFI_SUCCESS            The data was read from or written to the PI system.
 105   @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.
 106   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 107   @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.
 108   @retval EFI_UNSUPPORTED        The address range specified by Address, Width,
 109                                  and Count is not valid for this PI system.
 110
 111 **/
 112 EFI_STATUS
 113 EFIAPI
 114 CpuMemoryServiceWrite (
 115   IN EFI_CPU_IO_PROTOCOL        *This,
 116   IN EFI_CPU_IO_PROTOCOL_WIDTH  Width,
 117   IN UINT64                     Address,
 118   IN UINTN                      Count,
 119   IN VOID                       *Buffer
 120   );
 121
 122 /**
 123   Reads I/O registers.
 124
 125   The I/O operations are carried out exactly as requested. The caller is responsible
 126   for satisfying any alignment and I/O width restrictions that a PI System on a
 127   platform might require. For example on some platforms, width requests of
 128   EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
 129   be handled by the driver.
 130
 131   If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
 132   or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
 133   each of the Count operations that is performed.
 134
 135   If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
 136   EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
 137   incremented for each of the Count operations that is performed. The read or
 138   write operation is performed Count times on the same Address.
 139
 140   If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
 141   EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
 142   incremented for each of the Count operations that is performed. The read or
 143   write operation is performed Count times from the first element of Buffer.
 144
 145   @param[in]  This     A pointer to the EFI_CPU_IO_PROTOCOL instance.
 146   @param[in]  Width    Signifies the width of the I/O or Memory operation.
 147   @param[in]  Address  The base address of the I/O operation.
 148   @param[in]  Count    The number of I/O operations to perform. The number of
 149                        bytes moved is Width size * Count, starting at Address.
 150   @param[out] Buffer   For read operations, the destination buffer to store the results.
 151                        For write operations, the source buffer from which to write data.
 152
 153   @retval EFI_SUCCESS            The data was read from or written to the PI system.
 154   @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.
 155   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 156   @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.
 157   @retval EFI_UNSUPPORTED        The address range specified by Address, Width,
 158                                  and Count is not valid for this PI system.
 159
 160 **/
 161 EFI_STATUS
 162 EFIAPI
 163 CpuIoServiceRead (
 164   IN  EFI_CPU_IO_PROTOCOL        *This,
 165   IN  EFI_CPU_IO_PROTOCOL_WIDTH  Width,
 166   IN  UINT64                     Address,
 167   IN  UINTN                      Count,
 168   OUT VOID                       *Buffer
 169   );
 170
 171 /**
 172   Write I/O registers.
 173
 174   The I/O operations are carried out exactly as requested. The caller is responsible
 175   for satisfying any alignment and I/O width restrictions that a PI System on a
 176   platform might require. For example on some platforms, width requests of
 177   EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
 178   be handled by the driver.
 179
 180   If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
 181   or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
 182   each of the Count operations that is performed.
 183
 184   If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
 185   EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
 186   incremented for each of the Count operations that is performed. The read or
 187   write operation is performed Count times on the same Address.
 188
 189   If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
 190   EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
 191   incremented for each of the Count operations that is performed. The read or
 192   write operation is performed Count times from the first element of Buffer.
 193
 194   @param[in]  This     A pointer to the EFI_CPU_IO_PROTOCOL instance.
 195   @param[in]  Width    Signifies the width of the I/O or Memory operation.
 196   @param[in]  Address  The base address of the I/O operation.
 197   @param[in]  Count    The number of I/O operations to perform. The number of
 198                        bytes moved is Width size * Count, starting at Address.
 199   @param[in]  Buffer   For read operations, the destination buffer to store the results.
 200                        For write operations, the source buffer from which to write data.
 201
 202   @retval EFI_SUCCESS            The data was read from or written to the PI system.
 203   @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.
 204   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 205   @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.
 206   @retval EFI_UNSUPPORTED        The address range specified by Address, Width,
 207                                  and Count is not valid for this PI system.
 208
 209 **/
 210 EFI_STATUS
 211 EFIAPI
 212 CpuIoServiceWrite (
 213   IN EFI_CPU_IO_PROTOCOL        *This,
 214   IN EFI_CPU_IO_PROTOCOL_WIDTH  Width,
 215   IN UINT64                     Address,
 216   IN UINTN                      Count,
 217   IN VOID                       *Buffer
 218   );
 219
 220 #endif