IntelFsp2Pkg/Include/FspGlobalData.h

   1 /** @file
   2
   3   Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>
   4   SPDX-License-Identifier: BSD-2-Clause-Patent
   5
   6 **/
   7
   8 #ifndef _FSP_GLOBAL_DATA_H_
   9 #define _FSP_GLOBAL_DATA_H_
  10
  11 #include <FspEas.h>
  12
  13 #define FSP_IN_API_MODE          0
  14 #define FSP_IN_DISPATCH_MODE     1
  15 #define FSP_GLOBAL_DATA_VERSION  1
  16
  17 #pragma pack(1)
  18
  19 typedef enum {
  20   TempRamInitApiIndex,
  21   FspInitApiIndex,
  22   NotifyPhaseApiIndex,
  23   FspMemoryInitApiIndex,
  24   TempRamExitApiIndex,
  25   FspSiliconInitApiIndex,
  26   FspMultiPhaseSiInitApiIndex,
  27   FspSmmInitApiIndex,
  28   FspApiIndexMax
  29 } FSP_API_INDEX;
  30
  31 typedef struct  {
  32   VOID     *DataPtr;
  33   UINTN    MicrocodeRegionBase;
  34   UINTN    MicrocodeRegionSize;
  35   UINTN    CodeRegionBase;
  36   UINTN    CodeRegionSize;
  37   UINTN    Reserved;
  38 } FSP_PLAT_DATA;
  39
  40 #define FSP_GLOBAL_DATA_SIGNATURE        SIGNATURE_32 ('F', 'S', 'P', 'D')
  41 #define FSP_PERFORMANCE_DATA_SIGNATURE   SIGNATURE_32 ('P', 'E', 'R', 'F')
  42 #define FSP_PERFORMANCE_DATA_TIMER_MASK  0xFFFFFFFFFFFFFF
  43
  44 typedef struct  {
  45   UINT32    Signature;
  46   UINT8     Version;
  47   UINT8     Reserved1[3];
  48   ///
  49   /// Offset 0x08
  50   ///
  51   UINTN     CoreStack;
  52   UINTN     Reserved2;
  53   ///
  54   /// IA32: Offset 0x10; X64: Offset 0x18
  55   ///
  56   UINT32    StatusCode;
  57   UINT8     ApiIdx;
  58   ///
  59   /// 0: FSP in API mode; 1: FSP in DISPATCH mode
  60   ///
  61   UINT8     FspMode;
  62   UINT8     OnSeparateStack;
  63   UINT8     Reserved3;
  64   UINT32    NumberOfPhases;
  65   UINT32    PhasesExecuted;
  66   UINT32    Reserved4[8];
  67   ///
  68   /// IA32: Offset 0x40; X64: Offset 0x48
  69   /// Start of UINTN and pointer section
  70   /// All UINTN and pointer members must be put in this section
  71   /// except CoreStack and Reserved2. In addition, the number of
  72   /// UINTN and pointer members must be even for natural alignment
  73   /// in both IA32 and X64.
  74   ///
  75   FSP_PLAT_DATA      PlatformData;
  76   VOID               *TempRamInitUpdPtr;
  77   VOID               *MemoryInitUpdPtr;
  78   VOID               *SiliconInitUpdPtr;
  79   VOID               *SmmInitUpdPtr;
  80   ///
  81   /// IA32: Offset 0x68; X64: Offset 0x98
  82   /// To store function parameters pointer
  83   /// so it can be retrieved after stack switched.
  84   ///
  85   VOID               *FunctionParameterPtr;
  86   FSP_INFO_HEADER    *FspInfoHeader;
  87   VOID               *UpdDataPtr;
  88   UINTN              Reserved5;
  89   ///
  90   /// End of UINTN and pointer section
  91   ///
  92   UINT8              Reserved6[16];
  93   UINT32             PerfSig;
  94   UINT16             PerfLen;
  95   UINT16             Reserved7;
  96   UINT32             PerfIdx;
  97   UINT64             PerfData[32];
  98 } FSP_GLOBAL_DATA;
  99
 100 #pragma pack()
 101
 102 #endif