IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c

   1 /** @file
   2   Sample to provide TempRamInitParams data.
   3
   4   Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.<BR>
   5   SPDX-License-Identifier: BSD-2-Clause-Patent
   6
   7 **/
   8
   9 #include <Library/PcdLib.h>
  10 #include <FspEas.h>
  11
  12 typedef struct {
  13   UINT32                      MicrocodeRegionBase;
  14   UINT32                      MicrocodeRegionSize;
  15   UINT32                      CodeRegionBase;
  16   UINT32                      CodeRegionSize;
  17 } FSPT_CORE_UPD;
  18
  19 typedef struct {
  20   FSP_UPD_HEADER    FspUpdHeader;
  21   //
  22   // If platform does not support FSP spec 2.2 remove FSPT_ARCH_UPD structure.
  23   //
  24   FSPT_ARCH_UPD     FsptArchUpd;
  25   FSPT_CORE_UPD     FsptCoreUpd;
  26 } FSPT_UPD_CORE_DATA;
  27
  28 GLOBAL_REMOVE_IF_UNREFERENCED CONST FSPT_UPD_CORE_DATA FsptUpdDataPtr = {
  29   {
  30     0x4450555F54505346,
  31     //
  32     // UPD header revision must be equal or greater than 2 when the structure is compliant with FSP spec 2.2.
  33     //
  34     0x02,
  35     { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  36       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  37     }
  38   },
  39   //
  40   // If platform does not support FSP spec 2.2 remove FSPT_ARCH_UPD structure.
  41   //
  42   {
  43     0x01,
  44     {
  45       0x00, 0x00, 0x00
  46     },
  47     0x00000020,
  48     0x00000000,
  49     {
  50       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  51       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  52     }
  53   },
  54   {
  55     FixedPcdGet32 (PcdCpuMicrocodePatchAddress),
  56     FixedPcdGet32 (PcdCpuMicrocodePatchRegionSize),
  57     FixedPcdGet32 (PcdFlashCodeCacheAddress),
  58     FixedPcdGet32 (PcdFlashCodeCacheSize),
  59   }
  60 };
  61