1 ;------------------------------------------------------------------------------
3 ; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
4 ; SPDX-License-Identifier: BSD-2-Clause-Patent
8 ;------------------------------------------------------------------------------
14 ; Float control word initial value:
15 ; all exceptions masked, double-precision, round-to-nearest
17 mFpuControlWord DW 027Fh
19 ; Multimedia-extensions control word:
20 ; all exceptions masked, round-to-nearest, flush to zero for masked underflow
22 mMmxControlWord DD 01F80h
28 ; Initializes floating point units for requirement of UEFI specification.
30 ; This function initializes floating-point control word to 0x027F (all exceptions
31 ; masked,double-precision, round-to-nearest) and multimedia-extensions control word
32 ; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
33 ; for masked underflow).
35 InitializeFloatingPointUnits PROC PUBLIC
40 ; Initialize floating point units
46 ; Use CpuId instructuion (CPUID.01H:EDX.SSE[bit 25] = 1) to test
47 ; whether the processor supports SSE instruction.
55 ; Set OSFXSR bit 9 in CR4
62 ; The processor should support SSE instruction and we can use
65 ldmxcsr mMmxControlWord
71 InitializeFloatingPointUnits ENDP