2 Intel FSP Info Header definition from Intel Firmware Support Package External
3 Architecture Specification v1.1, April 2015, revision 001.
5 Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php.
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
16 #ifndef _FSP_INFO_HEADER_H_
17 #define _FSP_INFO_HEADER_H_
19 #define FSP_HEADER_REVISION_1 1
20 #define FSP_HEADER_REVISION_2 2
22 #define FSPE_HEADER_REVISION_1 1
23 #define FSPP_HEADER_REVISION_1 1
26 /// Fixed FSP header offset in the FSP image
28 #define FSP_INFO_HEADER_OFF 0x94
30 #define OFFSET_IN_FSP_INFO_HEADER(x) (UINT32)&((FSP_INFO_HEADER *)(UINTN)0)->x
32 #define FSP_INFO_HEADER_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'H')
38 /// Byte 0x00: Signature ('FSPH') for the FSP Information Header
42 /// Byte 0x04: Length of the FSP Information Header
46 /// Byte 0x08: Reserved
50 /// Byte 0x0B: Revision of the FSP Information Header
54 /// Byte 0x0C: Revision of the FSP binary
60 /// Byte 0x10: Signature string that will help match the FSP Binary to a supported
61 /// hardware configuration.
65 /// Byte 0x18: Size of the entire FSP binary
69 /// Byte 0x1C: FSP binary preferred base address
75 /// Byte 0x20: Attribute for the FSP binary
77 UINT32 ImageAttribute
;
79 /// Byte 0x24: Offset of the FSP configuration region
81 UINT32 CfgRegionOffset
;
83 /// Byte 0x28: Size of the FSP configuration region
87 /// Byte 0x2C: Number of API entries this FSP supports
93 /// Byte 0x30: The offset for the API to setup a temporary stack till the memory
96 UINT32 TempRamInitEntryOffset
;
98 /// Byte 0x34: The offset for the API to initialize the CPU and the chipset (SOC)
100 UINT32 FspInitEntryOffset
;
102 /// Byte 0x38: The offset for the API to inform the FSP about the different stages
103 /// in the boot process
105 UINT32 NotifyPhaseEntryOffset
;
108 /// Below fields are added in FSP Revision 2
112 /// Byte 0x3C: The offset for the API to initialize the memory
114 UINT32 FspMemoryInitEntryOffset
;
116 /// Byte 0x40: The offset for the API to tear down temporary RAM
118 UINT32 TempRamExitEntryOffset
;
120 /// Byte 0x44: The offset for the API to initialize the CPU and chipset
122 UINT32 FspSiliconInitEntryOffset
;
127 /// Below structure is added in FSP version 2
129 #define FSP_INFO_EXTENDED_HEADER_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'E')
133 /// Byte 0x00: Signature ('FSPE') for the FSP Extended Information Header
137 /// Byte 0x04: Length of the table in bytes, including all additional FSP producer defined data.
141 /// Byte 0x08: FSP producer defined revision of the table.
145 /// Byte 0x09: Reserved for future use.
149 /// Byte 0x0A: FSP producer identification string
151 CHAR8 FspProducerId
[6];
153 /// Byte 0x10: FSP producer implementation revision number. Larger numbers are assumed to be newer revisions.
155 UINT32 FspProducerRevision
;
157 /// Byte 0x14: Size of the FSP producer defined data (n) in bytes.
159 UINT32 FspProducerDataSize
;
161 /// Byte 0x18: FSP producer defined data of size (n) defined by FspProducerDataSize.
164 } FSP_INFO_EXTENDED_HEADER
;
167 // A generic table search algorithm for additional tables can be implemented with a
168 // signature search algorithm until a terminator signature 'FSPP' is found.
170 #define FSP_FSPP_SIGNATURE SIGNATURE_32 ('F', 'S', 'P', 'P')