3 # Provides drivers and definitions to support fsp in EDKII bios.
5 # Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
6 # This program and the accompanying materials are licensed and made available under
7 # the terms and conditions of the BSD License that accompanies this distribution.
8 # The full text of the license may be found at
9 # http://opensource.org/licenses/bsd-license.php.
11 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 DEC_SPECIFICATION = 0x00010005
18 PACKAGE_NAME = IntelFspWrapperPkg
19 PACKAGE_GUID = 99101BB6-6DE1-4537-85A3-FD6B594F7468
29 # GUID defined in package
31 gFspWrapperTokenSpaceGuid = {0x2bc1c74a, 0x122f, 0x40b2, { 0xb2, 0x23, 0x8, 0x2b, 0x74, 0x65, 0x22, 0x5d } }
34 gFspInitDonePpiGuid = { 0xf5ef05e4, 0xd538, 0x4774, { 0x8f, 0x1b, 0xe9, 0x77, 0x30, 0x11, 0xe0, 0x38 } }
35 gTopOfTemporaryRamPpiGuid = { 0x2f3962b2, 0x57c5, 0x44ec, { 0x9e, 0xfc, 0xa6, 0x9f, 0xd3, 0x02, 0x03, 0x2b } }
39 ################################################################################
41 # PCD Declarations section - list of all PCDs Declared by this Package
42 # Only this package should be providing the
43 # declaration, other packages should not.
45 ################################################################################
46 [PcdsFixedAtBuild, PcdsPatchableInModule]
47 ## Provides the memory mapped base address of the BIOS CodeCache Flash Device.
48 gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress|0xFFE00000|UINT32|0x10000001
49 ## Provides the size of the BIOS Flash Device.
50 gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize|0x00200000|UINT32|0x10000002
52 ## Indicates the base address of the FSP binary.
53 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|0xFFF80000|UINT32|0x10000003
54 ## Provides the size of the FSP binary.
55 gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize|0x00048000|UINT32|0x10000004
57 ## Indicates the base address of the first Microcode Patch in the Microcode Region
58 gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT64|0x10000005
59 gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x0|UINT64|0x10000006
60 ## Indicates the offset of the Cpu Microcode.
61 gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset|0x90|UINT32|0x10000007
64 # Maximum number of Ppi is provided by SecCore.
66 gFspWrapperTokenSpaceGuid.PcdSecCoreMaxPpiSupported|0x6|UINT32|0x20000001
68 # This is MAX UPD region size
69 gFspWrapperTokenSpaceGuid.PcdMaxUpdRegionSize|0x200|UINT32|0x30000001
71 ## Stack size in the temporary RAM.
72 # 0 means half of TemporaryRamSize.
73 gFspWrapperTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0|UINT32|0x40000001
75 # This is temporary DRAM base and size for StackTop in FspInit
76 gFspWrapperTokenSpaceGuid.PcdTemporaryRamBase|0x00080000|UINT32|0x40000002
77 gFspWrapperTokenSpaceGuid.PcdTemporaryRamSize|0x00010000|UINT32|0x40000003
79 ## Indicate the PEI memory size platform want to report
80 gFspWrapperTokenSpaceGuid.PcdPeiMinMemSize|0x1800000|UINT32|0x40000004
81 ## Indicate the PEI memory size platform want to report
82 gFspWrapperTokenSpaceGuid.PcdPeiRecoveryMinMemSize|0x3000000|UINT32|0x40000005