2 Header file for AHCI mode of ATA host controller.
4 Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15 #include "AtaAtapiPassThru.h"
18 read a one-byte data from a IDE port.
20 @param PciIo The PCI IO protocol instance
21 @param Port The IDE Port number
23 @return the one-byte data read from IDE port
28 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
34 ASSERT (PciIo
!= NULL
);
38 // perform 1-byte data read from register
43 EFI_PCI_IO_PASS_THROUGH_BAR
,
52 write a 1-byte data to a specific IDE port.
54 @param PciIo The PCI IO protocol instance
55 @param Port The IDE port to be writen
56 @param Data The data to write to the port
61 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
66 ASSERT (PciIo
!= NULL
);
69 // perform 1-byte data write to register
74 EFI_PCI_IO_PASS_THROUGH_BAR
,
82 write a 1-word data to a specific IDE port.
84 @param PciIo PCI IO protocol instance
85 @param Port The IDE port to be writen
86 @param Data The data to write to the port
91 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
96 ASSERT (PciIo
!= NULL
);
99 // perform 1-word data write to register
104 EFI_PCI_IO_PASS_THROUGH_BAR
,
112 write a 2-word data to a specific IDE port.
114 @param PciIo PCI IO protocol instance
115 @param Port The IDE port to be writen
116 @param Data The data to write to the port
121 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
126 ASSERT (PciIo
!= NULL
);
129 // perform 2-word data write to register
134 EFI_PCI_IO_PASS_THROUGH_BAR
,
142 Write multiple words of data to the IDE data port.
143 Call the IO abstraction once to do the complete read,
144 not one word at a time
146 @param PciIo Pointer to the EFI_PCI_IO instance
147 @param Port IO port to read
148 @param Count No. of UINT16's to read
149 @param Buffer Pointer to the data buffer for read
154 IdeWritePortWMultiple (
155 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
161 ASSERT (PciIo
!= NULL
);
162 ASSERT (Buffer
!= NULL
);
165 // perform UINT16 data write to the FIFO
169 EfiPciIoWidthFifoUint16
,
170 EFI_PCI_IO_PASS_THROUGH_BAR
,
179 Reads multiple words of data from the IDE data port.
180 Call the IO abstraction once to do the complete read,
181 not one word at a time
183 @param PciIo Pointer to the EFI_PCI_IO instance
184 @param Port IO port to read
185 @param Count Number of UINT16's to read
186 @param Buffer Pointer to the data buffer for read
191 IdeReadPortWMultiple (
192 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
198 ASSERT (PciIo
!= NULL
);
199 ASSERT (Buffer
!= NULL
);
202 // Perform UINT16 data read from FIFO
206 EfiPciIoWidthFifoUint16
,
207 EFI_PCI_IO_PASS_THROUGH_BAR
,
216 This function is used to analyze the Status Register and print out
217 some debug information and if there is ERR bit set in the Status
218 Register, the Error Register's value is also be parsed and print out.
220 @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure.
221 @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure.
222 @param AtaStatusBlock A pointer to EFI_ATA_STATUS_BLOCK data structure.
227 DumpAllIdeRegisters (
228 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
229 IN EFI_IDE_REGISTERS
*IdeRegisters
,
230 IN OUT EFI_ATA_STATUS_BLOCK
*AtaStatusBlock
233 EFI_ATA_STATUS_BLOCK StatusBlock
;
235 ASSERT (PciIo
!= NULL
);
236 ASSERT (IdeRegisters
!= NULL
);
238 ZeroMem (&StatusBlock
, sizeof (EFI_ATA_STATUS_BLOCK
));
240 StatusBlock
.AtaStatus
= IdeReadPortB (PciIo
, IdeRegisters
->CmdOrStatus
);
241 StatusBlock
.AtaError
= IdeReadPortB (PciIo
, IdeRegisters
->ErrOrFeature
);
242 StatusBlock
.AtaSectorCount
= IdeReadPortB (PciIo
, IdeRegisters
->SectorCount
);
243 StatusBlock
.AtaSectorCountExp
= IdeReadPortB (PciIo
, IdeRegisters
->SectorCount
);
244 StatusBlock
.AtaSectorNumber
= IdeReadPortB (PciIo
, IdeRegisters
->SectorNumber
);
245 StatusBlock
.AtaSectorNumberExp
= IdeReadPortB (PciIo
, IdeRegisters
->SectorNumber
);
246 StatusBlock
.AtaCylinderLow
= IdeReadPortB (PciIo
, IdeRegisters
->CylinderLsb
);
247 StatusBlock
.AtaCylinderLowExp
= IdeReadPortB (PciIo
, IdeRegisters
->CylinderLsb
);
248 StatusBlock
.AtaCylinderHigh
= IdeReadPortB (PciIo
, IdeRegisters
->CylinderMsb
);
249 StatusBlock
.AtaCylinderHighExp
= IdeReadPortB (PciIo
, IdeRegisters
->CylinderMsb
);
250 StatusBlock
.AtaDeviceHead
= IdeReadPortB (PciIo
, IdeRegisters
->Head
);
252 if (AtaStatusBlock
!= NULL
) {
254 // Dump the content of all ATA registers.
256 CopyMem (AtaStatusBlock
, &StatusBlock
, sizeof (EFI_ATA_STATUS_BLOCK
));
260 if ((StatusBlock
.AtaStatus
& ATA_STSREG_DWF
) != 0) {
261 DEBUG ((EFI_D_ERROR
, "CheckRegisterStatus()-- %02x : Error : Write Fault\n", StatusBlock
.AtaStatus
));
264 if ((StatusBlock
.AtaStatus
& ATA_STSREG_CORR
) != 0) {
265 DEBUG ((EFI_D_ERROR
, "CheckRegisterStatus()-- %02x : Error : Corrected Data\n", StatusBlock
.AtaStatus
));
268 if ((StatusBlock
.AtaStatus
& ATA_STSREG_ERR
) != 0) {
269 if ((StatusBlock
.AtaError
& ATA_ERRREG_BBK
) != 0) {
270 DEBUG ((EFI_D_ERROR
, "CheckRegisterStatus()-- %02x : Error : Bad Block Detected\n", StatusBlock
.AtaError
));
273 if ((StatusBlock
.AtaError
& ATA_ERRREG_UNC
) != 0) {
274 DEBUG ((EFI_D_ERROR
, "CheckRegisterStatus()-- %02x : Error : Uncorrectable Data\n", StatusBlock
.AtaError
));
277 if ((StatusBlock
.AtaError
& ATA_ERRREG_MC
) != 0) {
278 DEBUG ((EFI_D_ERROR
, "CheckRegisterStatus()-- %02x : Error : Media Change\n", StatusBlock
.AtaError
));
281 if ((StatusBlock
.AtaError
& ATA_ERRREG_ABRT
) != 0) {
282 DEBUG ((EFI_D_ERROR
, "CheckRegisterStatus()-- %02x : Error : Abort\n", StatusBlock
.AtaError
));
285 if ((StatusBlock
.AtaError
& ATA_ERRREG_TK0NF
) != 0) {
286 DEBUG ((EFI_D_ERROR
, "CheckRegisterStatus()-- %02x : Error : Track 0 Not Found\n", StatusBlock
.AtaError
));
289 if ((StatusBlock
.AtaError
& ATA_ERRREG_AMNF
) != 0) {
290 DEBUG ((EFI_D_ERROR
, "CheckRegisterStatus()-- %02x : Error : Address Mark Not Found\n", StatusBlock
.AtaError
));
297 This function is used to analyze the Status Register and print out
298 some debug information and if there is ERR bit set in the Status
299 Register, the Error Register's value is also be parsed and print out.
301 @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure.
302 @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure.
304 @retval EFI_SUCCESS No err information in the Status Register.
305 @retval EFI_DEVICE_ERROR Any err information in the Status Register.
310 CheckStatusRegister (
311 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
312 IN EFI_IDE_REGISTERS
*IdeRegisters
316 UINT8 StatusRegister
;
318 ASSERT (PciIo
!= NULL
);
319 ASSERT (IdeRegisters
!= NULL
);
321 StatusRegister
= IdeReadPortB (PciIo
, IdeRegisters
->CmdOrStatus
);
323 if ((StatusRegister
& (ATA_STSREG_ERR
| ATA_STSREG_DWF
| ATA_STSREG_CORR
)) == 0) {
324 Status
= EFI_SUCCESS
;
326 Status
= EFI_DEVICE_ERROR
;
333 This function is used to poll for the DRQ bit clear in the Status
334 Register. DRQ is cleared when the device is finished transferring data.
335 So this function is called after data transfer is finished.
337 @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure.
338 @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure.
339 @param Timeout The time to complete the command.
341 @retval EFI_SUCCESS DRQ bit clear within the time out.
343 @retval EFI_TIMEOUT DRQ bit not clear within the time out.
346 Read Status Register will clear interrupt status.
352 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
353 IN EFI_IDE_REGISTERS
*IdeRegisters
,
358 UINT8 StatusRegister
;
361 ASSERT (PciIo
!= NULL
);
362 ASSERT (IdeRegisters
!= NULL
);
364 Delay
= (UINT32
) (DivU64x32(Timeout
, 1000) + 1);
366 StatusRegister
= IdeReadPortB (PciIo
, IdeRegisters
->CmdOrStatus
);
369 // wait for BSY == 0 and DRQ == 0
371 if ((StatusRegister
& (ATA_STSREG_DRQ
| ATA_STSREG_BSY
)) == 0) {
375 if ((StatusRegister
& (ATA_STSREG_BSY
| ATA_STSREG_ERR
)) == ATA_STSREG_ERR
) {
376 ErrorRegister
= IdeReadPortB (PciIo
, IdeRegisters
->ErrOrFeature
);
378 if ((ErrorRegister
& ATA_ERRREG_ABRT
) == ATA_ERRREG_ABRT
) {
384 // Stall for 100 microseconds.
386 MicroSecondDelay (100);
399 This function is used to poll for the DRQ bit clear in the Alternate
400 Status Register. DRQ is cleared when the device is finished
401 transferring data. So this function is called after data transfer
404 @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure.
405 @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure.
406 @param Timeout The time to complete the command.
408 @retval EFI_SUCCESS DRQ bit clear within the time out.
410 @retval EFI_TIMEOUT DRQ bit not clear within the time out.
411 @note Read Alternate Status Register will not clear interrupt status.
417 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
418 IN EFI_IDE_REGISTERS
*IdeRegisters
,
426 ASSERT (PciIo
!= NULL
);
427 ASSERT (IdeRegisters
!= NULL
);
429 Delay
= (UINT32
) (DivU64x32(Timeout
, 1000) + 1);
431 AltRegister
= IdeReadPortB (PciIo
, IdeRegisters
->AltOrDev
);
434 // wait for BSY == 0 and DRQ == 0
436 if ((AltRegister
& (ATA_STSREG_DRQ
| ATA_STSREG_BSY
)) == 0) {
440 if ((AltRegister
& (ATA_STSREG_BSY
| ATA_STSREG_ERR
)) == ATA_STSREG_ERR
) {
441 ErrorRegister
= IdeReadPortB (PciIo
, IdeRegisters
->ErrOrFeature
);
443 if ((ErrorRegister
& ATA_ERRREG_ABRT
) == ATA_ERRREG_ABRT
) {
449 // Stall for 100 microseconds.
451 MicroSecondDelay (100);
465 This function is used to poll for the DRQ bit set in the
467 DRQ is set when the device is ready to transfer data. So this function
468 is called after the command is sent to the device and before required
471 @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure.
472 @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure.
473 @param Timeout The time to complete the command.
475 @retval EFI_SUCCESS DRQ bit set within the time out.
476 @retval EFI_TIMEOUT DRQ bit not set within the time out.
477 @retval EFI_ABORTED DRQ bit not set caused by the command abort.
479 @note Read Status Register will clear interrupt status.
485 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
486 IN EFI_IDE_REGISTERS
*IdeRegisters
,
491 UINT8 StatusRegister
;
494 ASSERT (PciIo
!= NULL
);
495 ASSERT (IdeRegisters
!= NULL
);
497 Delay
= (UINT32
) (DivU64x32(Timeout
, 1000) + 1);
500 // read Status Register will clear interrupt
502 StatusRegister
= IdeReadPortB (PciIo
, IdeRegisters
->CmdOrStatus
);
507 if ((StatusRegister
& (ATA_STSREG_BSY
| ATA_STSREG_DRQ
)) == ATA_STSREG_DRQ
) {
511 if ((StatusRegister
& (ATA_STSREG_BSY
| ATA_STSREG_ERR
)) == ATA_STSREG_ERR
) {
512 ErrorRegister
= IdeReadPortB (PciIo
, IdeRegisters
->ErrOrFeature
);
514 if ((ErrorRegister
& ATA_ERRREG_ABRT
) == ATA_ERRREG_ABRT
) {
520 // Stall for 100 microseconds.
522 MicroSecondDelay (100);
534 This function is used to poll for the DRQ bit set in the Alternate Status Register.
535 DRQ is set when the device is ready to transfer data. So this function is called after
536 the command is sent to the device and before required data is transferred.
538 @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure.
539 @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure.
540 @param Timeout The time to complete the command.
542 @retval EFI_SUCCESS DRQ bit set within the time out.
543 @retval EFI_TIMEOUT DRQ bit not set within the time out.
544 @retval EFI_ABORTED DRQ bit not set caused by the command abort.
545 @note Read Alternate Status Register will not clear interrupt status.
551 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
552 IN EFI_IDE_REGISTERS
*IdeRegisters
,
560 ASSERT (PciIo
!= NULL
);
561 ASSERT (IdeRegisters
!= NULL
);
563 Delay
= (UINT32
) (DivU64x32(Timeout
, 1000) + 1);
567 // Read Alternate Status Register will not clear interrupt status
569 AltRegister
= IdeReadPortB (PciIo
, IdeRegisters
->AltOrDev
);
571 // BSY == 0 , DRQ == 1
573 if ((AltRegister
& (ATA_STSREG_BSY
| ATA_STSREG_DRQ
)) == ATA_STSREG_DRQ
) {
577 if ((AltRegister
& (ATA_STSREG_BSY
| ATA_STSREG_ERR
)) == ATA_STSREG_ERR
) {
578 ErrorRegister
= IdeReadPortB (PciIo
, IdeRegisters
->ErrOrFeature
);
580 if ((ErrorRegister
& ATA_ERRREG_ABRT
) == ATA_ERRREG_ABRT
) {
586 // Stall for 100 microseconds.
588 MicroSecondDelay (100);
601 This function is used to poll for the DRDY bit set in the Status Register. DRDY
602 bit is set when the device is ready to accept command. Most ATA commands must be
603 sent after DRDY set except the ATAPI Packet Command.
605 @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure.
606 @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure.
607 @param Timeout The time to complete the command.
609 @retval EFI_SUCCESS DRDY bit set within the time out.
610 @retval EFI_TIMEOUT DRDY bit not set within the time out.
612 @note Read Status Register will clear interrupt status.
617 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
618 IN EFI_IDE_REGISTERS
*IdeRegisters
,
623 UINT8 StatusRegister
;
626 ASSERT (PciIo
!= NULL
);
627 ASSERT (IdeRegisters
!= NULL
);
629 Delay
= (UINT32
) (DivU64x32(Timeout
, 1000) + 1);
631 StatusRegister
= IdeReadPortB (PciIo
, IdeRegisters
->CmdOrStatus
);
633 // BSY == 0 , DRDY == 1
635 if ((StatusRegister
& (ATA_STSREG_DRDY
| ATA_STSREG_BSY
)) == ATA_STSREG_DRDY
) {
639 if ((StatusRegister
& (ATA_STSREG_BSY
| ATA_STSREG_ERR
)) == ATA_STSREG_ERR
) {
640 ErrorRegister
= IdeReadPortB (PciIo
, IdeRegisters
->ErrOrFeature
);
642 if ((ErrorRegister
& ATA_ERRREG_ABRT
) == ATA_ERRREG_ABRT
) {
648 // Stall for 100 microseconds.
650 MicroSecondDelay (100);
663 This function is used to poll for the DRDY bit set in the Alternate Status Register.
664 DRDY bit is set when the device is ready to accept command. Most ATA commands must
665 be sent after DRDY set except the ATAPI Packet Command.
667 @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure.
668 @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure.
669 @param Timeout The time to complete the command.
671 @retval EFI_SUCCESS DRDY bit set within the time out.
672 @retval EFI_TIMEOUT DRDY bit not set within the time out.
674 @note Read Alternate Status Register will clear interrupt status.
680 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
681 IN EFI_IDE_REGISTERS
*IdeRegisters
,
689 ASSERT (PciIo
!= NULL
);
690 ASSERT (IdeRegisters
!= NULL
);
692 Delay
= (UINT32
) (DivU64x32(Timeout
, 1000) + 1);
694 AltRegister
= IdeReadPortB (PciIo
, IdeRegisters
->AltOrDev
);
696 // BSY == 0 , DRDY == 1
698 if ((AltRegister
& (ATA_STSREG_DRDY
| ATA_STSREG_BSY
)) == ATA_STSREG_DRDY
) {
702 if ((AltRegister
& (ATA_STSREG_BSY
| ATA_STSREG_ERR
)) == ATA_STSREG_ERR
) {
703 ErrorRegister
= IdeReadPortB (PciIo
, IdeRegisters
->ErrOrFeature
);
705 if ((ErrorRegister
& ATA_ERRREG_ABRT
) == ATA_ERRREG_ABRT
) {
711 // Stall for 100 microseconds.
713 MicroSecondDelay (100);
726 This function is used to poll for the BSY bit clear in the Status Register. BSY
727 is clear when the device is not busy. Every command must be sent after device is not busy.
729 @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure.
730 @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure.
731 @param Timeout The time to complete the command.
733 @retval EFI_SUCCESS BSY bit clear within the time out.
734 @retval EFI_TIMEOUT BSY bit not clear within the time out.
736 @note Read Status Register will clear interrupt status.
741 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
742 IN EFI_IDE_REGISTERS
*IdeRegisters
,
747 UINT8 StatusRegister
;
749 ASSERT (PciIo
!= NULL
);
750 ASSERT (IdeRegisters
!= NULL
);
752 Delay
= (UINT32
) (DivU64x32(Timeout
, 1000) + 1);
754 StatusRegister
= IdeReadPortB (PciIo
, IdeRegisters
->CmdOrStatus
);
756 if ((StatusRegister
& ATA_STSREG_BSY
) == 0x00) {
761 // Stall for 100 microseconds.
763 MicroSecondDelay (100);
777 This function is used to poll for the BSY bit clear in the Status Register. BSY
778 is clear when the device is not busy. Every command must be sent after device is not busy.
780 @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure.
781 @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure.
782 @param Timeout The time to complete the command.
784 @retval EFI_SUCCESS BSY bit clear within the time out.
785 @retval EFI_TIMEOUT BSY bit not clear within the time out.
787 @note Read Status Register will clear interrupt status.
792 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
793 IN EFI_IDE_REGISTERS
*IdeRegisters
,
798 UINT8 AltStatusRegister
;
800 ASSERT (PciIo
!= NULL
);
801 ASSERT (IdeRegisters
!= NULL
);
803 Delay
= (UINT32
) (DivU64x32(Timeout
, 1000) + 1);
805 AltStatusRegister
= IdeReadPortB (PciIo
, IdeRegisters
->AltOrDev
);
807 if ((AltStatusRegister
& ATA_STSREG_BSY
) == 0x00) {
812 // Stall for 100 microseconds.
814 MicroSecondDelay (100);
828 Get IDE i/o port registers' base addresses by mode.
830 In 'Compatibility' mode, use fixed addresses.
831 In Native-PCI mode, get base addresses from BARs in the PCI IDE controller's
834 The steps to get IDE i/o port registers' base addresses for each channel
837 1. Examine the Programming Interface byte of the Class Code fields in PCI IDE
838 controller's Configuration Space to determine the operating mode.
840 2. a) In 'Compatibility' mode, use fixed addresses shown in the Table 1 below.
841 ___________________________________________
842 | | Command Block | Control Block |
843 | Channel | Registers | Registers |
844 |___________|_______________|_______________|
845 | Primary | 1F0h - 1F7h | 3F6h - 3F7h |
846 |___________|_______________|_______________|
847 | Secondary | 170h - 177h | 376h - 377h |
848 |___________|_______________|_______________|
850 Table 1. Compatibility resource mappings
852 b) In Native-PCI mode, IDE registers are mapped into IO space using the BARs
853 in IDE controller's PCI Configuration Space, shown in the Table 2 below.
854 ___________________________________________________
855 | | Command Block | Control Block |
856 | Channel | Registers | Registers |
857 |___________|___________________|___________________|
858 | Primary | BAR at offset 0x10| BAR at offset 0x14|
859 |___________|___________________|___________________|
860 | Secondary | BAR at offset 0x18| BAR at offset 0x1C|
861 |___________|___________________|___________________|
863 Table 2. BARs for Register Mapping
865 @param[in] PciIo Pointer to the EFI_PCI_IO_PROTOCOL instance
866 @param[in, out] IdeRegisters Pointer to EFI_IDE_REGISTERS which is used to
867 store the IDE i/o port registers' base addresses
869 @retval EFI_UNSUPPORTED Return this value when the BARs is not IO type
870 @retval EFI_SUCCESS Get the Base address successfully
871 @retval Other Read the pci configureation data error
876 GetIdeRegisterIoAddr (
877 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
878 IN OUT EFI_IDE_REGISTERS
*IdeRegisters
883 UINT16 CommandBlockBaseAddr
;
884 UINT16 ControlBlockBaseAddr
;
885 UINT16 BusMasterBaseAddr
;
887 if ((PciIo
== NULL
) || (IdeRegisters
== NULL
)) {
888 return EFI_INVALID_PARAMETER
;
891 Status
= PciIo
->Pci
.Read (
899 if (EFI_ERROR (Status
)) {
903 BusMasterBaseAddr
= (UINT16
) ((PciData
.Device
.Bar
[4] & 0x0000fff0));
905 if ((PciData
.Hdr
.ClassCode
[0] & IDE_PRIMARY_OPERATING_MODE
) == 0) {
906 CommandBlockBaseAddr
= 0x1f0;
907 ControlBlockBaseAddr
= 0x3f6;
910 // The BARs should be of IO type
912 if ((PciData
.Device
.Bar
[0] & BIT0
) == 0 ||
913 (PciData
.Device
.Bar
[1] & BIT0
) == 0) {
914 return EFI_UNSUPPORTED
;
917 CommandBlockBaseAddr
= (UINT16
) (PciData
.Device
.Bar
[0] & 0x0000fff8);
918 ControlBlockBaseAddr
= (UINT16
) ((PciData
.Device
.Bar
[1] & 0x0000fffc) + 2);
922 // Calculate IDE primary channel I/O register base address.
924 IdeRegisters
[EfiIdePrimary
].Data
= CommandBlockBaseAddr
;
925 IdeRegisters
[EfiIdePrimary
].ErrOrFeature
= (UINT16
) (CommandBlockBaseAddr
+ 0x01);
926 IdeRegisters
[EfiIdePrimary
].SectorCount
= (UINT16
) (CommandBlockBaseAddr
+ 0x02);
927 IdeRegisters
[EfiIdePrimary
].SectorNumber
= (UINT16
) (CommandBlockBaseAddr
+ 0x03);
928 IdeRegisters
[EfiIdePrimary
].CylinderLsb
= (UINT16
) (CommandBlockBaseAddr
+ 0x04);
929 IdeRegisters
[EfiIdePrimary
].CylinderMsb
= (UINT16
) (CommandBlockBaseAddr
+ 0x05);
930 IdeRegisters
[EfiIdePrimary
].Head
= (UINT16
) (CommandBlockBaseAddr
+ 0x06);
931 IdeRegisters
[EfiIdePrimary
].CmdOrStatus
= (UINT16
) (CommandBlockBaseAddr
+ 0x07);
932 IdeRegisters
[EfiIdePrimary
].AltOrDev
= ControlBlockBaseAddr
;
933 IdeRegisters
[EfiIdePrimary
].BusMasterBaseAddr
= BusMasterBaseAddr
;
935 if ((PciData
.Hdr
.ClassCode
[0] & IDE_SECONDARY_OPERATING_MODE
) == 0) {
936 CommandBlockBaseAddr
= 0x170;
937 ControlBlockBaseAddr
= 0x376;
940 // The BARs should be of IO type
942 if ((PciData
.Device
.Bar
[2] & BIT0
) == 0 ||
943 (PciData
.Device
.Bar
[3] & BIT0
) == 0) {
944 return EFI_UNSUPPORTED
;
947 CommandBlockBaseAddr
= (UINT16
) (PciData
.Device
.Bar
[2] & 0x0000fff8);
948 ControlBlockBaseAddr
= (UINT16
) ((PciData
.Device
.Bar
[3] & 0x0000fffc) + 2);
952 // Calculate IDE secondary channel I/O register base address.
954 IdeRegisters
[EfiIdeSecondary
].Data
= CommandBlockBaseAddr
;
955 IdeRegisters
[EfiIdeSecondary
].ErrOrFeature
= (UINT16
) (CommandBlockBaseAddr
+ 0x01);
956 IdeRegisters
[EfiIdeSecondary
].SectorCount
= (UINT16
) (CommandBlockBaseAddr
+ 0x02);
957 IdeRegisters
[EfiIdeSecondary
].SectorNumber
= (UINT16
) (CommandBlockBaseAddr
+ 0x03);
958 IdeRegisters
[EfiIdeSecondary
].CylinderLsb
= (UINT16
) (CommandBlockBaseAddr
+ 0x04);
959 IdeRegisters
[EfiIdeSecondary
].CylinderMsb
= (UINT16
) (CommandBlockBaseAddr
+ 0x05);
960 IdeRegisters
[EfiIdeSecondary
].Head
= (UINT16
) (CommandBlockBaseAddr
+ 0x06);
961 IdeRegisters
[EfiIdeSecondary
].CmdOrStatus
= (UINT16
) (CommandBlockBaseAddr
+ 0x07);
962 IdeRegisters
[EfiIdeSecondary
].AltOrDev
= ControlBlockBaseAddr
;
963 IdeRegisters
[EfiIdeSecondary
].BusMasterBaseAddr
= (UINT16
) (BusMasterBaseAddr
+ 0x8);
969 This function is used to implement the Soft Reset on the specified device. But,
970 the ATA Soft Reset mechanism is so strong a reset method that it will force
971 resetting on both devices connected to the same cable.
973 It is called by IdeBlkIoReset(), a interface function of Block
976 This function can also be used by the ATAPI device to perform reset when
977 ATAPI Reset command is failed.
979 @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure.
980 @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure.
981 @param Timeout The time to complete the command.
983 @retval EFI_SUCCESS Soft reset completes successfully.
984 @retval EFI_DEVICE_ERROR Any step during the reset process is failed.
986 @note The registers initial values after ATA soft reset are different
987 to the ATA device and ATAPI device.
992 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
993 IN EFI_IDE_REGISTERS
*IdeRegisters
,
1001 // disable Interrupt and set SRST bit to initiate soft reset
1003 DeviceControl
= ATA_CTLREG_SRST
| ATA_CTLREG_IEN_L
;
1005 IdeWritePortB (PciIo
, IdeRegisters
->AltOrDev
, DeviceControl
);
1008 // SRST should assert for at least 5 us, we use 10 us for
1009 // better compatibility
1011 MicroSecondDelay (10);
1014 // Enable interrupt to support UDMA, and clear SRST bit
1017 IdeWritePortB (PciIo
, IdeRegisters
->AltOrDev
, DeviceControl
);
1020 // Wait for at least 10 ms to check BSY status, we use 10 ms
1021 // for better compatibility
1023 MicroSecondDelay (10000);
1026 // slave device needs at most 31ms to clear BSY
1028 if (WaitForBSYClear (PciIo
, IdeRegisters
, Timeout
) == EFI_TIMEOUT
) {
1029 return EFI_DEVICE_ERROR
;
1036 Send ATA Ext command into device with NON_DATA protocol.
1038 @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure.
1039 @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure.
1040 @param AtaCommandBlock A pointer to EFI_ATA_COMMAND_BLOCK data structure.
1041 @param Timeout The time to complete the command.
1043 @retval EFI_SUCCESS Reading succeed
1044 @retval EFI_DEVICE_ERROR Error executing commands on this device.
1050 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
1051 IN EFI_IDE_REGISTERS
*IdeRegisters
,
1052 IN EFI_ATA_COMMAND_BLOCK
*AtaCommandBlock
,
1060 ASSERT (PciIo
!= NULL
);
1061 ASSERT (IdeRegisters
!= NULL
);
1062 ASSERT (AtaCommandBlock
!= NULL
);
1064 DeviceHead
= AtaCommandBlock
->AtaDeviceHead
;
1065 AtaCommand
= AtaCommandBlock
->AtaCommand
;
1067 Status
= WaitForBSYClear (PciIo
, IdeRegisters
, Timeout
);
1068 if (EFI_ERROR (Status
)) {
1069 return EFI_DEVICE_ERROR
;
1073 // Select device (bit4), set LBA mode(bit6) (use 0xe0 for compatibility)
1075 IdeWritePortB (PciIo
, IdeRegisters
->Head
, (UINT8
) (0xe0 | DeviceHead
));
1078 // set all the command parameters
1079 // Before write to all the following registers, BSY and DRQ must be 0.
1081 Status
= DRQClear2 (PciIo
, IdeRegisters
, Timeout
);
1082 if (EFI_ERROR (Status
)) {
1083 return EFI_DEVICE_ERROR
;
1087 // Fill the feature register, which is a two-byte FIFO. Need write twice.
1089 IdeWritePortB (PciIo
, IdeRegisters
->ErrOrFeature
, AtaCommandBlock
->AtaFeaturesExp
);
1090 IdeWritePortB (PciIo
, IdeRegisters
->ErrOrFeature
, AtaCommandBlock
->AtaFeatures
);
1093 // Fill the sector count register, which is a two-byte FIFO. Need write twice.
1095 IdeWritePortB (PciIo
, IdeRegisters
->SectorCount
, AtaCommandBlock
->AtaSectorCountExp
);
1096 IdeWritePortB (PciIo
, IdeRegisters
->SectorCount
, AtaCommandBlock
->AtaSectorCount
);
1099 // Fill the start LBA registers, which are also two-byte FIFO
1101 IdeWritePortB (PciIo
, IdeRegisters
->SectorNumber
, AtaCommandBlock
->AtaSectorNumberExp
);
1102 IdeWritePortB (PciIo
, IdeRegisters
->SectorNumber
, AtaCommandBlock
->AtaSectorNumber
);
1104 IdeWritePortB (PciIo
, IdeRegisters
->CylinderLsb
, AtaCommandBlock
->AtaCylinderLowExp
);
1105 IdeWritePortB (PciIo
, IdeRegisters
->CylinderLsb
, AtaCommandBlock
->AtaCylinderLow
);
1107 IdeWritePortB (PciIo
, IdeRegisters
->CylinderMsb
, AtaCommandBlock
->AtaCylinderHighExp
);
1108 IdeWritePortB (PciIo
, IdeRegisters
->CylinderMsb
, AtaCommandBlock
->AtaCylinderHigh
);
1111 // Send command via Command Register
1113 IdeWritePortB (PciIo
, IdeRegisters
->CmdOrStatus
, AtaCommand
);
1116 // Stall at least 400 microseconds.
1118 MicroSecondDelay (400);
1124 This function is used to send out ATA commands conforms to the PIO Data In Protocol.
1126 @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure.
1127 @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure.
1128 @param Buffer A pointer to the source buffer for the data.
1129 @param ByteCount The length of the data.
1130 @param Read Flag used to determine the data transfer direction.
1131 Read equals 1, means data transferred from device to host;
1132 Read equals 0, means data transferred from host to device.
1133 @param AtaCommandBlock A pointer to EFI_ATA_COMMAND_BLOCK data structure.
1134 @param AtaStatusBlock A pointer to EFI_ATA_STATUS_BLOCK data structure.
1135 @param Timeout The time to complete the command.
1137 @retval EFI_SUCCESS send out the ATA command and device send required data successfully.
1138 @retval EFI_DEVICE_ERROR command sent failed.
1144 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
1145 IN EFI_IDE_REGISTERS
*IdeRegisters
,
1146 IN OUT VOID
*Buffer
,
1147 IN UINT64 ByteCount
,
1149 IN EFI_ATA_COMMAND_BLOCK
*AtaCommandBlock
,
1150 IN OUT EFI_ATA_STATUS_BLOCK
*AtaStatusBlock
,
1159 if ((PciIo
== NULL
) || (IdeRegisters
== NULL
) || (Buffer
== NULL
) || (AtaCommandBlock
== NULL
)) {
1160 return EFI_INVALID_PARAMETER
;
1164 // Issue ATA command
1166 Status
= AtaIssueCommand (PciIo
, IdeRegisters
, AtaCommandBlock
, Timeout
);
1167 if (EFI_ERROR (Status
)) {
1168 Status
= EFI_DEVICE_ERROR
;
1172 Buffer16
= (UINT16
*) Buffer
;
1175 // According to PIO data in protocol, host can perform a series of reads to
1176 // the data register after each time device set DRQ ready;
1177 // The data size of "a series of read" is command specific.
1178 // For most ATA command, data size received from device will not exceed
1179 // 1 sector, hence the data size for "a series of read" can be the whole data
1180 // size of one command request.
1181 // For ATA command such as Read Sector command, the data size of one ATA
1182 // command request is often larger than 1 sector, according to the
1183 // Read Sector command, the data size of "a series of read" is exactly 1
1185 // Here for simplification reason, we specify the data size for
1186 // "a series of read" to 1 sector (256 words) if data size of one ATA command
1187 // request is larger than 256 words.
1192 // used to record bytes of currently transfered data
1196 while (WordCount
< RShiftU64(ByteCount
, 1)) {
1198 // Poll DRQ bit set, data transfer can be performed only when DRQ is ready
1200 Status
= DRQReady2 (PciIo
, IdeRegisters
, Timeout
);
1201 if (EFI_ERROR (Status
)) {
1202 Status
= EFI_DEVICE_ERROR
;
1207 // Get the byte count for one series of read
1209 if ((WordCount
+ Increment
) > RShiftU64(ByteCount
, 1)) {
1210 Increment
= (UINTN
)(RShiftU64(ByteCount
, 1) - WordCount
);
1214 IdeReadPortWMultiple (
1221 IdeWritePortWMultiple (
1229 Status
= CheckStatusRegister (PciIo
, IdeRegisters
);
1230 if (EFI_ERROR (Status
)) {
1231 Status
= EFI_DEVICE_ERROR
;
1235 WordCount
+= Increment
;
1236 Buffer16
+= Increment
;
1239 Status
= DRQClear (PciIo
, IdeRegisters
, Timeout
);
1240 if (EFI_ERROR (Status
)) {
1241 Status
= EFI_DEVICE_ERROR
;
1247 // Dump All Ide registers to ATA_STATUS_BLOCK
1249 DumpAllIdeRegisters (PciIo
, IdeRegisters
, AtaStatusBlock
);
1255 Send ATA command into device with NON_DATA protocol
1257 @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure.
1258 @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure.
1259 @param AtaCommandBlock A pointer to EFI_ATA_COMMAND_BLOCK data structure.
1260 @param AtaStatusBlock A pointer to EFI_ATA_STATUS_BLOCK data structure.
1261 @param Timeout The time to complete the command.
1263 @retval EFI_SUCCESS Reading succeed
1264 @retval EFI_ABORTED Command failed
1265 @retval EFI_DEVICE_ERROR Device status error.
1270 AtaNonDataCommandIn (
1271 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
1272 IN EFI_IDE_REGISTERS
*IdeRegisters
,
1273 IN EFI_ATA_COMMAND_BLOCK
*AtaCommandBlock
,
1274 IN OUT EFI_ATA_STATUS_BLOCK
*AtaStatusBlock
,
1280 if ((PciIo
== NULL
) || (IdeRegisters
== NULL
) || (AtaCommandBlock
== NULL
)) {
1281 return EFI_INVALID_PARAMETER
;
1285 // Issue ATA command
1287 Status
= AtaIssueCommand (PciIo
, IdeRegisters
, AtaCommandBlock
, Timeout
);
1288 if (EFI_ERROR (Status
)) {
1289 Status
= EFI_DEVICE_ERROR
;
1294 // Wait for command completion
1296 Status
= WaitForBSYClear (PciIo
, IdeRegisters
, Timeout
);
1297 if (EFI_ERROR (Status
)) {
1298 Status
= EFI_DEVICE_ERROR
;
1302 Status
= CheckStatusRegister (PciIo
, IdeRegisters
);
1303 if (EFI_ERROR (Status
)) {
1304 Status
= EFI_DEVICE_ERROR
;
1310 // Dump All Ide registers to ATA_STATUS_BLOCK
1312 DumpAllIdeRegisters (PciIo
, IdeRegisters
, AtaStatusBlock
);
1319 Perform an ATA Udma operation (Read, ReadExt, Write, WriteExt).
1321 @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure.
1322 @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure.
1323 @param Read Flag used to determine the data transfer direction.
1324 Read equals 1, means data transferred from device to host;
1325 Read equals 0, means data transferred from host to device.
1326 @param DataBuffer A pointer to the source buffer for the data.
1327 @param DataLength The length of the data.
1328 @param AtaCommandBlock A pointer to EFI_ATA_COMMAND_BLOCK data structure.
1329 @param AtaStatusBlock A pointer to EFI_ATA_STATUS_BLOCK data structure.
1330 @param Timeout The time to complete the command.
1332 @retval EFI_SUCCESS the operation is successful.
1333 @retval EFI_OUT_OF_RESOURCES Build PRD table failed
1334 @retval EFI_UNSUPPORTED Unknown channel or operations command
1335 @retval EFI_DEVICE_ERROR Ata command execute failed
1341 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
1342 IN EFI_IDE_REGISTERS
*IdeRegisters
,
1344 IN VOID
*DataBuffer
,
1345 IN UINT64 DataLength
,
1346 IN EFI_ATA_COMMAND_BLOCK
*AtaCommandBlock
,
1347 IN OUT EFI_ATA_STATUS_BLOCK
*AtaStatusBlock
,
1352 UINT16 IoPortForBmic
;
1353 UINT16 IoPortForBmis
;
1354 UINT16 IoPortForBmid
;
1356 UINT8 RegisterValue
;
1358 EFI_ATA_DMA_PRD
*PrdBaseAddr
;
1361 EFI_PHYSICAL_ADDRESS PrdTableMapAddr
;
1366 UINTN ByteRemaining
;
1368 UINT8 DeviceControl
;
1371 EFI_PHYSICAL_ADDRESS BufferMapAddress
;
1372 EFI_PCI_IO_PROTOCOL_OPERATION PciIoOperation
;
1377 Status
= EFI_SUCCESS
;
1380 if ((PciIo
== NULL
) || (IdeRegisters
== NULL
) || (DataBuffer
== NULL
) || (AtaCommandBlock
== NULL
)) {
1381 return EFI_INVALID_PARAMETER
;
1385 // The data buffer should be even alignment
1387 if (((UINTN
)DataBuffer
& 0x1) != 0) {
1388 return EFI_INVALID_PARAMETER
;
1392 // Calculate the number of PRD entry.
1393 // Every entry in PRD table can specify a 64K memory region.
1395 PrdTableNum
= (UINTN
)(RShiftU64(DataLength
, 16) + 1);
1398 // Make sure that the memory region of PRD table is not cross 64K boundary
1400 PrdTableSize
= PrdTableNum
* sizeof (EFI_ATA_DMA_PRD
);
1401 if (PrdTableSize
> 0x10000) {
1402 return EFI_INVALID_PARAMETER
;
1406 // Allocate buffer for PRD table initialization.
1408 PageCount
= EFI_SIZE_TO_PAGES (PrdTableSize
);
1409 Status
= PciIo
->AllocateBuffer (
1412 EfiBootServicesData
,
1414 (VOID
**)&PrdBaseAddr
,
1417 if (EFI_ERROR (Status
)) {
1418 return EFI_OUT_OF_RESOURCES
;
1421 ByteCount
= EFI_PAGES_TO_SIZE (PageCount
);
1422 Status
= PciIo
->Map (
1424 EfiPciIoOperationBusMasterCommonBuffer
,
1430 if (EFI_ERROR (Status
) || (ByteCount
!= EFI_PAGES_TO_SIZE (PageCount
))) {
1432 // If the data length actually mapped is not equal to the requested amount,
1433 // it means the DMA operation may be broken into several discontinuous smaller chunks.
1434 // Can't handle this case.
1436 PciIo
->FreeBuffer (PciIo
, PageCount
, PrdBaseAddr
);
1437 return EFI_OUT_OF_RESOURCES
;
1440 ZeroMem ((VOID
*) ((UINTN
) PrdBaseAddr
), ByteCount
);
1443 // Map the host address of DataBuffer to DMA master address.
1446 PciIoOperation
= EfiPciIoOperationBusMasterWrite
;
1448 PciIoOperation
= EfiPciIoOperationBusMasterRead
;
1451 ByteCount
= (UINTN
)DataLength
;
1452 Status
= PciIo
->Map (
1460 if (EFI_ERROR (Status
) || (ByteCount
!= DataLength
)) {
1461 PciIo
->Unmap (PciIo
, PrdTableMap
);
1462 PciIo
->FreeBuffer (PciIo
, PageCount
, PrdBaseAddr
);
1463 return EFI_OUT_OF_RESOURCES
;
1467 // According to Ata spec, it requires the buffer address and size to be even.
1469 ASSERT ((BufferMapAddress
& 0x1) == 0);
1470 ASSERT ((ByteCount
& 0x1) == 0);
1473 // Fill the PRD table with appropriate bus master address of data buffer and data length.
1475 ByteRemaining
= ByteCount
;
1476 while (ByteRemaining
!= 0) {
1477 if (ByteRemaining
<= 0x10000) {
1478 PrdBaseAddr
->RegionBaseAddr
= (UINT32
) ((UINTN
) BufferMapAddress
);
1479 PrdBaseAddr
->ByteCount
= (UINT16
) ByteRemaining
;
1480 PrdBaseAddr
->EndOfTable
= 0x8000;
1484 PrdBaseAddr
->RegionBaseAddr
= (UINT32
) ((UINTN
) BufferMapAddress
);
1485 PrdBaseAddr
->ByteCount
= (UINT16
) 0x0;
1487 ByteRemaining
-= 0x10000;
1488 BufferMapAddress
+= 0x10000;
1493 // Start to enable the DMA operation
1495 DeviceHead
= AtaCommandBlock
->AtaDeviceHead
;
1496 AtaCommand
= AtaCommandBlock
->AtaCommand
;
1498 IdeWritePortB (PciIo
, IdeRegisters
->Head
, (UINT8
)(0xe0 | DeviceHead
));
1501 // Enable interrupt to support UDMA
1504 IdeWritePortB (PciIo
, IdeRegisters
->AltOrDev
, DeviceControl
);
1506 IoPortForBmic
= (UINT16
) (IdeRegisters
->BusMasterBaseAddr
+ BMIC_OFFSET
);
1507 IoPortForBmis
= (UINT16
) (IdeRegisters
->BusMasterBaseAddr
+ BMIS_OFFSET
);
1508 IoPortForBmid
= (UINT16
) (IdeRegisters
->BusMasterBaseAddr
+ BMID_OFFSET
);
1511 // Read BMIS register and clear ERROR and INTR bit
1513 RegisterValue
= IdeReadPortB(PciIo
, IoPortForBmis
);
1514 RegisterValue
|= (BMIS_INTERRUPT
| BMIS_ERROR
);
1515 IdeWritePortB(PciIo
, IoPortForBmis
, RegisterValue
);
1518 // Set the base address to BMID register
1520 IdeWritePortDW(PciIo
, IoPortForBmid
, (UINT32
)PrdTableMapAddr
);
1523 // Set BMIC register to identify the operation direction
1525 RegisterValue
= IdeReadPortB(PciIo
, IoPortForBmic
);
1527 RegisterValue
|= BMIC_NREAD
;
1529 RegisterValue
&= ~((UINT8
) BMIC_NREAD
);
1531 IdeWritePortB(PciIo
, IoPortForBmic
, RegisterValue
);
1534 // Issue ATA command
1536 Status
= AtaIssueCommand (PciIo
, IdeRegisters
, AtaCommandBlock
, Timeout
);
1538 if (EFI_ERROR (Status
)) {
1539 Status
= EFI_DEVICE_ERROR
;
1544 // Set START bit of BMIC register
1546 RegisterValue
= IdeReadPortB(PciIo
, IoPortForBmic
);
1547 RegisterValue
|= BMIC_START
;
1548 IdeWritePortB(PciIo
, IoPortForBmic
, RegisterValue
);
1551 // Check the INTERRUPT and ERROR bit of BMIS
1552 // Max transfer number of sectors for one command is 65536(32Mbyte),
1553 // it will cost 1 second to transfer these data in UDMA mode 2(33.3MBps).
1554 // So set the variable Count to 2000, for about 2 second Timeout time.
1558 RegisterValue
= IdeReadPortB(PciIo
, IoPortForBmis
);
1560 if (((RegisterValue
& BMIS_ERROR
) != 0) || (Timeout
== 0)) {
1561 DEBUG ((EFI_D_ERROR
, "ATA UDMA operation fails\n"));
1562 Status
= EFI_DEVICE_ERROR
;
1566 if ((RegisterValue
& BMIS_INTERRUPT
) != 0) {
1567 Status
= EFI_SUCCESS
;
1571 // Stall for 1 milliseconds.
1573 MicroSecondDelay (1000);
1578 // Read BMIS register and clear ERROR and INTR bit
1580 RegisterValue
= IdeReadPortB(PciIo
, IoPortForBmis
);
1581 RegisterValue
|= (BMIS_INTERRUPT
| BMIS_ERROR
);
1582 IdeWritePortB(PciIo
, IoPortForBmis
, RegisterValue
);
1585 // Read Status Register of IDE device to clear interrupt
1587 RegisterValue
= IdeReadPortB(PciIo
, IdeRegisters
->CmdOrStatus
);
1590 // Clear START bit of BMIC register
1592 RegisterValue
= IdeReadPortB(PciIo
, IoPortForBmic
);
1593 RegisterValue
&= ~((UINT8
) BMIC_START
);
1594 IdeWritePortB(PciIo
, IoPortForBmic
, RegisterValue
);
1597 // Disable interrupt of Select device
1599 DeviceControl
= IdeReadPortB (PciIo
, IdeRegisters
->AltOrDev
);
1600 DeviceControl
|= ATA_CTLREG_IEN_L
;
1601 IdeWritePortB (PciIo
, IdeRegisters
->AltOrDev
, DeviceControl
);
1603 // Stall for 10 milliseconds.
1605 MicroSecondDelay (10000);
1609 // Free all allocated resource
1611 PciIo
->Unmap (PciIo
, PrdTableMap
);
1612 PciIo
->FreeBuffer (PciIo
, PageCount
, PrdBaseAddr
);
1613 PciIo
->Unmap (PciIo
, BufferMap
);
1616 // Dump All Ide registers to ATA_STATUS_BLOCK
1618 DumpAllIdeRegisters (PciIo
, IdeRegisters
, AtaStatusBlock
);
1624 This function reads the pending data in the device.
1626 @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure.
1627 @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure.
1629 @retval EFI_SUCCESS Successfully read.
1630 @retval EFI_NOT_READY The BSY is set avoiding reading.
1635 AtaPacketReadPendingData (
1636 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
1637 IN EFI_IDE_REGISTERS
*IdeRegisters
1641 UINT16 TempWordBuffer
;
1643 AltRegister
= IdeReadPortB (PciIo
, IdeRegisters
->AltOrDev
);
1644 if ((AltRegister
& ATA_STSREG_BSY
) == ATA_STSREG_BSY
) {
1645 return EFI_NOT_READY
;
1648 if ((AltRegister
& (ATA_STSREG_BSY
| ATA_STSREG_DRQ
)) == ATA_STSREG_DRQ
) {
1649 TempWordBuffer
= IdeReadPortB (PciIo
, IdeRegisters
->AltOrDev
);
1650 while ((TempWordBuffer
& (ATA_STSREG_BSY
| ATA_STSREG_DRQ
)) == ATA_STSREG_DRQ
) {
1651 IdeReadPortWMultiple (
1657 TempWordBuffer
= IdeReadPortB (PciIo
, IdeRegisters
->AltOrDev
);
1664 This function is called by AtaPacketCommandExecute().
1665 It is used to transfer data between host and device. The data direction is specified
1666 by the fourth parameter.
1668 @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure.
1669 @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure.
1670 @param Buffer Buffer contained data transferred between host and device.
1671 @param ByteCount Data size in byte unit of the buffer.
1672 @param Read Flag used to determine the data transfer direction.
1673 Read equals 1, means data transferred from device to host;
1674 Read equals 0, means data transferred from host to device.
1675 @param Timeout Timeout value for wait DRQ ready before each data stream's transfer.
1677 @retval EFI_SUCCESS data is transferred successfully.
1678 @retval EFI_DEVICE_ERROR the device failed to transfer data.
1682 AtaPacketReadWrite (
1683 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
1684 IN EFI_IDE_REGISTERS
*IdeRegisters
,
1685 IN OUT VOID
*Buffer
,
1686 IN UINT64 ByteCount
,
1691 UINT32 RequiredWordCount
;
1692 UINT32 ActualWordCount
;
1698 // No data transfer is premitted.
1700 if (ByteCount
== 0) {
1705 RequiredWordCount
= (UINT32
)RShiftU64(ByteCount
, 1);
1707 // ActuralWordCount means the word count of data really transferred.
1709 ActualWordCount
= 0;
1711 while (ActualWordCount
< RequiredWordCount
) {
1713 // before each data transfer stream, the host should poll DRQ bit ready,
1714 // to see whether indicates device is ready to transfer data.
1716 Status
= DRQReady2 (PciIo
, IdeRegisters
, Timeout
);
1717 if (EFI_ERROR (Status
)) {
1718 return CheckStatusRegister (PciIo
, IdeRegisters
);
1722 // get current data transfer size from Cylinder Registers.
1724 WordCount
= IdeReadPortB (PciIo
, IdeRegisters
->CylinderMsb
) << 8;
1725 WordCount
= WordCount
| IdeReadPortB (PciIo
, IdeRegisters
->CylinderLsb
);
1726 WordCount
= WordCount
& 0xffff;
1729 WordCount
= MIN (WordCount
, (RequiredWordCount
- ActualWordCount
));
1732 IdeReadPortWMultiple (
1739 IdeWritePortWMultiple (
1748 // read status register to check whether error happens.
1750 Status
= CheckStatusRegister (PciIo
, IdeRegisters
);
1751 if (EFI_ERROR (Status
)) {
1752 return EFI_DEVICE_ERROR
;
1755 PtrBuffer
+= WordCount
;
1756 ActualWordCount
+= WordCount
;
1761 // In the case where the drive wants to send more data than we need to read,
1762 // the DRQ bit will be set and cause delays from DRQClear2().
1763 // We need to read data from the drive until it clears DRQ so we can move on.
1765 AtaPacketReadPendingData (PciIo
, IdeRegisters
);
1769 // read status register to check whether error happens.
1771 Status
= CheckStatusRegister (PciIo
, IdeRegisters
);
1772 if (EFI_ERROR (Status
)) {
1773 return EFI_DEVICE_ERROR
;
1777 // After data transfer is completed, normally, DRQ bit should clear.
1779 Status
= DRQClear2 (PciIo
, IdeRegisters
, Timeout
);
1780 if (EFI_ERROR (Status
)) {
1781 return EFI_DEVICE_ERROR
;
1788 Sumbit ATAPI request sense command.
1790 @param[in] PciIo Pointer to the EFI_PCI_IO_PROTOCOL instance
1791 @param[in] IdeRegisters Pointer to EFI_IDE_REGISTERS which is used to
1792 store the IDE i/o port registers' base addresses
1793 @param[in] Channel The channel number of device.
1794 @param[in] Device The device number of device.
1795 @param[in] SenseData A pointer to store sense data.
1796 @param[in] SenseDataLength The sense data length.
1797 @param[in] Timeout The timeout value to execute this cmd.
1799 @retval EFI_SUCCESS Send out the ATAPI packet command successfully.
1800 @retval EFI_DEVICE_ERROR The device failed to send data.
1805 AtaPacketRequestSense (
1806 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
1807 IN EFI_IDE_REGISTERS
*IdeRegisters
,
1811 IN UINT8 SenseDataLength
,
1815 EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET Packet
;
1819 ZeroMem (&Packet
, sizeof (EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET
));
1822 Cdb
[0] = ATA_CMD_REQUEST_SENSE
;
1823 Cdb
[4] = SenseDataLength
;
1825 Packet
.Timeout
= Timeout
;
1827 Packet
.CdbLength
= 12;
1828 Packet
.DataDirection
= EFI_EXT_SCSI_DATA_DIRECTION_READ
;
1829 Packet
.InDataBuffer
= SenseData
;
1830 Packet
.InTransferLength
= SenseDataLength
;
1832 Status
= AtaPacketCommandExecute (PciIo
, IdeRegisters
, Channel
, Device
, &Packet
);
1838 This function is used to send out ATAPI commands conforms to the Packet Command
1839 with PIO Data In Protocol.
1841 @param[in] PciIo Pointer to the EFI_PCI_IO_PROTOCOL instance
1842 @param[in] IdeRegisters Pointer to EFI_IDE_REGISTERS which is used to
1843 store the IDE i/o port registers' base addresses
1844 @param[in] Channel The channel number of device.
1845 @param[in] Device The device number of device.
1846 @param[in] Packet A pointer to EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET data structure.
1848 @retval EFI_SUCCESS send out the ATAPI packet command successfully
1849 and device sends data successfully.
1850 @retval EFI_DEVICE_ERROR the device failed to send data.
1855 AtaPacketCommandExecute (
1856 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
1857 IN EFI_IDE_REGISTERS
*IdeRegisters
,
1860 IN EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET
*Packet
1863 EFI_STATUS PacketCommandStatus
;
1864 EFI_ATA_COMMAND_BLOCK AtaCommandBlock
;
1867 UINT8 PacketCommand
[12];
1869 ZeroMem (&AtaCommandBlock
, sizeof (EFI_ATA_COMMAND_BLOCK
));
1872 // Fill ATAPI Command Packet according to CDB.
1873 // For Atapi cmd, its length should be less than or equal to 12 bytes.
1875 if (Packet
->CdbLength
> 12) {
1876 return EFI_INVALID_PARAMETER
;
1879 ZeroMem (PacketCommand
, 12);
1880 CopyMem (PacketCommand
, Packet
->Cdb
, Packet
->CdbLength
);
1885 AtaCommandBlock
.AtaFeatures
= 0x00;
1887 // set the transfersize to ATAPI_MAX_BYTE_COUNT to let the device
1888 // determine how many data should be transferred.
1890 AtaCommandBlock
.AtaCylinderLow
= (UINT8
) (ATAPI_MAX_BYTE_COUNT
& 0x00ff);
1891 AtaCommandBlock
.AtaCylinderHigh
= (UINT8
) (ATAPI_MAX_BYTE_COUNT
>> 8);
1892 AtaCommandBlock
.AtaDeviceHead
= (UINT8
) (Device
<< 0x4);
1893 AtaCommandBlock
.AtaCommand
= ATA_CMD_PACKET
;
1895 IdeWritePortB (PciIo
, IdeRegisters
->Head
, (UINT8
)(0xe0 | (Device
<< 0x4)));
1897 // Disable interrupt
1899 IdeWritePortB (PciIo
, IdeRegisters
->AltOrDev
, ATA_DEFAULT_CTL
);
1902 // Issue ATA PACKET command firstly
1904 Status
= AtaIssueCommand (PciIo
, IdeRegisters
, &AtaCommandBlock
, Packet
->Timeout
);
1905 if (EFI_ERROR (Status
)) {
1909 Status
= DRQReady (PciIo
, IdeRegisters
, Packet
->Timeout
);
1910 if (EFI_ERROR (Status
)) {
1915 // Send out ATAPI command packet
1917 for (Count
= 0; Count
< 6; Count
++) {
1918 IdeWritePortW (PciIo
, IdeRegisters
->Data
, *((UINT16
*)PacketCommand
+ Count
));
1920 // Stall for 10 microseconds.
1922 MicroSecondDelay (10);
1926 // Read/Write the data of ATAPI Command
1928 if (Packet
->DataDirection
== EFI_EXT_SCSI_DATA_DIRECTION_READ
) {
1929 PacketCommandStatus
= AtaPacketReadWrite (
1932 Packet
->InDataBuffer
,
1933 Packet
->InTransferLength
,
1938 PacketCommandStatus
= AtaPacketReadWrite (
1941 Packet
->OutDataBuffer
,
1942 Packet
->OutTransferLength
,
1948 if (!EFI_ERROR (PacketCommandStatus
)) {
1949 return PacketCommandStatus
;
1953 // Return SenseData if PacketCommandStatus matches
1954 // the following return codes.
1956 if ((PacketCommandStatus
== EFI_BAD_BUFFER_SIZE
) ||
1957 (PacketCommandStatus
== EFI_DEVICE_ERROR
) ||
1958 (PacketCommandStatus
== EFI_TIMEOUT
)) {
1961 // avoid submit request sense command continuously.
1963 if ((Packet
->SenseData
== NULL
) || (((UINT8
*)Packet
->Cdb
)[0] == ATA_CMD_REQUEST_SENSE
)) {
1964 return PacketCommandStatus
;
1967 AtaPacketRequestSense (
1973 Packet
->SenseDataLength
,
1978 return PacketCommandStatus
;
1983 Set the calculated Best transfer mode to a detected device.
1985 @param Instance A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure.
1986 @param Channel The channel number of device.
1987 @param Device The device number of device.
1988 @param TransferMode A pointer to EFI_ATA_TRANSFER_MODE data structure.
1989 @param AtaStatusBlock A pointer to EFI_ATA_STATUS_BLOCK data structure.
1991 @retval EFI_SUCCESS Set transfer mode successfully.
1992 @retval EFI_DEVICE_ERROR Set transfer mode failed.
1993 @retval EFI_OUT_OF_RESOURCES Allocate memory failed.
1998 SetDeviceTransferMode (
1999 IN ATA_ATAPI_PASS_THRU_INSTANCE
*Instance
,
2002 IN EFI_ATA_TRANSFER_MODE
*TransferMode
,
2003 IN OUT EFI_ATA_STATUS_BLOCK
*AtaStatusBlock
2007 EFI_ATA_COMMAND_BLOCK AtaCommandBlock
;
2009 ZeroMem (&AtaCommandBlock
, sizeof (EFI_ATA_COMMAND_BLOCK
));
2011 AtaCommandBlock
.AtaCommand
= ATA_CMD_SET_FEATURES
;
2012 AtaCommandBlock
.AtaDeviceHead
= (UINT8
)(Device
<< 0x4);
2013 AtaCommandBlock
.AtaFeatures
= 0x03;
2014 AtaCommandBlock
.AtaSectorCount
= *((UINT8
*)TransferMode
);
2017 // Send SET FEATURE command (sub command 0x03) to set pio mode.
2019 Status
= AtaNonDataCommandIn (
2021 &Instance
->IdeRegisters
[Channel
],
2031 Set drive parameters for devices not support PACKETS command.
2033 @param Instance A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure.
2034 @param Channel The channel number of device.
2035 @param Device The device number of device.
2036 @param DriveParameters A pointer to EFI_ATA_DRIVE_PARMS data structure.
2037 @param AtaStatusBlock A pointer to EFI_ATA_STATUS_BLOCK data structure.
2039 @retval EFI_SUCCESS Set drive parameter successfully.
2040 @retval EFI_DEVICE_ERROR Set drive parameter failed.
2041 @retval EFI_OUT_OF_RESOURCES Allocate memory failed.
2046 SetDriveParameters (
2047 IN ATA_ATAPI_PASS_THRU_INSTANCE
*Instance
,
2050 IN EFI_ATA_DRIVE_PARMS
*DriveParameters
,
2051 IN OUT EFI_ATA_STATUS_BLOCK
*AtaStatusBlock
2056 EFI_ATA_COMMAND_BLOCK AtaCommandBlock
;
2058 ZeroMem (&AtaCommandBlock
, sizeof (EFI_ATA_COMMAND_BLOCK
));
2060 AtaCommandBlock
.AtaCommand
= ATA_CMD_INIT_DRIVE_PARAM
;
2061 AtaCommandBlock
.AtaSectorCount
= DriveParameters
->Sector
;
2062 AtaCommandBlock
.AtaDeviceHead
= (UINT8
) ((Device
<< 0x4) + DriveParameters
->Heads
);
2065 // Send Init drive parameters
2067 Status
= AtaNonDataCommandIn (
2069 &Instance
->IdeRegisters
[Channel
],
2076 // Send Set Multiple parameters
2078 AtaCommandBlock
.AtaCommand
= ATA_CMD_SET_MULTIPLE_MODE
;
2079 AtaCommandBlock
.AtaSectorCount
= DriveParameters
->MultipleSector
;
2080 AtaCommandBlock
.AtaDeviceHead
= (UINT8
)(Device
<< 0x4);
2082 Status
= AtaNonDataCommandIn (
2084 &Instance
->IdeRegisters
[Channel
],
2094 Sends out an ATA Identify Command to the specified device.
2096 This function is called by DiscoverIdeDevice() during its device
2097 identification. It sends out the ATA Identify Command to the
2098 specified device. Only ATA device responses to this command. If
2099 the command succeeds, it returns the Identify data structure which
2100 contains information about the device. This function extracts the
2101 information it needs to fill the IDE_BLK_IO_DEV data structure,
2102 including device type, media block size, media capacity, and etc.
2104 @param Instance A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure.
2105 @param Channel The channel number of device.
2106 @param Device The device number of device.
2107 @param Buffer A pointer to data buffer which is used to contain IDENTIFY data.
2108 @param AtaStatusBlock A pointer to EFI_ATA_STATUS_BLOCK data structure.
2110 @retval EFI_SUCCESS Identify ATA device successfully.
2111 @retval EFI_DEVICE_ERROR ATA Identify Device Command failed or device is not ATA device.
2112 @retval EFI_OUT_OF_RESOURCES Allocate memory failed.
2117 IN ATA_ATAPI_PASS_THRU_INSTANCE
*Instance
,
2120 IN OUT EFI_IDENTIFY_DATA
*Buffer
,
2121 IN OUT EFI_ATA_STATUS_BLOCK
*AtaStatusBlock
2125 EFI_ATA_COMMAND_BLOCK AtaCommandBlock
;
2127 ZeroMem (&AtaCommandBlock
, sizeof (EFI_ATA_COMMAND_BLOCK
));
2129 AtaCommandBlock
.AtaCommand
= ATA_CMD_IDENTIFY_DRIVE
;
2130 AtaCommandBlock
.AtaDeviceHead
= (UINT8
)(Device
<< 0x4);
2132 Status
= AtaPioDataInOut (
2134 &Instance
->IdeRegisters
[Channel
],
2136 sizeof (EFI_IDENTIFY_DATA
),
2147 This function is called by DiscoverIdeDevice() during its device
2149 Its main purpose is to get enough information for the device media
2150 to fill in the Media data structure of the Block I/O Protocol interface.
2152 There are 5 steps to reach such objective:
2153 1. Sends out the ATAPI Identify Command to the specified device.
2154 Only ATAPI device responses to this command. If the command succeeds,
2155 it returns the Identify data structure which filled with information
2156 about the device. Since the ATAPI device contains removable media,
2157 the only meaningful information is the device module name.
2158 2. Sends out ATAPI Inquiry Packet Command to the specified device.
2159 This command will return inquiry data of the device, which contains
2160 the device type information.
2161 3. Allocate sense data space for future use. We don't detect the media
2162 presence here to improvement boot performance, especially when CD
2163 media is present. The media detection will be performed just before
2164 each BLK_IO read/write
2166 @param Instance A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure.
2167 @param Channel The channel number of device.
2168 @param Device The device number of device.
2169 @param Buffer A pointer to data buffer which is used to contain IDENTIFY data.
2170 @param AtaStatusBlock A pointer to EFI_ATA_STATUS_BLOCK data structure.
2172 @retval EFI_SUCCESS Identify ATAPI device successfully.
2173 @retval EFI_DEVICE_ERROR ATA Identify Packet Device Command failed or device type
2174 is not supported by this IDE driver.
2175 @retval EFI_OUT_OF_RESOURCES Allocate memory failed.
2181 IN ATA_ATAPI_PASS_THRU_INSTANCE
*Instance
,
2184 IN OUT EFI_IDENTIFY_DATA
*Buffer
,
2185 IN OUT EFI_ATA_STATUS_BLOCK
*AtaStatusBlock
2189 EFI_ATA_COMMAND_BLOCK AtaCommandBlock
;
2191 ZeroMem (&AtaCommandBlock
, sizeof (EFI_ATA_COMMAND_BLOCK
));
2193 AtaCommandBlock
.AtaCommand
= ATA_CMD_IDENTIFY_DEVICE
;
2194 AtaCommandBlock
.AtaDeviceHead
= (UINT8
)(Device
<< 0x4);
2197 // Send ATAPI Identify Command to get IDENTIFY data.
2199 Status
= AtaPioDataInOut (
2201 &Instance
->IdeRegisters
[Channel
],
2203 sizeof (EFI_IDENTIFY_DATA
),
2215 This function is used for detect whether the IDE device exists in the
2216 specified Channel as the specified Device Number.
2218 There is two IDE channels: one is Primary Channel, the other is
2219 Secondary Channel.(Channel is the logical name for the physical "Cable".)
2220 Different channel has different register group.
2222 On each IDE channel, at most two IDE devices attach,
2223 one is called Device 0 (Master device), the other is called Device 1
2224 (Slave device). The devices on the same channel co-use the same register
2225 group, so before sending out a command for a specified device via command
2226 register, it is a must to select the current device to accept the command
2227 by set the device number in the Head/Device Register.
2229 @param Instance A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data structure.
2230 @param IdeChannel The channel number of device.
2232 @retval EFI_SUCCESS successfully detects device.
2233 @retval other any failure during detection process will return this value.
2238 DetectAndConfigIdeDevice (
2239 IN ATA_ATAPI_PASS_THRU_INSTANCE
*Instance
,
2244 UINT8 SectorCountReg
;
2248 EFI_ATA_DEVICE_TYPE DeviceType
;
2250 EFI_IDE_REGISTERS
*IdeRegisters
;
2251 EFI_IDENTIFY_DATA Buffer
;
2253 EFI_IDE_CONTROLLER_INIT_PROTOCOL
*IdeInit
;
2254 EFI_PCI_IO_PROTOCOL
*PciIo
;
2256 EFI_ATA_COLLECTIVE_MODE
*SupportedModes
;
2257 EFI_ATA_TRANSFER_MODE TransferMode
;
2258 EFI_ATA_DRIVE_PARMS DriveParameters
;
2260 IdeRegisters
= &Instance
->IdeRegisters
[IdeChannel
];
2261 IdeInit
= Instance
->IdeControllerInit
;
2262 PciIo
= Instance
->PciIo
;
2264 for (IdeDevice
= 0; IdeDevice
< EfiIdeMaxDevice
; IdeDevice
++) {
2266 // Send ATA Device Execut Diagnostic command.
2267 // This command should work no matter DRDY is ready or not
2269 IdeWritePortB (PciIo
, IdeRegisters
->CmdOrStatus
, ATA_CMD_EXEC_DRIVE_DIAG
);
2271 Status
= WaitForBSYClear (PciIo
, IdeRegisters
, 350000000);
2272 if (EFI_ERROR (Status
)) {
2273 DEBUG((EFI_D_ERROR
, "New detecting method: Send Execute Diagnostic Command: WaitForBSYClear: Status: %d\n", Status
));
2278 // Select Master or Slave device to get the return signature for ATA DEVICE DIAGNOSTIC cmd.
2280 IdeWritePortB (PciIo
, IdeRegisters
->Head
, (UINT8
)((IdeDevice
<< 4) | 0xe0));
2282 // Stall for 1 milliseconds.
2284 MicroSecondDelay (1000);
2286 SectorCountReg
= IdeReadPortB (PciIo
, IdeRegisters
->SectorCount
);
2287 LBALowReg
= IdeReadPortB (PciIo
, IdeRegisters
->SectorNumber
);
2288 LBAMidReg
= IdeReadPortB (PciIo
, IdeRegisters
->CylinderLsb
);
2289 LBAHighReg
= IdeReadPortB (PciIo
, IdeRegisters
->CylinderMsb
);
2292 // Refer to ATA/ATAPI 4 Spec, section 9.1
2294 if ((SectorCountReg
== 0x1) && (LBALowReg
== 0x1) && (LBAMidReg
== 0x0) && (LBAHighReg
== 0x0)) {
2295 DeviceType
= EfiIdeHarddisk
;
2296 } else if ((LBAMidReg
== 0x14) && (LBAHighReg
== 0xeb)) {
2297 DeviceType
= EfiIdeCdrom
;
2303 // Send IDENTIFY cmd to the device to test if it is really attached.
2305 if (DeviceType
== EfiIdeHarddisk
) {
2306 Status
= AtaIdentify (Instance
, IdeChannel
, IdeDevice
, &Buffer
, NULL
);
2308 // if identifying ata device is failure, then try to send identify packet cmd.
2310 if (EFI_ERROR (Status
)) {
2311 DeviceType
= EfiIdeCdrom
;
2312 Status
= AtaIdentifyPacket (Instance
, IdeChannel
, IdeDevice
, &Buffer
, NULL
);
2315 Status
= AtaIdentifyPacket (Instance
, IdeChannel
, IdeDevice
, &Buffer
, NULL
);
2317 // if identifying atapi device is failure, then try to send identify cmd.
2319 if (EFI_ERROR (Status
)) {
2320 DeviceType
= EfiIdeHarddisk
;
2321 Status
= AtaIdentify (Instance
, IdeChannel
, IdeDevice
, &Buffer
, NULL
);
2325 if (EFI_ERROR (Status
)) {
2327 // No device is found at this port
2332 DEBUG ((EFI_D_INFO
, "[%a] channel [%a] [%a] device\n",
2333 (IdeChannel
== 1) ? "secondary" : "primary ", (IdeDevice
== 1) ? "slave " : "master",
2334 DeviceType
== EfiIdeCdrom
? "cdrom " : "harddisk"));
2337 // Submit identify data to IDE controller init driver
2339 IdeInit
->SubmitData (IdeInit
, IdeChannel
, IdeDevice
, &Buffer
);
2342 // Now start to config ide device parameter and transfer mode.
2344 Status
= IdeInit
->CalculateMode (
2350 if (EFI_ERROR (Status
)) {
2351 DEBUG ((EFI_D_ERROR
, "Calculate Mode Fail, Status = %r\n", Status
));
2356 // Set best supported PIO mode on this IDE device
2358 if (SupportedModes
->PioMode
.Mode
<= EfiAtaPioMode2
) {
2359 TransferMode
.ModeCategory
= EFI_ATA_MODE_DEFAULT_PIO
;
2361 TransferMode
.ModeCategory
= EFI_ATA_MODE_FLOW_PIO
;
2364 TransferMode
.ModeNumber
= (UINT8
) (SupportedModes
->PioMode
.Mode
);
2366 if (SupportedModes
->ExtModeCount
== 0){
2367 Status
= SetDeviceTransferMode (Instance
, IdeChannel
, IdeDevice
, &TransferMode
, NULL
);
2369 if (EFI_ERROR (Status
)) {
2370 DEBUG ((EFI_D_ERROR
, "Set transfer Mode Fail, Status = %r\n", Status
));
2376 // Set supported DMA mode on this IDE device. Note that UDMA & MDMA cann't
2377 // be set together. Only one DMA mode can be set to a device. If setting
2378 // DMA mode operation fails, we can continue moving on because we only use
2379 // PIO mode at boot time. DMA modes are used by certain kind of OS booting
2381 if (SupportedModes
->UdmaMode
.Valid
) {
2382 TransferMode
.ModeCategory
= EFI_ATA_MODE_UDMA
;
2383 TransferMode
.ModeNumber
= (UINT8
) (SupportedModes
->UdmaMode
.Mode
);
2384 Status
= SetDeviceTransferMode (Instance
, IdeChannel
, IdeDevice
, &TransferMode
, NULL
);
2386 if (EFI_ERROR (Status
)) {
2387 DEBUG ((EFI_D_ERROR
, "Set transfer Mode Fail, Status = %r\n", Status
));
2390 } else if (SupportedModes
->MultiWordDmaMode
.Valid
) {
2391 TransferMode
.ModeCategory
= EFI_ATA_MODE_MDMA
;
2392 TransferMode
.ModeNumber
= (UINT8
) SupportedModes
->MultiWordDmaMode
.Mode
;
2393 Status
= SetDeviceTransferMode (Instance
, IdeChannel
, IdeDevice
, &TransferMode
, NULL
);
2395 if (EFI_ERROR (Status
)) {
2396 DEBUG ((EFI_D_ERROR
, "Set transfer Mode Fail, Status = %r\n", Status
));
2402 // Set Parameters for the device:
2404 // 2) Establish the block count for READ/WRITE MULTIPLE (EXT) command
2406 if (DeviceType
== EfiIdeHarddisk
) {
2408 // Init driver parameters
2410 DriveParameters
.Sector
= (UINT8
) ((ATA5_IDENTIFY_DATA
*)(&Buffer
.AtaData
))->sectors_per_track
;
2411 DriveParameters
.Heads
= (UINT8
) (((ATA5_IDENTIFY_DATA
*)(&Buffer
.AtaData
))->heads
- 1);
2412 DriveParameters
.MultipleSector
= (UINT8
) ((ATA5_IDENTIFY_DATA
*)(&Buffer
.AtaData
))->multi_sector_cmd_max_sct_cnt
;
2414 Status
= SetDriveParameters (Instance
, IdeChannel
, IdeDevice
, &DriveParameters
, NULL
);
2418 // Set IDE controller Timing Blocks in the PCI Configuration Space
2420 IdeInit
->SetTiming (IdeInit
, IdeChannel
, IdeDevice
, SupportedModes
);
2423 // IDE controller and IDE device timing is configured successfully.
2424 // Now insert the device into device list.
2426 Status
= CreateNewDeviceInfo (Instance
, IdeChannel
, IdeDevice
, DeviceType
, &Buffer
);
2427 if (EFI_ERROR (Status
)) {
2436 Initialize ATA host controller at IDE mode.
2438 The function is designed to initialize ATA host controller.
2440 @param[in] Instance A pointer to the ATA_ATAPI_PASS_THRU_INSTANCE instance.
2445 IdeModeInitialization (
2446 IN ATA_ATAPI_PASS_THRU_INSTANCE
*Instance
2451 EFI_IDE_CONTROLLER_INIT_PROTOCOL
*IdeInit
;
2452 EFI_PCI_IO_PROTOCOL
*PciIo
;
2455 BOOLEAN ChannelEnabled
;
2458 IdeInit
= Instance
->IdeControllerInit
;
2459 PciIo
= Instance
->PciIo
;
2460 EnumAll
= IdeInit
->EnumAll
;
2461 Channel
= IdeInit
->ChannelCount
;
2464 // Obtain IDE IO port registers' base addresses
2466 Status
= GetIdeRegisterIoAddr (PciIo
, Instance
->IdeRegisters
);
2467 if (EFI_ERROR (Status
)) {
2471 for (IdeChannel
= 0; IdeChannel
< Channel
; IdeChannel
++) {
2472 IdeInit
->NotifyPhase (IdeInit
, EfiIdeBeforeChannelEnumeration
, IdeChannel
);
2475 // now obtain channel information fron IdeControllerInit protocol.
2477 Status
= IdeInit
->GetChannelInfo (
2483 if (EFI_ERROR (Status
)) {
2484 DEBUG ((EFI_D_ERROR
, "[GetChannel, Status=%x]", Status
));
2488 if (!ChannelEnabled
) {
2492 ASSERT (MaxDevices
<= 2);
2494 // Now inform the IDE Controller Init Module.
2496 IdeInit
->NotifyPhase (IdeInit
, EfiIdeBeforeChannelReset
, IdeChannel
);
2499 // No reset channel function implemented.
2501 IdeInit
->NotifyPhase (IdeInit
, EfiIdeAfterChannelReset
, IdeChannel
);
2504 // Now inform the IDE Controller Init Module.
2506 IdeInit
->NotifyPhase (IdeInit
, EfiIdeBusBeforeDevicePresenceDetection
, IdeChannel
);
2509 // Detect all attached ATA devices and set the transfer mode for each device.
2511 DetectAndConfigIdeDevice (Instance
, IdeChannel
);
2515 // All configurations done! Notify IdeController to do post initialization
2516 // work such as saving IDE controller PCI settings for S3 resume
2518 IdeInit
->NotifyPhase (IdeInit
, EfiIdeBusPhaseMaximum
, 0);