2 Header file for IDE mode of ATA host controller.
4 Copyright (c) 2010 - 2011, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14 #ifndef __ATA_HC_IDE_MODE_H__
15 #define __ATA_HC_IDE_MODE_H__
30 /// PIO mode definition
40 // Multi word DMA definition
49 // UDMA mode definition
63 #define BMIC_NREAD BIT3
64 #define BMIC_START BIT0
65 #define BMIS_INTERRUPT BIT2
66 #define BMIS_ERROR BIT1
68 #define BMIC_OFFSET 0x00
69 #define BMIS_OFFSET 0x02
70 #define BMID_OFFSET 0x04
75 #define EFI_ATA_MODE_DEFAULT_PIO 0x00
76 #define EFI_ATA_MODE_FLOW_PIO 0x01
77 #define EFI_ATA_MODE_MDMA 0x04
78 #define EFI_ATA_MODE_UDMA 0x08
81 UINT32 RegionBaseAddr
;
88 UINT8 ModeCategory
: 5;
89 } EFI_ATA_TRANSFER_MODE
;
95 } EFI_ATA_DRIVE_PARMS
;
111 UINT16 BusMasterBaseAddr
;
115 // Bit definitions in Programming Interface byte of the Class Code field
116 // in PCI IDE controller's Configuration Space
118 #define IDE_PRIMARY_OPERATING_MODE BIT0
119 #define IDE_PRIMARY_PROGRAMMABLE_INDICATOR BIT1
120 #define IDE_SECONDARY_OPERATING_MODE BIT2
121 #define IDE_SECONDARY_PROGRAMMABLE_INDICATOR BIT3
124 Get IDE i/o port registers' base addresses by mode.
126 In 'Compatibility' mode, use fixed addresses.
127 In Native-PCI mode, get base addresses from BARs in the PCI IDE controller's
130 The steps to get IDE i/o port registers' base addresses for each channel
133 1. Examine the Programming Interface byte of the Class Code fields in PCI IDE
134 controller's Configuration Space to determine the operating mode.
136 2. a) In 'Compatibility' mode, use fixed addresses shown in the Table 1 below.
137 ___________________________________________
138 | | Command Block | Control Block |
139 | Channel | Registers | Registers |
140 |___________|_______________|_______________|
141 | Primary | 1F0h - 1F7h | 3F6h - 3F7h |
142 |___________|_______________|_______________|
143 | Secondary | 170h - 177h | 376h - 377h |
144 |___________|_______________|_______________|
146 Table 1. Compatibility resource mappings
148 b) In Native-PCI mode, IDE registers are mapped into IO space using the BARs
149 in IDE controller's PCI Configuration Space, shown in the Table 2 below.
150 ___________________________________________________
151 | | Command Block | Control Block |
152 | Channel | Registers | Registers |
153 |___________|___________________|___________________|
154 | Primary | BAR at offset 0x10| BAR at offset 0x14|
155 |___________|___________________|___________________|
156 | Secondary | BAR at offset 0x18| BAR at offset 0x1C|
157 |___________|___________________|___________________|
159 Table 2. BARs for Register Mapping
161 @param[in] PciIo Pointer to the EFI_PCI_IO_PROTOCOL instance
162 @param[in, out] IdeRegisters Pointer to EFI_IDE_REGISTERS which is used to
163 store the IDE i/o port registers' base addresses
165 @retval EFI_UNSUPPORTED Return this value when the BARs is not IO type
166 @retval EFI_SUCCESS Get the Base address successfully
167 @retval Other Read the pci configureation data error
172 GetIdeRegisterIoAddr (
173 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
174 IN OUT EFI_IDE_REGISTERS
*IdeRegisters
178 This function is used to send out ATAPI commands conforms to the Packet Command
179 with PIO Data In Protocol.
181 @param[in] PciIo Pointer to the EFI_PCI_IO_PROTOCOL instance
182 @param[in] IdeRegisters Pointer to EFI_IDE_REGISTERS which is used to
183 store the IDE i/o port registers' base addresses
184 @param[in] Channel The channel number of device.
185 @param[in] Device The device number of device.
186 @param[in] Packet A pointer to EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET data structure.
188 @retval EFI_SUCCESS send out the ATAPI packet command successfully
189 and device sends data successfully.
190 @retval EFI_DEVICE_ERROR the device failed to send data.
195 AtaPacketCommandExecute (
196 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
197 IN EFI_IDE_REGISTERS
*IdeRegisters
,
200 IN EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET
*Packet