3 This file contains URB request, each request is warpped in a
4 URB (Usb Request Block).
6 Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
7 Copyright (c) Microsoft Corporation.<BR>
8 SPDX-License-Identifier: BSD-2-Clause-Patent
15 Create a single QTD to hold the data.
17 @param Ehc The EHCI device.
18 @param Data The cpu memory address of current data not associated with a QTD.
19 @param DataPhy The pci bus address of current data not associated with a QTD.
20 @param DataLen The length of the data.
21 @param PktId Packet ID to use in the QTD.
22 @param Toggle Data toggle to use in the QTD.
23 @param MaxPacket Maximu packet length of the endpoint.
25 @return Created QTD or NULL if failed to create one.
47 Qtd
= UsbHcAllocateMem (Ehc
->MemPool
, sizeof (EHC_QTD
));
53 Qtd
->Signature
= EHC_QTD_SIG
;
57 InitializeListHead (&Qtd
->QtdList
);
60 QtdHw
->NextQtd
= QTD_LINK (NULL
, TRUE
);
61 QtdHw
->AltNext
= QTD_LINK (NULL
, TRUE
);
62 QtdHw
->Status
= QTD_STAT_ACTIVE
;
64 QtdHw
->ErrCnt
= QTD_MAX_ERR
;
66 QtdHw
->TotalBytes
= 0;
67 QtdHw
->DataToggle
= Toggle
;
70 // Fill in the buffer points
75 for (Index
= 0; Index
<= QTD_MAX_BUFFER
; Index
++) {
77 // Set the buffer point (Check page 41 EHCI Spec 1.0). No need to
78 // compute the offset and clear Reserved fields. This is already
79 // done in the data point.
81 QtdHw
->Page
[Index
] = EHC_LOW_32BIT (DataPhy
);
82 QtdHw
->PageHigh
[Index
] = EHC_HIGH_32BIT (DataPhy
);
84 ThisBufLen
= QTD_BUF_LEN
- (EHC_LOW_32BIT (DataPhy
) & QTD_BUF_MASK
);
86 if (Len
+ ThisBufLen
>= DataLen
) {
93 DataPhy
+= ThisBufLen
;
97 // Need to fix the last pointer if the Qtd can't hold all the
98 // user's data to make sure that the length is in the unit of
99 // max packets. If it can hold all the data, there is no such
103 Len
= Len
- Len
% MaxPacket
;
106 QtdHw
->TotalBytes
= (UINT32
)Len
;
114 Initialize the queue head for interrupt transfer,
115 that is, initialize the following three fields:
116 1. SplitXState in the Status field
120 @param Ep The queue head's related endpoint.
121 @param QhHw The queue head to initialize.
131 // Because UEFI interface can't utilitize an endpoint with
132 // poll rate faster than 1ms, only need to set one bit in
133 // the queue head. simple. But it may be changed later. If
134 // sub-1ms interrupt is supported, need to update the S-Mask
137 if (Ep
->DevSpeed
== EFI_USB_SPEED_HIGH
) {
138 QhHw
->SMask
= QH_MICROFRAME_0
;
143 // For low/full speed device, the transfer must go through
144 // the split transaction. Need to update three fields
145 // 1. SplitXState in the status
146 // 2. Microframe S-Mask
147 // 3. Microframe C-Mask
148 // UEFI USB doesn't exercise admission control. It simplely
149 // schedule the high speed transactions in microframe 0, and
150 // full/low speed transactions at microframe 1. This also
151 // avoid the use of FSTN.
153 QhHw
->SMask
= QH_MICROFRAME_1
;
154 QhHw
->CMask
= QH_MICROFRAME_3
| QH_MICROFRAME_4
| QH_MICROFRAME_5
;
158 Allocate and initialize a EHCI queue head.
160 @param Ehci The EHCI device.
161 @param Ep The endpoint to create queue head for.
163 @return Created queue head or NULL if failed to create one.
168 IN USB2_HC_DEV
*Ehci
,
175 Qh
= UsbHcAllocateMem (Ehci
->MemPool
, sizeof (EHC_QH
));
181 Qh
->Signature
= EHC_QH_SIG
;
183 Qh
->Interval
= Ep
->PollRate
;
185 InitializeListHead (&Qh
->Qtds
);
188 QhHw
->HorizonLink
= QH_LINK (NULL
, 0, TRUE
);
189 QhHw
->DeviceAddr
= Ep
->DevAddr
;
191 QhHw
->EpNum
= Ep
->EpAddr
;
192 QhHw
->EpSpeed
= Ep
->DevSpeed
;
194 QhHw
->ReclaimHead
= 0;
195 QhHw
->MaxPacketLen
= (UINT32
)Ep
->MaxPacket
;
197 QhHw
->NakReload
= QH_NAK_RELOAD
;
198 QhHw
->HubAddr
= Ep
->HubAddr
;
199 QhHw
->PortNum
= Ep
->HubPort
;
200 QhHw
->Multiplier
= 1;
201 QhHw
->DataToggle
= Ep
->Toggle
;
203 if (Ep
->DevSpeed
!= EFI_USB_SPEED_HIGH
) {
204 QhHw
->Status
|= QTD_STAT_DO_SS
;
208 case EHC_CTRL_TRANSFER
:
210 // Special initialization for the control transfer:
211 // 1. Control transfer initialize data toggle from each QTD
212 // 2. Set the Control Endpoint Flag (C) for low/full speed endpoint.
216 if (Ep
->DevSpeed
!= EFI_USB_SPEED_HIGH
) {
222 case EHC_INT_TRANSFER_ASYNC
:
223 case EHC_INT_TRANSFER_SYNC
:
225 // Special initialization for the interrupt transfer
226 // to set the S-Mask and C-Mask
229 EhcInitIntQh (Ep
, QhHw
);
232 case EHC_BULK_TRANSFER
:
233 if ((Ep
->DevSpeed
== EFI_USB_SPEED_HIGH
) && (Ep
->Direction
== EfiUsbDataOut
)) {
234 QhHw
->Status
|= QTD_STAT_DO_PING
;
244 Convert the poll interval from application to that
245 be used by EHCI interface data structure. Only need
246 to get the max 2^n that is less than interval. UEFI
247 can't support high speed endpoint with a interval less
248 than 8 microframe because interval is specified in
249 the unit of ms (millisecond).
251 @param Interval The interval to convert.
253 @return The converted interval.
268 // Find the index (1 based) of the highest non-zero bit
272 while (Interval
!= 0) {
277 return (UINTN
)1 << (BitCount
- 1);
283 @param Ehc The EHCI device.
284 @param Qtds The list head of the QTD.
297 BASE_LIST_FOR_EACH_SAFE (Entry
, Next
, Qtds
) {
298 Qtd
= EFI_LIST_CONTAINER (Entry
, EHC_QTD
, QtdList
);
300 RemoveEntryList (&Qtd
->QtdList
);
301 UsbHcFreeMem (Ehc
->MemPool
, Qtd
, sizeof (EHC_QTD
));
306 Free an allocated URB. It is possible for it to be partially inited.
308 @param Ehc The EHCI device.
309 @param Urb The URB to free.
318 EFI_PCI_IO_PROTOCOL
*PciIo
;
322 if (Urb
->RequestPhy
!= NULL
) {
323 PciIo
->Unmap (PciIo
, Urb
->RequestMap
);
326 if (Urb
->DataMap
!= NULL
) {
327 PciIo
->Unmap (PciIo
, Urb
->DataMap
);
330 if (Urb
->Qh
!= NULL
) {
332 // Ensure that this queue head has been unlinked from the
333 // schedule data structures. Free all the associated QTDs
335 EhcFreeQtds (Ehc
, &Urb
->Qh
->Qtds
);
336 UsbHcFreeMem (Ehc
->MemPool
, Urb
->Qh
, sizeof (EHC_QH
));
343 Create a list of QTDs for the URB.
345 @param Ehc The EHCI device.
346 @param Urb The URB to create QTDs for.
348 @retval EFI_OUT_OF_RESOURCES Failed to allocate resource for QTD.
349 @retval EFI_SUCCESS The QTDs are allocated for the URB.
368 EFI_PHYSICAL_ADDRESS PhyAddr
;
370 ASSERT ((Urb
!= NULL
) && (Urb
->Qh
!= NULL
));
373 // EHCI follows the alternet next QTD pointer if it meets
374 // a short read and the AlterNext pointer is valid. UEFI
375 // EHCI driver should terminate the transfer except the
382 AlterNext
= QTD_LINK (NULL
, TRUE
);
384 PhyAddr
= UsbHcGetPciAddressForHostMem (Ehc
->MemPool
, Ehc
->ShortReadStop
, sizeof (EHC_QTD
));
385 if (Ep
->Direction
== EfiUsbDataIn
) {
386 AlterNext
= QTD_LINK (PhyAddr
, FALSE
);
390 // Build the Setup and status packets for control transfer
392 if (Urb
->Ep
.Type
== EHC_CTRL_TRANSFER
) {
393 Len
= sizeof (EFI_USB_DEVICE_REQUEST
);
394 Qtd
= EhcCreateQtd (Ehc
, (UINT8
*)Urb
->Request
, (UINT8
*)Urb
->RequestPhy
, Len
, QTD_PID_SETUP
, 0, Ep
->MaxPacket
);
397 return EFI_OUT_OF_RESOURCES
;
400 InsertTailList (&Qh
->Qtds
, &Qtd
->QtdList
);
403 // Create the status packet now. Set the AlterNext to it. So, when
404 // EHCI meets a short control read, it can resume at the status stage.
405 // Use the opposite direction of the data stage, or IN if there is
408 if (Ep
->Direction
== EfiUsbDataIn
) {
409 Pid
= QTD_PID_OUTPUT
;
414 StatusQtd
= EhcCreateQtd (Ehc
, NULL
, NULL
, 0, Pid
, 1, Ep
->MaxPacket
);
416 if (StatusQtd
== NULL
) {
420 if (Ep
->Direction
== EfiUsbDataIn
) {
421 PhyAddr
= UsbHcGetPciAddressForHostMem (Ehc
->MemPool
, StatusQtd
, sizeof (EHC_QTD
));
422 AlterNext
= QTD_LINK (PhyAddr
, FALSE
);
429 // Build the data packets for all the transfers
431 if (Ep
->Direction
== EfiUsbDataIn
) {
434 Pid
= QTD_PID_OUTPUT
;
440 while (Len
< Urb
->DataLen
) {
443 (UINT8
*)Urb
->Data
+ Len
,
444 (UINT8
*)Urb
->DataPhy
+ Len
,
455 Qtd
->QtdHw
.AltNext
= AlterNext
;
456 InsertTailList (&Qh
->Qtds
, &Qtd
->QtdList
);
459 // Switch the Toggle bit if odd number of packets are included in the QTD.
461 if (((Qtd
->DataLen
+ Ep
->MaxPacket
- 1) / Ep
->MaxPacket
) % 2) {
462 Toggle
= (UINT8
)(1 - Toggle
);
469 // Insert the status packet for control transfer
471 if (Ep
->Type
== EHC_CTRL_TRANSFER
) {
472 InsertTailList (&Qh
->Qtds
, &StatusQtd
->QtdList
);
476 // OK, all the QTDs needed are created. Now, fix the NextQtd point
478 BASE_LIST_FOR_EACH (Entry
, &Qh
->Qtds
) {
479 Qtd
= EFI_LIST_CONTAINER (Entry
, EHC_QTD
, QtdList
);
482 // break if it is the last entry on the list
484 if (Entry
->ForwardLink
== &Qh
->Qtds
) {
488 NextQtd
= EFI_LIST_CONTAINER (Entry
->ForwardLink
, EHC_QTD
, QtdList
);
489 PhyAddr
= UsbHcGetPciAddressForHostMem (Ehc
->MemPool
, NextQtd
, sizeof (EHC_QTD
));
490 Qtd
->QtdHw
.NextQtd
= QTD_LINK (PhyAddr
, FALSE
);
494 // Link the QTDs to the queue head
496 NextQtd
= EFI_LIST_CONTAINER (Qh
->Qtds
.ForwardLink
, EHC_QTD
, QtdList
);
497 PhyAddr
= UsbHcGetPciAddressForHostMem (Ehc
->MemPool
, NextQtd
, sizeof (EHC_QTD
));
498 Qh
->QhHw
.NextQtd
= QTD_LINK (PhyAddr
, FALSE
);
502 EhcFreeQtds (Ehc
, &Qh
->Qtds
);
503 return EFI_OUT_OF_RESOURCES
;
507 Create a new URB and its associated QTD.
509 @param Ehc The EHCI device.
510 @param DevAddr The device address.
511 @param EpAddr Endpoint addrress & its direction.
512 @param DevSpeed The device speed.
513 @param Toggle Initial data toggle to use.
514 @param MaxPacket The max packet length of the endpoint.
515 @param Hub The transaction translator to use.
516 @param Type The transaction type.
517 @param Request The standard USB request for control transfer.
518 @param Data The user data to transfer.
519 @param DataLen The length of data buffer.
520 @param Callback The function to call when data is transferred.
521 @param Context The context to the callback.
522 @param Interval The interval for interrupt transfer.
524 @return Created URB or NULL.
535 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR
*Hub
,
537 IN EFI_USB_DEVICE_REQUEST
*Request
,
540 IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback
,
546 EFI_PHYSICAL_ADDRESS PhyAddr
;
547 EFI_PCI_IO_PROTOCOL_OPERATION MapOp
;
548 EFI_PCI_IO_PROTOCOL
*PciIo
;
554 Urb
= AllocateZeroPool (sizeof (URB
));
560 Urb
->Signature
= EHC_URB_SIG
;
561 InitializeListHead (&Urb
->UrbList
);
564 Ep
->DevAddr
= DevAddr
;
565 Ep
->EpAddr
= (UINT8
)(EpAddr
& 0x0F);
566 Ep
->Direction
= (((EpAddr
& 0x80) != 0) ? EfiUsbDataIn
: EfiUsbDataOut
);
567 Ep
->DevSpeed
= DevSpeed
;
568 Ep
->MaxPacket
= MaxPacket
;
573 if (DevSpeed
!= EFI_USB_SPEED_HIGH
) {
574 ASSERT (Hub
!= NULL
);
576 Ep
->HubAddr
= Hub
->TranslatorHubAddress
;
577 Ep
->HubPort
= Hub
->TranslatorPortNumber
;
582 Ep
->PollRate
= EhcConvertPollRate (Interval
);
584 Urb
->Request
= Request
;
586 Urb
->DataLen
= DataLen
;
587 Urb
->Callback
= Callback
;
588 Urb
->Context
= Context
;
591 Urb
->Qh
= EhcCreateQh (Ehc
, &Urb
->Ep
);
593 if (Urb
->Qh
== NULL
) {
598 // Map the request and user data
600 if (Request
!= NULL
) {
601 Len
= sizeof (EFI_USB_DEVICE_REQUEST
);
602 MapOp
= EfiPciIoOperationBusMasterRead
;
603 Status
= PciIo
->Map (PciIo
, MapOp
, Request
, &Len
, &PhyAddr
, &Map
);
605 if (EFI_ERROR (Status
) || (Len
!= sizeof (EFI_USB_DEVICE_REQUEST
))) {
609 Urb
->RequestPhy
= (VOID
*)((UINTN
)PhyAddr
);
610 Urb
->RequestMap
= Map
;
616 if (Ep
->Direction
== EfiUsbDataIn
) {
617 MapOp
= EfiPciIoOperationBusMasterWrite
;
619 MapOp
= EfiPciIoOperationBusMasterRead
;
622 Status
= PciIo
->Map (PciIo
, MapOp
, Data
, &Len
, &PhyAddr
, &Map
);
624 if (EFI_ERROR (Status
) || (Len
!= DataLen
)) {
628 Urb
->DataPhy
= (VOID
*)((UINTN
)PhyAddr
);
632 Status
= EhcCreateQtds (Ehc
, Urb
);
634 if (EFI_ERROR (Status
)) {
641 EhcFreeUrb (Ehc
, Urb
);