3 Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
4 Copyright (c) 2016, Linaro, Ltd. All rights reserved.<BR>
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
16 #include "NonDiscoverablePciDeviceIo.h"
18 #include <Library/DxeServicesTableLib.h>
20 #include <IndustryStandard/Acpi.h>
22 #include <Protocol/PciRootBridgeIo.h>
25 EFI_PHYSICAL_ADDRESS AllocAddress
;
27 EFI_PCI_IO_PROTOCOL_OPERATION Operation
;
29 } NON_DISCOVERABLE_PCI_DEVICE_MAP_INFO
;
32 Get the resource associated with BAR number 'BarIndex'.
34 @param Dev Point to the NON_DISCOVERABLE_PCI_DEVICE instance.
35 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
36 base address for the memory operation to perform.
37 @param Descriptor Points to the address space descriptor
42 IN NON_DISCOVERABLE_PCI_DEVICE
*Dev
,
44 OUT EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
**Descriptor
47 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Desc
;
49 if (BarIndex
< Dev
->BarOffset
) {
53 BarIndex
-= (UINT8
)Dev
->BarOffset
;
55 for (Desc
= Dev
->Device
->Resources
;
56 Desc
->Desc
!= ACPI_END_TAG_DESCRIPTOR
;
57 Desc
= (VOID
*)((UINT8
*)Desc
+ Desc
->Len
+ 3)) {
70 Reads from the memory space of a PCI controller. Returns either when the polling exit criteria is
71 satisfied or after a defined duration.
73 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
74 @param Width Signifies the width of the memory or I/O operations.
75 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
76 base address for the memory operation to perform.
77 @param Offset The offset within the selected BAR to start the memory operation.
78 @param Mask Mask used for the polling criteria.
79 @param Value The comparison value used for the polling exit criteria.
80 @param Delay The number of 100 ns units to poll.
81 @param Result Pointer to the last value read from the memory location.
88 IN EFI_PCI_IO_PROTOCOL
*This
,
89 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
99 return EFI_UNSUPPORTED
;
103 Reads from the memory space of a PCI controller. Returns either when the polling exit criteria is
104 satisfied or after a defined duration.
106 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
107 @param Width Signifies the width of the memory or I/O operations.
108 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
109 base address for the memory operation to perform.
110 @param Offset The offset within the selected BAR to start the memory operation.
111 @param Mask Mask used for the polling criteria.
112 @param Value The comparison value used for the polling exit criteria.
113 @param Delay The number of 100 ns units to poll.
114 @param Result Pointer to the last value read from the memory location.
121 IN EFI_PCI_IO_PROTOCOL
*This
,
122 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
132 return EFI_UNSUPPORTED
;
136 Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
138 @param Width Signifies the width of the memory or I/O operations.
139 @param Count The number of memory or I/O operations to perform.
140 @param DstStride The stride of the destination buffer.
141 @param Dst For read operations, the destination buffer to store the results. For write
142 operations, the destination buffer to write data to.
143 @param SrcStride The stride of the source buffer.
144 @param Src For read operations, the source buffer to read data from. For write
145 operations, the source buffer to write data from.
147 @retval EFI_SUCCESS The data was read from or written to the PCI controller.
148 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
155 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
163 volatile UINT8
*Dst8
;
164 volatile UINT16
*Dst16
;
165 volatile UINT32
*Dst32
;
166 volatile CONST UINT8
*Src8
;
167 volatile CONST UINT16
*Src16
;
168 volatile CONST UINT32
*Src32
;
171 // Loop for each iteration and move the data
173 switch (Width
& 0x3) {
174 case EfiPciWidthUint8
:
177 for (;Count
> 0; Count
--, Dst8
+= DstStride
, Src8
+= SrcStride
) {
181 case EfiPciWidthUint16
:
182 Dst16
= (UINT16
*)Dst
;
183 Src16
= (UINT16
*)Src
;
184 for (;Count
> 0; Count
--, Dst16
+= DstStride
, Src16
+= SrcStride
) {
188 case EfiPciWidthUint32
:
189 Dst32
= (UINT32
*)Dst
;
190 Src32
= (UINT32
*)Src
;
191 for (;Count
> 0; Count
--, Dst32
+= DstStride
, Src32
+= SrcStride
) {
196 return EFI_INVALID_PARAMETER
;
203 Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
205 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
206 @param Width Signifies the width of the memory or I/O operations.
207 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
208 base address for the memory or I/O operation to perform.
209 @param Offset The offset within the selected BAR to start the memory or I/O operation.
210 @param Count The number of memory or I/O operations to perform.
211 @param Buffer For read operations, the destination buffer to store the results. For write
212 operations, the source buffer to write data from.
214 @retval EFI_SUCCESS The data was read from or written to the PCI controller.
215 @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
216 @retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not
217 valid for the PCI BAR specified by BarIndex.
218 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
219 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
226 IN EFI_PCI_IO_PROTOCOL
*This
,
227 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
234 NON_DISCOVERABLE_PCI_DEVICE
*Dev
;
237 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Desc
;
240 if (Buffer
== NULL
) {
241 return EFI_INVALID_PARAMETER
;
244 Dev
= NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This
);
247 // Only allow accesses to the BARs we emulate
249 Status
= GetBarResource (Dev
, BarIndex
, &Desc
);
250 if (EFI_ERROR (Status
)) {
254 if (Offset
+ (Count
<< (Width
& 0x3)) > Desc
->AddrLen
) {
255 return EFI_UNSUPPORTED
;
258 Address
= (VOID
*)(UINTN
)(Desc
->AddrRangeMin
+ Offset
);
259 AlignMask
= (1 << (Width
& 0x03)) - 1;
260 if ((UINTN
)Address
& AlignMask
) {
261 return EFI_INVALID_PARAMETER
;
265 case EfiPciIoWidthUint8
:
266 case EfiPciIoWidthUint16
:
267 case EfiPciIoWidthUint32
:
268 case EfiPciIoWidthUint64
:
269 return PciIoMemRW (Width
, Count
, 1, Buffer
, 1, Address
);
271 case EfiPciIoWidthFifoUint8
:
272 case EfiPciIoWidthFifoUint16
:
273 case EfiPciIoWidthFifoUint32
:
274 case EfiPciIoWidthFifoUint64
:
275 return PciIoMemRW (Width
, Count
, 1, Buffer
, 0, Address
);
277 case EfiPciIoWidthFillUint8
:
278 case EfiPciIoWidthFillUint16
:
279 case EfiPciIoWidthFillUint32
:
280 case EfiPciIoWidthFillUint64
:
281 return PciIoMemRW (Width
, Count
, 0, Buffer
, 1, Address
);
286 return EFI_INVALID_PARAMETER
;
290 Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
292 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
293 @param Width Signifies the width of the memory or I/O operations.
294 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
295 base address for the memory or I/O operation to perform.
296 @param Offset The offset within the selected BAR to start the memory or I/O operation.
297 @param Count The number of memory or I/O operations to perform.
298 @param Buffer For read operations, the destination buffer to store the results. For write
299 operations, the source buffer to write data from.
301 @retval EFI_SUCCESS The data was read from or written to the PCI controller.
302 @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
303 @retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not
304 valid for the PCI BAR specified by BarIndex.
305 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
306 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
313 IN EFI_PCI_IO_PROTOCOL
*This
,
314 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
321 NON_DISCOVERABLE_PCI_DEVICE
*Dev
;
324 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Desc
;
327 if (Buffer
== NULL
) {
328 return EFI_INVALID_PARAMETER
;
331 Dev
= NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This
);
334 // Only allow accesses to the BARs we emulate
336 Status
= GetBarResource (Dev
, BarIndex
, &Desc
);
337 if (EFI_ERROR (Status
)) {
341 if (Offset
+ (Count
<< (Width
& 0x3)) > Desc
->AddrLen
) {
342 return EFI_UNSUPPORTED
;
345 Address
= (VOID
*)(UINTN
)(Desc
->AddrRangeMin
+ Offset
);
346 AlignMask
= (1 << (Width
& 0x03)) - 1;
347 if ((UINTN
)Address
& AlignMask
) {
348 return EFI_INVALID_PARAMETER
;
352 case EfiPciIoWidthUint8
:
353 case EfiPciIoWidthUint16
:
354 case EfiPciIoWidthUint32
:
355 case EfiPciIoWidthUint64
:
356 return PciIoMemRW (Width
, Count
, 1, Address
, 1, Buffer
);
358 case EfiPciIoWidthFifoUint8
:
359 case EfiPciIoWidthFifoUint16
:
360 case EfiPciIoWidthFifoUint32
:
361 case EfiPciIoWidthFifoUint64
:
362 return PciIoMemRW (Width
, Count
, 0, Address
, 1, Buffer
);
364 case EfiPciIoWidthFillUint8
:
365 case EfiPciIoWidthFillUint16
:
366 case EfiPciIoWidthFillUint32
:
367 case EfiPciIoWidthFillUint64
:
368 return PciIoMemRW (Width
, Count
, 1, Address
, 0, Buffer
);
373 return EFI_INVALID_PARAMETER
;
377 Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
379 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
380 @param Width Signifies the width of the memory or I/O operations.
381 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
382 base address for the memory or I/O operation to perform.
383 @param Offset The offset within the selected BAR to start the memory or I/O operation.
384 @param Count The number of memory or I/O operations to perform.
385 @param Buffer For read operations, the destination buffer to store the results. For write
386 operations, the source buffer to write data from.
393 IN EFI_PCI_IO_PROTOCOL
*This
,
394 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
402 return EFI_UNSUPPORTED
;
406 Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
408 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
409 @param Width Signifies the width of the memory or I/O operations.
410 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
411 base address for the memory or I/O operation to perform.
412 @param Offset The offset within the selected BAR to start the memory or I/O operation.
413 @param Count The number of memory or I/O operations to perform.
414 @param Buffer For read operations, the destination buffer to store the results. For write
415 operations, the source buffer to write data from.
422 IN EFI_PCI_IO_PROTOCOL
*This
,
423 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
431 return EFI_UNSUPPORTED
;
435 Enable a PCI driver to access PCI config space.
437 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
438 @param Width Signifies the width of the memory or I/O operations.
439 @param Offset The offset within the selected BAR to start the memory or I/O operation.
440 @param Count The number of memory or I/O operations to perform.
441 @param Buffer For read operations, the destination buffer to store the results. For write
442 operations, the source buffer to write data from.
449 IN EFI_PCI_IO_PROTOCOL
*This
,
450 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
456 NON_DISCOVERABLE_PCI_DEVICE
*Dev
;
460 if (Width
< 0 || Width
>= EfiPciIoWidthMaximum
|| Buffer
== NULL
) {
461 return EFI_INVALID_PARAMETER
;
464 Dev
= NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This
);
465 Address
= (UINT8
*)&Dev
->ConfigSpace
+ Offset
;
466 Length
= Count
<< ((UINTN
)Width
& 0x3);
468 if (Offset
>= sizeof (Dev
->ConfigSpace
)) {
469 ZeroMem (Buffer
, Length
);
473 if (Offset
+ Length
> sizeof (Dev
->ConfigSpace
)) {
475 // Read all zeroes for config space accesses beyond the first
478 Length
-= sizeof (Dev
->ConfigSpace
) - Offset
;
479 ZeroMem ((UINT8
*)Buffer
+ sizeof (Dev
->ConfigSpace
) - Offset
, Length
);
481 Count
-= Length
>> ((UINTN
)Width
& 0x3);
483 return PciIoMemRW (Width
, Count
, 1, Buffer
, 1, Address
);
487 Enable a PCI driver to access PCI config space.
489 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
490 @param Width Signifies the width of the memory or I/O operations.
491 @param Offset The offset within the selected BAR to start the memory or I/O operation.
492 @param Count The number of memory or I/O operations to perform.
493 @param Buffer For read operations, the destination buffer to store the results. For write
494 operations, the source buffer to write data from
496 @retval EFI_SUCCESS The data was read from or written to the PCI controller.
497 @retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not
498 valid for the PCI BAR specified by BarIndex.
499 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
506 IN EFI_PCI_IO_PROTOCOL
*This
,
507 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
513 NON_DISCOVERABLE_PCI_DEVICE
*Dev
;
516 if (Width
< 0 || Width
>= EfiPciIoWidthMaximum
|| Buffer
== NULL
) {
517 return EFI_INVALID_PARAMETER
;
520 Dev
= NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This
);
521 Address
= (UINT8
*)&Dev
->ConfigSpace
+ Offset
;
523 if (Offset
+ (Count
<< ((UINTN
)Width
& 0x3)) > sizeof (Dev
->ConfigSpace
)) {
524 return EFI_UNSUPPORTED
;
527 return PciIoMemRW (Width
, Count
, 1, Address
, 1, Buffer
);
531 Enables a PCI driver to copy one region of PCI memory space to another region of PCI
534 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
535 @param Width Signifies the width of the memory operations.
536 @param DestBarIndex The BAR index in the standard PCI Configuration header to use as the
537 base address for the memory operation to perform.
538 @param DestOffset The destination offset within the BAR specified by DestBarIndex to
539 start the memory writes for the copy operation.
540 @param SrcBarIndex The BAR index in the standard PCI Configuration header to use as the
541 base address for the memory operation to perform.
542 @param SrcOffset The source offset within the BAR specified by SrcBarIndex to start
543 the memory reads for the copy operation.
544 @param Count The number of memory operations to perform. Bytes moved is Width
545 size * Count, starting at DestOffset and SrcOffset.
552 IN EFI_PCI_IO_PROTOCOL
*This
,
553 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
554 IN UINT8 DestBarIndex
,
555 IN UINT64 DestOffset
,
556 IN UINT8 SrcBarIndex
,
562 return EFI_UNSUPPORTED
;
566 Provides the PCI controller-specific addresses needed to access system memory.
568 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
569 @param Operation Indicates if the bus master is going to read or write to system memory.
570 @param HostAddress The system memory address to map to the PCI controller.
571 @param NumberOfBytes On input the number of bytes to map. On output the number of bytes
573 @param DeviceAddress The resulting map address for the bus master PCI controller to use to
574 access the hosts HostAddress.
575 @param Mapping A resulting value to pass to Unmap().
577 @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
578 @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.
579 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
580 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
581 @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
588 IN EFI_PCI_IO_PROTOCOL
*This
,
589 IN EFI_PCI_IO_PROTOCOL_OPERATION Operation
,
590 IN VOID
*HostAddress
,
591 IN OUT UINTN
*NumberOfBytes
,
592 OUT EFI_PHYSICAL_ADDRESS
*DeviceAddress
,
596 NON_DISCOVERABLE_PCI_DEVICE
*Dev
;
598 NON_DISCOVERABLE_PCI_DEVICE_MAP_INFO
*MapInfo
;
601 // If HostAddress exceeds 4 GB, and this device does not support 64-bit DMA
602 // addressing, we need to allocate a bounce buffer and copy over the data.
604 Dev
= NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This
);
605 if ((Dev
->Attributes
& EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE
) == 0 &&
606 (EFI_PHYSICAL_ADDRESS
)(UINTN
)HostAddress
+ *NumberOfBytes
> SIZE_4GB
) {
609 // Bounce buffering is not possible for consistent mappings
611 if (Operation
== EfiPciIoOperationBusMasterCommonBuffer
) {
612 return EFI_UNSUPPORTED
;
615 MapInfo
= AllocatePool (sizeof *MapInfo
);
616 if (MapInfo
== NULL
) {
617 return EFI_OUT_OF_RESOURCES
;
620 MapInfo
->AllocAddress
= MAX_UINT32
;
621 MapInfo
->HostAddress
= HostAddress
;
622 MapInfo
->Operation
= Operation
;
623 MapInfo
->NumberOfBytes
= *NumberOfBytes
;
625 Status
= gBS
->AllocatePages (AllocateMaxAddress
, EfiBootServicesData
,
626 EFI_SIZE_TO_PAGES (MapInfo
->NumberOfBytes
),
627 &MapInfo
->AllocAddress
);
628 if (EFI_ERROR (Status
)) {
630 // If we fail here, it is likely because the system has no memory below
631 // 4 GB to begin with. There is not much we can do about that other than
632 // fail the map request.
635 return EFI_DEVICE_ERROR
;
637 if (Operation
== EfiPciIoOperationBusMasterRead
) {
638 gBS
->CopyMem ((VOID
*)(UINTN
)MapInfo
->AllocAddress
, HostAddress
,
641 *DeviceAddress
= MapInfo
->AllocAddress
;
644 *DeviceAddress
= (EFI_PHYSICAL_ADDRESS
)(UINTN
)HostAddress
;
651 Completes the Map() operation and releases any corresponding resources.
653 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
654 @param Mapping The mapping value returned from Map().
656 @retval EFI_SUCCESS The range was unmapped.
663 IN EFI_PCI_IO_PROTOCOL
*This
,
667 NON_DISCOVERABLE_PCI_DEVICE_MAP_INFO
*MapInfo
;
670 if (MapInfo
!= NULL
) {
671 if (MapInfo
->Operation
== EfiPciIoOperationBusMasterWrite
) {
672 gBS
->CopyMem (MapInfo
->HostAddress
, (VOID
*)(UINTN
)MapInfo
->AllocAddress
,
673 MapInfo
->NumberOfBytes
);
675 gBS
->FreePages (MapInfo
->AllocAddress
,
676 EFI_SIZE_TO_PAGES (MapInfo
->NumberOfBytes
));
685 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
686 @param Type This parameter is not used and must be ignored.
687 @param MemoryType The type of memory to allocate, EfiBootServicesData or
688 EfiRuntimeServicesData.
689 @param Pages The number of pages to allocate.
690 @param HostAddress A pointer to store the base system memory address of the
692 @param Attributes The requested bit mask of attributes for the allocated range.
694 @retval EFI_SUCCESS The requested memory pages were allocated.
695 @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are
696 MEMORY_WRITE_COMBINE and MEMORY_CACHED.
697 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
698 @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
704 CoherentPciIoAllocateBuffer (
705 IN EFI_PCI_IO_PROTOCOL
*This
,
706 IN EFI_ALLOCATE_TYPE Type
,
707 IN EFI_MEMORY_TYPE MemoryType
,
709 OUT VOID
**HostAddress
,
713 NON_DISCOVERABLE_PCI_DEVICE
*Dev
;
714 EFI_PHYSICAL_ADDRESS AllocAddress
;
715 EFI_ALLOCATE_TYPE AllocType
;
718 if ((Attributes
& ~(EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE
|
719 EFI_PCI_ATTRIBUTE_MEMORY_CACHED
)) != 0) {
720 return EFI_UNSUPPORTED
;
724 // Allocate below 4 GB if the dual address cycle attribute has not
725 // been set. If the system has no memory available below 4 GB, there
726 // is little we can do except propagate the error.
728 Dev
= NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This
);
729 if ((Dev
->Attributes
& EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE
) == 0) {
730 AllocAddress
= MAX_UINT32
;
731 AllocType
= AllocateMaxAddress
;
733 AllocType
= AllocateAnyPages
;
736 Status
= gBS
->AllocatePages (AllocType
, MemoryType
, Pages
, &AllocAddress
);
737 if (!EFI_ERROR (Status
)) {
738 *HostAddress
= (VOID
*)(UINTN
)AllocAddress
;
744 Frees memory that was allocated in function CoherentPciIoAllocateBuffer ().
746 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
747 @param Pages The number of pages to free.
748 @param HostAddress The base system memory address of the allocated range.
750 @retval EFI_SUCCESS The requested memory pages were freed.
756 CoherentPciIoFreeBuffer (
757 IN EFI_PCI_IO_PROTOCOL
*This
,
762 FreePages (HostAddress
, Pages
);
767 Frees memory that was allocated in function NonCoherentPciIoAllocateBuffer ().
769 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
770 @param Pages The number of pages to free.
771 @param HostAddress The base system memory address of the allocated range.
773 @retval EFI_SUCCESS The requested memory pages were freed.
774 @retval others The operation contain some errors.
780 NonCoherentPciIoFreeBuffer (
781 IN EFI_PCI_IO_PROTOCOL
*This
,
786 NON_DISCOVERABLE_PCI_DEVICE
*Dev
;
789 NON_DISCOVERABLE_DEVICE_UNCACHED_ALLOCATION
*Alloc
;
792 Dev
= NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This
);
798 // Find the uncached allocation list entry associated
799 // with this allocation
801 for (Entry
= Dev
->UncachedAllocationList
.ForwardLink
;
802 Entry
!= &Dev
->UncachedAllocationList
;
803 Entry
= Entry
->ForwardLink
) {
805 Alloc
= BASE_CR (Entry
, NON_DISCOVERABLE_DEVICE_UNCACHED_ALLOCATION
, List
);
806 if (Alloc
->HostAddress
== HostAddress
&& Alloc
->NumPages
== Pages
) {
808 // We are freeing the exact allocation we were given
809 // before by AllocateBuffer()
817 ASSERT_EFI_ERROR (EFI_NOT_FOUND
);
818 return EFI_NOT_FOUND
;
821 RemoveEntryList (&Alloc
->List
);
823 Status
= gDS
->SetMemorySpaceAttributes (
824 (EFI_PHYSICAL_ADDRESS
)(UINTN
)HostAddress
,
825 EFI_PAGES_TO_SIZE (Pages
),
827 if (EFI_ERROR (Status
)) {
832 // If we fail to restore the original attributes, it is better to leak the
833 // memory than to return it to the heap
835 FreePages (HostAddress
, Pages
);
845 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
846 @param Type This parameter is not used and must be ignored.
847 @param MemoryType The type of memory to allocate, EfiBootServicesData or
848 EfiRuntimeServicesData.
849 @param Pages The number of pages to allocate.
850 @param HostAddress A pointer to store the base system memory address of the
852 @param Attributes The requested bit mask of attributes for the allocated range.
854 @retval EFI_SUCCESS The requested memory pages were allocated.
855 @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are
856 MEMORY_WRITE_COMBINE and MEMORY_CACHED.
857 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
858 @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
864 NonCoherentPciIoAllocateBuffer (
865 IN EFI_PCI_IO_PROTOCOL
*This
,
866 IN EFI_ALLOCATE_TYPE Type
,
867 IN EFI_MEMORY_TYPE MemoryType
,
869 OUT VOID
**HostAddress
,
873 NON_DISCOVERABLE_PCI_DEVICE
*Dev
;
874 EFI_GCD_MEMORY_SPACE_DESCRIPTOR GcdDescriptor
;
877 NON_DISCOVERABLE_DEVICE_UNCACHED_ALLOCATION
*Alloc
;
880 Dev
= NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This
);
882 Status
= CoherentPciIoAllocateBuffer (This
, Type
, MemoryType
, Pages
,
883 &AllocAddress
, Attributes
);
884 if (EFI_ERROR (Status
)) {
888 Status
= gDS
->GetMemorySpaceDescriptor (
889 (EFI_PHYSICAL_ADDRESS
)(UINTN
)AllocAddress
,
891 if (EFI_ERROR (Status
)) {
895 if ((GcdDescriptor
.Capabilities
& (EFI_MEMORY_WC
| EFI_MEMORY_UC
)) == 0) {
896 Status
= EFI_UNSUPPORTED
;
901 // Set the preferred memory attributes
903 if ((Attributes
& EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE
) != 0 ||
904 (GcdDescriptor
.Capabilities
& EFI_MEMORY_UC
) == 0) {
906 // Use write combining if it was requested, or if it is the only
907 // type supported by the region.
909 MemType
= EFI_MEMORY_WC
;
911 MemType
= EFI_MEMORY_UC
;
914 Alloc
= AllocatePool (sizeof *Alloc
);
919 Alloc
->HostAddress
= AllocAddress
;
920 Alloc
->NumPages
= Pages
;
921 Alloc
->Attributes
= GcdDescriptor
.Attributes
;
924 // Record this allocation in the linked list, so we
925 // can restore the memory space attributes later
927 InsertHeadList (&Dev
->UncachedAllocationList
, &Alloc
->List
);
929 Status
= gDS
->SetMemorySpaceAttributes (
930 (EFI_PHYSICAL_ADDRESS
)(UINTN
)AllocAddress
,
931 EFI_PAGES_TO_SIZE (Pages
),
933 if (EFI_ERROR (Status
)) {
937 Status
= mCpu
->FlushDataCache (
939 (EFI_PHYSICAL_ADDRESS
)(UINTN
)AllocAddress
,
940 EFI_PAGES_TO_SIZE (Pages
),
941 EfiCpuFlushTypeInvalidate
);
942 if (EFI_ERROR (Status
)) {
946 *HostAddress
= AllocAddress
;
951 RemoveEntryList (&Alloc
->List
);
955 CoherentPciIoFreeBuffer (This
, Pages
, AllocAddress
);
960 Provides the PCI controller-specific addresses needed to access system memory.
962 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
963 @param Operation Indicates if the bus master is going to read or write to system memory.
964 @param HostAddress The system memory address to map to the PCI controller.
965 @param NumberOfBytes On input the number of bytes to map. On output the number of bytes
967 @param DeviceAddress The resulting map address for the bus master PCI controller to use to
968 access the hosts HostAddress.
969 @param Mapping A resulting value to pass to Unmap().
971 @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
972 @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.
973 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
974 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
975 @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
981 NonCoherentPciIoMap (
982 IN EFI_PCI_IO_PROTOCOL
*This
,
983 IN EFI_PCI_IO_PROTOCOL_OPERATION Operation
,
984 IN VOID
*HostAddress
,
985 IN OUT UINTN
*NumberOfBytes
,
986 OUT EFI_PHYSICAL_ADDRESS
*DeviceAddress
,
990 NON_DISCOVERABLE_PCI_DEVICE
*Dev
;
992 NON_DISCOVERABLE_PCI_DEVICE_MAP_INFO
*MapInfo
;
995 EFI_GCD_MEMORY_SPACE_DESCRIPTOR GcdDescriptor
;
998 MapInfo
= AllocatePool (sizeof *MapInfo
);
999 if (MapInfo
== NULL
) {
1000 return EFI_OUT_OF_RESOURCES
;
1003 MapInfo
->HostAddress
= HostAddress
;
1004 MapInfo
->Operation
= Operation
;
1005 MapInfo
->NumberOfBytes
= *NumberOfBytes
;
1007 Dev
= NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This
);
1010 // If this device does not support 64-bit DMA addressing, we need to allocate
1011 // a bounce buffer and copy over the data in case HostAddress >= 4 GB.
1013 Bounce
= ((Dev
->Attributes
& EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE
) == 0 &&
1014 (EFI_PHYSICAL_ADDRESS
)(UINTN
)HostAddress
+ *NumberOfBytes
> SIZE_4GB
);
1017 switch (Operation
) {
1018 case EfiPciIoOperationBusMasterRead
:
1019 case EfiPciIoOperationBusMasterWrite
:
1021 // For streaming DMA, it is sufficient if the buffer is aligned to
1022 // the CPUs DMA buffer alignment.
1024 AlignMask
= mCpu
->DmaBufferAlignment
- 1;
1025 if ((((UINTN
) HostAddress
| *NumberOfBytes
) & AlignMask
) == 0) {
1030 case EfiPciIoOperationBusMasterCommonBuffer
:
1032 // Check whether the host address refers to an uncached mapping.
1034 Status
= gDS
->GetMemorySpaceDescriptor (
1035 (EFI_PHYSICAL_ADDRESS
)(UINTN
)HostAddress
,
1037 if (EFI_ERROR (Status
) ||
1038 (GcdDescriptor
.Attributes
& (EFI_MEMORY_WB
|EFI_MEMORY_WT
)) != 0) {
1049 if (Operation
== EfiPciIoOperationBusMasterCommonBuffer
) {
1050 Status
= EFI_DEVICE_ERROR
;
1054 Status
= NonCoherentPciIoAllocateBuffer (This
, AllocateAnyPages
,
1055 EfiBootServicesData
, EFI_SIZE_TO_PAGES (MapInfo
->NumberOfBytes
),
1056 &AllocAddress
, EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE
);
1057 if (EFI_ERROR (Status
)) {
1060 MapInfo
->AllocAddress
= (EFI_PHYSICAL_ADDRESS
)(UINTN
)AllocAddress
;
1061 if (Operation
== EfiPciIoOperationBusMasterRead
) {
1062 gBS
->CopyMem (AllocAddress
, HostAddress
, *NumberOfBytes
);
1064 *DeviceAddress
= MapInfo
->AllocAddress
;
1066 MapInfo
->AllocAddress
= 0;
1067 *DeviceAddress
= (EFI_PHYSICAL_ADDRESS
)(UINTN
)HostAddress
;
1070 // We are not using a bounce buffer: the mapping is sufficiently
1071 // aligned to allow us to simply flush the caches. Note that cleaning
1072 // the caches is necessary for both data directions:
1073 // - for bus master read, we want the latest data to be present
1075 // - for bus master write, we don't want any stale dirty cachelines that
1076 // may be written back unexpectedly, and clobber the data written to
1077 // main memory by the device.
1079 mCpu
->FlushDataCache (mCpu
, (EFI_PHYSICAL_ADDRESS
)(UINTN
)HostAddress
,
1080 *NumberOfBytes
, EfiCpuFlushTypeWriteBack
);
1093 Completes the Map() operation and releases any corresponding resources.
1095 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
1096 @param Mapping The mapping value returned from Map().
1098 @retval EFI_SUCCESS The range was unmapped.
1104 NonCoherentPciIoUnmap (
1105 IN EFI_PCI_IO_PROTOCOL
*This
,
1109 NON_DISCOVERABLE_PCI_DEVICE_MAP_INFO
*MapInfo
;
1111 if (Mapping
== NULL
) {
1112 return EFI_DEVICE_ERROR
;
1116 if (MapInfo
->AllocAddress
!= 0) {
1118 // We are using a bounce buffer: copy back the data if necessary,
1119 // and free the buffer.
1121 if (MapInfo
->Operation
== EfiPciIoOperationBusMasterWrite
) {
1122 gBS
->CopyMem (MapInfo
->HostAddress
, (VOID
*)(UINTN
)MapInfo
->AllocAddress
,
1123 MapInfo
->NumberOfBytes
);
1125 NonCoherentPciIoFreeBuffer (This
,
1126 EFI_SIZE_TO_PAGES (MapInfo
->NumberOfBytes
),
1127 (VOID
*)(UINTN
)MapInfo
->AllocAddress
);
1130 // We are *not* using a bounce buffer: if this is a bus master write,
1131 // we have to invalidate the caches so the CPU will see the uncached
1132 // data written by the device.
1134 if (MapInfo
->Operation
== EfiPciIoOperationBusMasterWrite
) {
1135 mCpu
->FlushDataCache (mCpu
,
1136 (EFI_PHYSICAL_ADDRESS
)(UINTN
)MapInfo
->HostAddress
,
1137 MapInfo
->NumberOfBytes
, EfiCpuFlushTypeInvalidate
);
1145 Flushes all PCI posted write transactions from a PCI host bridge to system memory.
1147 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
1154 IN EFI_PCI_IO_PROTOCOL
*This
1161 Retrieves this PCI controller's current PCI bus number, device number, and function number.
1163 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
1164 @param SegmentNumber The PCI controller's current PCI segment number.
1165 @param BusNumber The PCI controller's current PCI bus number.
1166 @param DeviceNumber The PCI controller's current PCI device number.
1167 @param FunctionNumber The PCI controller's current PCI function number.
1169 @retval EFI_SUCCESS The PCI controller location was returned.
1170 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
1177 IN EFI_PCI_IO_PROTOCOL
*This
,
1178 OUT UINTN
*SegmentNumber
,
1179 OUT UINTN
*BusNumber
,
1180 OUT UINTN
*DeviceNumber
,
1181 OUT UINTN
*FunctionNumber
1184 if (SegmentNumber
== NULL
||
1185 BusNumber
== NULL
||
1186 DeviceNumber
== NULL
||
1187 FunctionNumber
== NULL
) {
1188 return EFI_INVALID_PARAMETER
;
1194 *FunctionNumber
= 0;
1200 Performs an operation on the attributes that this PCI controller supports. The operations include
1201 getting the set of supported attributes, retrieving the current attributes, setting the current
1202 attributes, enabling attributes, and disabling attributes.
1204 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
1205 @param Operation The operation to perform on the attributes for this PCI controller.
1206 @param Attributes The mask of attributes that are used for Set, Enable, and Disable
1208 @param Result A pointer to the result mask of attributes that are returned for the Get
1209 and Supported operations.
1211 @retval EFI_SUCCESS The operation on the PCI controller's attributes was completed.
1212 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
1213 @retval EFI_UNSUPPORTED one or more of the bits set in
1214 Attributes are not supported by this PCI controller or one of
1215 its parent bridges when Operation is Set, Enable or Disable.
1222 IN EFI_PCI_IO_PROTOCOL
*This
,
1223 IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation
,
1224 IN UINT64 Attributes
,
1225 OUT UINT64
*Result OPTIONAL
1228 NON_DISCOVERABLE_PCI_DEVICE
*Dev
;
1231 Dev
= NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This
);
1234 switch (Operation
) {
1235 case EfiPciIoAttributeOperationGet
:
1236 if (Result
== NULL
) {
1237 return EFI_INVALID_PARAMETER
;
1239 *Result
= Dev
->Attributes
;
1242 case EfiPciIoAttributeOperationSupported
:
1243 if (Result
== NULL
) {
1244 return EFI_INVALID_PARAMETER
;
1246 *Result
= EFI_PCI_DEVICE_ENABLE
| EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE
;
1249 case EfiPciIoAttributeOperationEnable
:
1250 Attributes
|= Dev
->Attributes
;
1251 case EfiPciIoAttributeOperationSet
:
1252 Enable
= ((~Dev
->Attributes
& Attributes
) & EFI_PCI_DEVICE_ENABLE
) != 0;
1253 Dev
->Attributes
= Attributes
;
1256 case EfiPciIoAttributeOperationDisable
:
1257 Dev
->Attributes
&= ~Attributes
;
1261 return EFI_INVALID_PARAMETER
;
1265 // If we're setting any of the EFI_PCI_DEVICE_ENABLE bits, perform
1266 // the device specific initialization now.
1268 if (Enable
&& !Dev
->Enabled
&& Dev
->Device
->Initialize
!= NULL
) {
1269 Dev
->Device
->Initialize (Dev
->Device
);
1270 Dev
->Enabled
= TRUE
;
1276 Gets the attributes that this PCI controller supports setting on a BAR using
1277 SetBarAttributes(), and retrieves the list of resource descriptors for a BAR.
1279 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
1280 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
1281 base address for resource range. The legal range for this field is 0..5.
1282 @param Supports A pointer to the mask of attributes that this PCI controller supports
1283 setting for this BAR with SetBarAttributes().
1284 @param Resources A pointer to the ACPI 2.0 resource descriptors that describe the current
1285 configuration of this BAR of the PCI controller.
1287 @retval EFI_SUCCESS If Supports is not NULL, then the attributes that the PCI
1288 controller supports are returned in Supports. If Resources
1289 is not NULL, then the ACPI 2.0 resource descriptors that the PCI
1290 controller is currently using are returned in Resources.
1291 @retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL.
1292 @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
1293 @retval EFI_OUT_OF_RESOURCES There are not enough resources available to allocate
1300 PciIoGetBarAttributes (
1301 IN EFI_PCI_IO_PROTOCOL
*This
,
1303 OUT UINT64
*Supports OPTIONAL
,
1304 OUT VOID
**Resources OPTIONAL
1307 NON_DISCOVERABLE_PCI_DEVICE
*Dev
;
1308 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Descriptor
;
1309 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*BarDesc
;
1310 EFI_ACPI_END_TAG_DESCRIPTOR
*End
;
1313 if (Supports
== NULL
&& Resources
== NULL
) {
1314 return EFI_INVALID_PARAMETER
;
1317 Dev
= NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This
);
1319 Status
= GetBarResource (Dev
, BarIndex
, &BarDesc
);
1320 if (EFI_ERROR (Status
)) {
1325 // Don't expose any configurable attributes for our emulated BAR
1327 if (Supports
!= NULL
) {
1331 if (Resources
!= NULL
) {
1332 Descriptor
= AllocatePool (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
) +
1333 sizeof (EFI_ACPI_END_TAG_DESCRIPTOR
));
1334 if (Descriptor
== NULL
) {
1335 return EFI_OUT_OF_RESOURCES
;
1338 CopyMem (Descriptor
, BarDesc
, sizeof *Descriptor
);
1340 End
= (EFI_ACPI_END_TAG_DESCRIPTOR
*) (Descriptor
+ 1);
1341 End
->Desc
= ACPI_END_TAG_DESCRIPTOR
;
1344 *Resources
= Descriptor
;
1350 Sets the attributes for a range of a BAR on a PCI controller.
1352 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
1353 @param Attributes The mask of attributes to set for the resource range specified by
1354 BarIndex, Offset, and Length.
1355 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
1356 base address for resource range. The legal range for this field is 0..5.
1357 @param Offset A pointer to the BAR relative base address of the resource range to be
1358 modified by the attributes specified by Attributes.
1359 @param Length A pointer to the length of the resource range to be modified by the
1360 attributes specified by Attributes.
1365 PciIoSetBarAttributes (
1366 IN EFI_PCI_IO_PROTOCOL
*This
,
1367 IN UINT64 Attributes
,
1369 IN OUT UINT64
*Offset
,
1370 IN OUT UINT64
*Length
1374 return EFI_UNSUPPORTED
;
1377 STATIC CONST EFI_PCI_IO_PROTOCOL PciIoTemplate
=
1381 { PciIoMemRead
, PciIoMemWrite
},
1382 { PciIoIoRead
, PciIoIoWrite
},
1383 { PciIoPciRead
, PciIoPciWrite
},
1387 CoherentPciIoAllocateBuffer
,
1388 CoherentPciIoFreeBuffer
,
1392 PciIoGetBarAttributes
,
1393 PciIoSetBarAttributes
,
1399 Initialize PciIo Protocol.
1401 @param Dev Point to NON_DISCOVERABLE_PCI_DEVICE instance.
1405 InitializePciIoProtocol (
1406 NON_DISCOVERABLE_PCI_DEVICE
*Dev
1409 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Desc
;
1412 InitializeListHead (&Dev
->UncachedAllocationList
);
1414 Dev
->ConfigSpace
.Hdr
.VendorId
= PCI_ID_VENDOR_UNKNOWN
;
1415 Dev
->ConfigSpace
.Hdr
.DeviceId
= PCI_ID_DEVICE_DONTCARE
;
1417 // Copy protocol structure
1418 CopyMem(&Dev
->PciIo
, &PciIoTemplate
, sizeof PciIoTemplate
);
1420 if (Dev
->Device
->DmaType
== NonDiscoverableDeviceDmaTypeNonCoherent
) {
1421 Dev
->PciIo
.AllocateBuffer
= NonCoherentPciIoAllocateBuffer
;
1422 Dev
->PciIo
.FreeBuffer
= NonCoherentPciIoFreeBuffer
;
1423 Dev
->PciIo
.Map
= NonCoherentPciIoMap
;
1424 Dev
->PciIo
.Unmap
= NonCoherentPciIoUnmap
;
1427 if (CompareGuid (Dev
->Device
->Type
, &gEdkiiNonDiscoverableAhciDeviceGuid
)) {
1428 Dev
->ConfigSpace
.Hdr
.ClassCode
[0] = PCI_IF_MASS_STORAGE_AHCI
;
1429 Dev
->ConfigSpace
.Hdr
.ClassCode
[1] = PCI_CLASS_MASS_STORAGE_SATADPA
;
1430 Dev
->ConfigSpace
.Hdr
.ClassCode
[2] = PCI_CLASS_MASS_STORAGE
;
1432 } else if (CompareGuid (Dev
->Device
->Type
,
1433 &gEdkiiNonDiscoverableEhciDeviceGuid
)) {
1434 Dev
->ConfigSpace
.Hdr
.ClassCode
[0] = PCI_IF_EHCI
;
1435 Dev
->ConfigSpace
.Hdr
.ClassCode
[1] = PCI_CLASS_SERIAL_USB
;
1436 Dev
->ConfigSpace
.Hdr
.ClassCode
[2] = PCI_CLASS_SERIAL
;
1438 } else if (CompareGuid (Dev
->Device
->Type
,
1439 &gEdkiiNonDiscoverableNvmeDeviceGuid
)) {
1440 Dev
->ConfigSpace
.Hdr
.ClassCode
[0] = 0x2; // PCI_IF_NVMHCI
1441 Dev
->ConfigSpace
.Hdr
.ClassCode
[1] = 0x8; // PCI_CLASS_MASS_STORAGE_NVM
1442 Dev
->ConfigSpace
.Hdr
.ClassCode
[2] = PCI_CLASS_MASS_STORAGE
;
1444 } else if (CompareGuid (Dev
->Device
->Type
,
1445 &gEdkiiNonDiscoverableOhciDeviceGuid
)) {
1446 Dev
->ConfigSpace
.Hdr
.ClassCode
[0] = PCI_IF_OHCI
;
1447 Dev
->ConfigSpace
.Hdr
.ClassCode
[1] = PCI_CLASS_SERIAL_USB
;
1448 Dev
->ConfigSpace
.Hdr
.ClassCode
[2] = PCI_CLASS_SERIAL
;
1450 } else if (CompareGuid (Dev
->Device
->Type
,
1451 &gEdkiiNonDiscoverableSdhciDeviceGuid
)) {
1452 Dev
->ConfigSpace
.Hdr
.ClassCode
[0] = 0x0; // don't care
1453 Dev
->ConfigSpace
.Hdr
.ClassCode
[1] = PCI_SUBCLASS_SD_HOST_CONTROLLER
;
1454 Dev
->ConfigSpace
.Hdr
.ClassCode
[2] = PCI_CLASS_SYSTEM_PERIPHERAL
;
1456 } else if (CompareGuid (Dev
->Device
->Type
,
1457 &gEdkiiNonDiscoverableXhciDeviceGuid
)) {
1458 Dev
->ConfigSpace
.Hdr
.ClassCode
[0] = PCI_IF_XHCI
;
1459 Dev
->ConfigSpace
.Hdr
.ClassCode
[1] = PCI_CLASS_SERIAL_USB
;
1460 Dev
->ConfigSpace
.Hdr
.ClassCode
[2] = PCI_CLASS_SERIAL
;
1462 } else if (CompareGuid (Dev
->Device
->Type
,
1463 &gEdkiiNonDiscoverableUhciDeviceGuid
)) {
1464 Dev
->ConfigSpace
.Hdr
.ClassCode
[0] = PCI_IF_UHCI
;
1465 Dev
->ConfigSpace
.Hdr
.ClassCode
[1] = PCI_CLASS_SERIAL_USB
;
1466 Dev
->ConfigSpace
.Hdr
.ClassCode
[2] = PCI_CLASS_SERIAL
;
1468 } else if (CompareGuid (Dev
->Device
->Type
,
1469 &gEdkiiNonDiscoverableUfsDeviceGuid
)) {
1470 Dev
->ConfigSpace
.Hdr
.ClassCode
[0] = 0x0; // don't care
1471 Dev
->ConfigSpace
.Hdr
.ClassCode
[1] = 0x9; // UFS controller subclass;
1472 Dev
->ConfigSpace
.Hdr
.ClassCode
[2] = PCI_CLASS_MASS_STORAGE
;
1475 ASSERT_EFI_ERROR (EFI_INVALID_PARAMETER
);
1479 // Iterate over the resources to populate the virtual BARs
1481 Idx
= Dev
->BarOffset
;
1482 for (Desc
= Dev
->Device
->Resources
, Dev
->BarCount
= 0;
1483 Desc
->Desc
!= ACPI_END_TAG_DESCRIPTOR
;
1484 Desc
= (VOID
*)((UINT8
*)Desc
+ Desc
->Len
+ 3)) {
1486 ASSERT (Desc
->Desc
== ACPI_ADDRESS_SPACE_DESCRIPTOR
);
1487 ASSERT (Desc
->ResType
== ACPI_ADDRESS_SPACE_TYPE_MEM
);
1489 if (Idx
>= PCI_MAX_BARS
||
1490 (Idx
== PCI_MAX_BARS
- 1 && Desc
->AddrSpaceGranularity
== 64)) {
1491 DEBUG ((DEBUG_ERROR
,
1492 "%a: resource count exceeds number of emulated BARs\n",
1498 Dev
->ConfigSpace
.Device
.Bar
[Idx
] = (UINT32
)Desc
->AddrRangeMin
;
1501 if (Desc
->AddrSpaceGranularity
== 64) {
1502 Dev
->ConfigSpace
.Device
.Bar
[Idx
] |= 0x4;
1503 Dev
->ConfigSpace
.Device
.Bar
[++Idx
] = (UINT32
)RShiftU64 (
1504 Desc
->AddrRangeMin
, 32);