2 Internal library implementation for PCI Bus module.
4 Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 GLOBAL_REMOVE_IF_UNREFERENCED
18 CHAR16
*mBarTypeStr
[] = {
32 Retrieve the PCI Card device BAR information via PciIo interface.
34 @param PciIoDevice PCI Card device instance.
39 IN PCI_IO_DEVICE
*PciIoDevice
44 if (!FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
49 // Read PciBar information from the bar register
51 if (!gFullEnumeration
) {
53 PciIoDevice
->PciIo
.Pci
.Read (
54 &(PciIoDevice
->PciIo
),
56 PCI_CARD_MEMORY_BASE_0
,
61 (PciIoDevice
->PciBar
)[P2C_MEM_1
].BaseAddress
= (UINT64
) (Address
);
62 (PciIoDevice
->PciBar
)[P2C_MEM_1
].Length
= 0x2000000;
63 (PciIoDevice
->PciBar
)[P2C_MEM_1
].BarType
= PciBarTypeMem32
;
66 PciIoDevice
->PciIo
.Pci
.Read (
67 &(PciIoDevice
->PciIo
),
69 PCI_CARD_MEMORY_BASE_1
,
73 (PciIoDevice
->PciBar
)[P2C_MEM_2
].BaseAddress
= (UINT64
) (Address
);
74 (PciIoDevice
->PciBar
)[P2C_MEM_2
].Length
= 0x2000000;
75 (PciIoDevice
->PciBar
)[P2C_MEM_2
].BarType
= PciBarTypePMem32
;
78 PciIoDevice
->PciIo
.Pci
.Read (
79 &(PciIoDevice
->PciIo
),
81 PCI_CARD_IO_BASE_0_LOWER
,
85 (PciIoDevice
->PciBar
)[P2C_IO_1
].BaseAddress
= (UINT64
) (Address
);
86 (PciIoDevice
->PciBar
)[P2C_IO_1
].Length
= 0x100;
87 (PciIoDevice
->PciBar
)[P2C_IO_1
].BarType
= PciBarTypeIo16
;
90 PciIoDevice
->PciIo
.Pci
.Read (
91 &(PciIoDevice
->PciIo
),
93 PCI_CARD_IO_BASE_1_LOWER
,
97 (PciIoDevice
->PciBar
)[P2C_IO_2
].BaseAddress
= (UINT64
) (Address
);
98 (PciIoDevice
->PciBar
)[P2C_IO_2
].Length
= 0x100;
99 (PciIoDevice
->PciBar
)[P2C_IO_2
].BarType
= PciBarTypeIo16
;
103 if (gPciHotPlugInit
!= NULL
&& FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
104 GetResourcePaddingForHpb (PciIoDevice
);
109 Remove rejected pci device from specific root bridge
112 @param RootBridgeHandle Specific parent root bridge handle.
113 @param Bridge Bridge device instance.
117 RemoveRejectedPciDevices (
118 IN EFI_HANDLE RootBridgeHandle
,
119 IN PCI_IO_DEVICE
*Bridge
123 LIST_ENTRY
*CurrentLink
;
124 LIST_ENTRY
*LastLink
;
126 if (!FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
130 CurrentLink
= Bridge
->ChildList
.ForwardLink
;
132 while (CurrentLink
!= NULL
&& CurrentLink
!= &Bridge
->ChildList
) {
134 Temp
= PCI_IO_DEVICE_FROM_LINK (CurrentLink
);
136 if (IS_PCI_BRIDGE (&Temp
->Pci
)) {
138 // Remove rejected devices recusively
140 RemoveRejectedPciDevices (RootBridgeHandle
, Temp
);
143 // Skip rejection for all PPBs, while detect rejection for others
145 if (IsPciDeviceRejected (Temp
)) {
148 // For P2C, remove all devices on it
150 if (!IsListEmpty (&Temp
->ChildList
)) {
151 RemoveAllPciDeviceOnBridge (RootBridgeHandle
, Temp
);
155 // Finally remove itself
157 LastLink
= CurrentLink
->BackLink
;
158 RemoveEntryList (CurrentLink
);
159 FreePciDevice (Temp
);
161 CurrentLink
= LastLink
;
165 CurrentLink
= CurrentLink
->ForwardLink
;
170 Dump the resourc map of the bridge device.
172 @param[in] BridgeResource Resource descriptor of the bridge device.
176 IN PCI_RESOURCE_NODE
*BridgeResource
180 PCI_RESOURCE_NODE
*Resource
;
183 if ((BridgeResource
!= NULL
) && (BridgeResource
->Length
!= 0)) {
185 EFI_D_INFO
, "Type = %s; Base = 0x%lx;\tLength = 0x%lx;\tAlignment = 0x%lx\n",
186 mBarTypeStr
[MIN (BridgeResource
->ResType
, PciBarTypeMaxType
)],
187 BridgeResource
->PciDev
->PciBar
[BridgeResource
->Bar
].BaseAddress
,
188 BridgeResource
->Length
, BridgeResource
->Alignment
190 for ( Link
= BridgeResource
->ChildList
.ForwardLink
191 ; Link
!= &BridgeResource
->ChildList
192 ; Link
= Link
->ForwardLink
194 Resource
= RESOURCE_NODE_FROM_LINK (Link
);
195 if (Resource
->ResourceUsage
== PciResUsageTypical
) {
196 Bar
= Resource
->Virtual
? Resource
->PciDev
->VfPciBar
: Resource
->PciDev
->PciBar
;
198 EFI_D_INFO
, " Base = 0x%lx;\tLength = 0x%lx;\tAlignment = 0x%lx;\tOwner = %s ",
199 Bar
[Resource
->Bar
].BaseAddress
, Resource
->Length
, Resource
->Alignment
,
200 IS_PCI_BRIDGE (&Resource
->PciDev
->Pci
) ? L
"PPB" :
201 IS_CARDBUS_BRIDGE (&Resource
->PciDev
->Pci
) ? L
"P2C" :
205 if ((!IS_PCI_BRIDGE (&Resource
->PciDev
->Pci
) && !IS_CARDBUS_BRIDGE (&Resource
->PciDev
->Pci
)) ||
206 (IS_PCI_BRIDGE (&Resource
->PciDev
->Pci
) && (Resource
->Bar
< PPB_IO_RANGE
)) ||
207 (IS_CARDBUS_BRIDGE (&Resource
->PciDev
->Pci
) && (Resource
->Bar
< P2C_MEM_1
))
210 // The resource requirement comes from the device itself.
213 EFI_D_INFO
, " [%02x|%02x|%02x:%02x]\n",
214 Resource
->PciDev
->BusNumber
, Resource
->PciDev
->DeviceNumber
,
215 Resource
->PciDev
->FunctionNumber
, Bar
[Resource
->Bar
].Offset
219 // The resource requirement comes from the subordinate devices.
222 EFI_D_INFO
, " [%02x|%02x|%02x:**]\n",
223 Resource
->PciDev
->BusNumber
, Resource
->PciDev
->DeviceNumber
,
224 Resource
->PciDev
->FunctionNumber
228 DEBUG ((EFI_D_INFO
, " Padding:Length = 0x%lx;\tAlignment = 0x%lx\n", Resource
->Length
, Resource
->Alignment
));
235 Find the corresponding resource node for the Device in child list of BridgeResource.
237 @param[in] Device Pointer to PCI_IO_DEVICE.
238 @param[in] BridgeResource Pointer to PCI_RESOURCE_NODE.
240 @return !NULL The corresponding resource node for the Device.
241 @return NULL No corresponding resource node for the Device.
245 IN PCI_IO_DEVICE
*Device
,
246 IN PCI_RESOURCE_NODE
*BridgeResource
250 PCI_RESOURCE_NODE
*Resource
;
252 for ( Link
= BridgeResource
->ChildList
.ForwardLink
253 ; Link
!= &BridgeResource
->ChildList
254 ; Link
= Link
->ForwardLink
256 Resource
= RESOURCE_NODE_FROM_LINK (Link
);
257 if (Resource
->PciDev
== Device
) {
266 Dump the resource map of all the devices under Bridge.
268 @param[in] Bridge Bridge device instance.
269 @param[in] IoNode IO resource descriptor for the bridge device.
270 @param[in] Mem32Node Mem32 resource descriptor for the bridge device.
271 @param[in] PMem32Node PMem32 resource descriptor for the bridge device.
272 @param[in] Mem64Node Mem64 resource descriptor for the bridge device.
273 @param[in] PMem64Node PMem64 resource descriptor for the bridge device.
277 IN PCI_IO_DEVICE
*Bridge
,
278 IN PCI_RESOURCE_NODE
*IoNode
,
279 IN PCI_RESOURCE_NODE
*Mem32Node
,
280 IN PCI_RESOURCE_NODE
*PMem32Node
,
281 IN PCI_RESOURCE_NODE
*Mem64Node
,
282 IN PCI_RESOURCE_NODE
*PMem64Node
287 PCI_IO_DEVICE
*Device
;
288 PCI_RESOURCE_NODE
*ChildIoNode
;
289 PCI_RESOURCE_NODE
*ChildMem32Node
;
290 PCI_RESOURCE_NODE
*ChildPMem32Node
;
291 PCI_RESOURCE_NODE
*ChildMem64Node
;
292 PCI_RESOURCE_NODE
*ChildPMem64Node
;
295 DEBUG ((EFI_D_INFO
, "PciBus: Resource Map for "));
297 Status
= gBS
->OpenProtocol (
299 &gEfiPciRootBridgeIoProtocolGuid
,
303 EFI_OPEN_PROTOCOL_TEST_PROTOCOL
305 if (EFI_ERROR (Status
)) {
307 EFI_D_INFO
, "Bridge [%02x|%02x|%02x]\n",
308 Bridge
->BusNumber
, Bridge
->DeviceNumber
, Bridge
->FunctionNumber
311 Str
= ConvertDevicePathToText (
312 DevicePathFromHandle (Bridge
->Handle
),
316 DEBUG ((EFI_D_INFO
, "Root Bridge %s\n", Str
!= NULL
? Str
: L
""));
322 DumpBridgeResource (IoNode
);
323 DumpBridgeResource (Mem32Node
);
324 DumpBridgeResource (PMem32Node
);
325 DumpBridgeResource (Mem64Node
);
326 DumpBridgeResource (PMem64Node
);
327 DEBUG ((EFI_D_INFO
, "\n"));
329 for ( Link
= Bridge
->ChildList
.ForwardLink
330 ; Link
!= &Bridge
->ChildList
331 ; Link
= Link
->ForwardLink
333 Device
= PCI_IO_DEVICE_FROM_LINK (Link
);
334 if (IS_PCI_BRIDGE (&Device
->Pci
)) {
336 ChildIoNode
= (IoNode
== NULL
? NULL
: FindResourceNode (Device
, IoNode
));
337 ChildMem32Node
= (Mem32Node
== NULL
? NULL
: FindResourceNode (Device
, Mem32Node
));
338 ChildPMem32Node
= (PMem32Node
== NULL
? NULL
: FindResourceNode (Device
, PMem32Node
));
339 ChildMem64Node
= (Mem64Node
== NULL
? NULL
: FindResourceNode (Device
, Mem64Node
));
340 ChildPMem64Node
= (PMem64Node
== NULL
? NULL
: FindResourceNode (Device
, PMem64Node
));
355 Submits the I/O and memory resource requirements for the specified PCI Host Bridge.
357 @param PciResAlloc Point to protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
359 @retval EFI_SUCCESS Successfully finished resource allocation.
360 @retval EFI_NOT_FOUND Cannot get root bridge instance.
361 @retval EFI_OUT_OF_RESOURCES Platform failed to program the resources if no hot plug supported.
362 @retval other Some error occurred when allocating resources for the PCI Host Bridge.
364 @note Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.
368 PciHostBridgeResourceAllocator (
369 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
*PciResAlloc
372 PCI_IO_DEVICE
*RootBridgeDev
;
373 EFI_HANDLE RootBridgeHandle
;
382 UINT64 Mem32ResStatus
;
383 UINT64 PMem32ResStatus
;
384 UINT64 Mem64ResStatus
;
385 UINT64 PMem64ResStatus
;
386 UINT64 MaxOptionRomSize
;
387 PCI_RESOURCE_NODE
*IoBridge
;
388 PCI_RESOURCE_NODE
*Mem32Bridge
;
389 PCI_RESOURCE_NODE
*PMem32Bridge
;
390 PCI_RESOURCE_NODE
*Mem64Bridge
;
391 PCI_RESOURCE_NODE
*PMem64Bridge
;
392 PCI_RESOURCE_NODE IoPool
;
393 PCI_RESOURCE_NODE Mem32Pool
;
394 PCI_RESOURCE_NODE PMem32Pool
;
395 PCI_RESOURCE_NODE Mem64Pool
;
396 PCI_RESOURCE_NODE PMem64Pool
;
398 EFI_DEVICE_HANDLE_EXTENDED_DATA_PAYLOAD HandleExtendedData
;
399 EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA_PAYLOAD AllocFailExtendedData
;
407 // It may try several times if the resource allocation fails
411 // Initialize resource pool
413 InitializeResourcePool (&IoPool
, PciBarTypeIo16
);
414 InitializeResourcePool (&Mem32Pool
, PciBarTypeMem32
);
415 InitializeResourcePool (&PMem32Pool
, PciBarTypePMem32
);
416 InitializeResourcePool (&Mem64Pool
, PciBarTypeMem64
);
417 InitializeResourcePool (&PMem64Pool
, PciBarTypePMem64
);
419 RootBridgeDev
= NULL
;
420 RootBridgeHandle
= 0;
422 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
424 // Get Root Bridge Device by handle
426 RootBridgeDev
= GetRootBridgeByHandle (RootBridgeHandle
);
428 if (RootBridgeDev
== NULL
) {
429 return EFI_NOT_FOUND
;
433 // Create the entire system resource map from the information collected by
434 // enumerator. Several resource tree was created
438 // If non-stardard PCI Bridge I/O window alignment is supported,
439 // set I/O aligment to minimum possible alignment for root bridge.
441 IoBridge
= CreateResourceNode (
444 FeaturePcdGet (PcdPciBridgeIoAlignmentProbe
) ? 0x1FF: 0xFFF,
450 Mem32Bridge
= CreateResourceNode (
459 PMem32Bridge
= CreateResourceNode (
468 Mem64Bridge
= CreateResourceNode (
477 PMem64Bridge
= CreateResourceNode (
487 // Create resourcemap by going through all the devices subject to this root bridge
499 // Get the max ROM size that the root bridge can process
501 RootBridgeDev
->RomSize
= Mem32Bridge
->Length
;
504 // Skip to enlarge the resource request during realloction
508 // Get Max Option Rom size for current root bridge
510 MaxOptionRomSize
= GetMaxOptionRomSize (RootBridgeDev
);
513 // Enlarger the mem32 resource to accomdate the option rom
514 // if the mem32 resource is not enough to hold the rom
516 if (MaxOptionRomSize
> Mem32Bridge
->Length
) {
518 Mem32Bridge
->Length
= MaxOptionRomSize
;
519 RootBridgeDev
->RomSize
= MaxOptionRomSize
;
522 // Alignment should be adjusted as well
524 if (Mem32Bridge
->Alignment
< MaxOptionRomSize
- 1) {
525 Mem32Bridge
->Alignment
= MaxOptionRomSize
- 1;
531 // Based on the all the resource tree, contruct ACPI resource node to
532 // submit the resource aperture to pci host bridge protocol
534 Status
= ConstructAcpiResourceRequestor (
545 // Insert these resource nodes into the database
547 InsertResourceNode (&IoPool
, IoBridge
);
548 InsertResourceNode (&Mem32Pool
, Mem32Bridge
);
549 InsertResourceNode (&PMem32Pool
, PMem32Bridge
);
550 InsertResourceNode (&Mem64Pool
, Mem64Bridge
);
551 InsertResourceNode (&PMem64Pool
, PMem64Bridge
);
553 if (Status
== EFI_SUCCESS
) {
555 // Submit the resource requirement
557 Status
= PciResAlloc
->SubmitResources (
559 RootBridgeDev
->Handle
,
563 // If SubmitResources returns error, PciBus isn't able to start.
564 // It's a fatal error so assertion is added.
566 DEBUG ((EFI_D_INFO
, "PciBus: HostBridge->SubmitResources() - %r\n", Status
));
567 ASSERT_EFI_ERROR (Status
);
571 // Free acpi resource node
573 if (AcpiConfig
!= NULL
) {
574 FreePool (AcpiConfig
);
577 if (EFI_ERROR (Status
)) {
579 // Destroy all the resource tree
581 DestroyResourceTree (&IoPool
);
582 DestroyResourceTree (&Mem32Pool
);
583 DestroyResourceTree (&PMem32Pool
);
584 DestroyResourceTree (&Mem64Pool
);
585 DestroyResourceTree (&PMem64Pool
);
590 // End while, at least one Root Bridge should be found.
592 ASSERT (RootBridgeDev
!= NULL
);
595 // Notify platform to start to program the resource
597 Status
= NotifyPhase (PciResAlloc
, EfiPciHostBridgeAllocateResources
);
598 DEBUG ((EFI_D_INFO
, "PciBus: HostBridge->NotifyPhase(AllocateResources) - %r\n", Status
));
599 if (!FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
601 // If Hot Plug is not supported
603 if (EFI_ERROR (Status
)) {
605 // Allocation failed, then return
607 return EFI_OUT_OF_RESOURCES
;
610 // Allocation succeed.
611 // Get host bridge handle for status report, and then skip the main while
613 HandleExtendedData
.Handle
= RootBridgeDev
->PciRootBridgeIo
->ParentHandle
;
619 // If Hot Plug is supported
621 if (!EFI_ERROR (Status
)) {
623 // Allocation succeed, then continue the following
629 // If the resource allocation is unsuccessful, free resources on bridge
632 RootBridgeDev
= NULL
;
633 RootBridgeHandle
= 0;
635 IoResStatus
= EFI_RESOURCE_SATISFIED
;
636 Mem32ResStatus
= EFI_RESOURCE_SATISFIED
;
637 PMem32ResStatus
= EFI_RESOURCE_SATISFIED
;
638 Mem64ResStatus
= EFI_RESOURCE_SATISFIED
;
639 PMem64ResStatus
= EFI_RESOURCE_SATISFIED
;
641 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
643 // Get RootBridg Device by handle
645 RootBridgeDev
= GetRootBridgeByHandle (RootBridgeHandle
);
646 if (RootBridgeDev
== NULL
) {
647 return EFI_NOT_FOUND
;
651 // Get host bridge handle for status report
653 HandleExtendedData
.Handle
= RootBridgeDev
->PciRootBridgeIo
->ParentHandle
;
656 // Get acpi resource node for all the resource types
660 Status
= PciResAlloc
->GetProposedResources (
662 RootBridgeDev
->Handle
,
666 if (EFI_ERROR (Status
)) {
670 if (AcpiConfig
!= NULL
) {
672 // Adjust resource allocation policy for each RB
674 GetResourceAllocationStatus (
682 FreePool (AcpiConfig
);
690 // Raise the EFI_IOB_EC_RESOURCE_CONFLICT status code
693 // It is very difficult to follow the spec here
694 // Device path , Bar index can not be get here
696 ZeroMem (&AllocFailExtendedData
, sizeof (AllocFailExtendedData
));
698 REPORT_STATUS_CODE_WITH_EXTENDED_DATA (
700 EFI_IO_BUS_PCI
| EFI_IOB_EC_RESOURCE_CONFLICT
,
701 (VOID
*) &AllocFailExtendedData
,
702 sizeof (AllocFailExtendedData
)
705 Status
= PciHostBridgeAdjustAllocation (
719 // Destroy all the resource tree
721 DestroyResourceTree (&IoPool
);
722 DestroyResourceTree (&Mem32Pool
);
723 DestroyResourceTree (&PMem32Pool
);
724 DestroyResourceTree (&Mem64Pool
);
725 DestroyResourceTree (&PMem64Pool
);
727 NotifyPhase (PciResAlloc
, EfiPciHostBridgeFreeResources
);
729 if (EFI_ERROR (Status
)) {
741 // Raise the EFI_IOB_PCI_RES_ALLOC status code
743 REPORT_STATUS_CODE_WITH_EXTENDED_DATA (
745 EFI_IO_BUS_PCI
| EFI_IOB_PCI_RES_ALLOC
,
746 (VOID
*) &HandleExtendedData
,
747 sizeof (HandleExtendedData
)
751 // Notify pci bus driver starts to program the resource
753 Status
= NotifyPhase (PciResAlloc
, EfiPciHostBridgeSetResources
);
755 if (EFI_ERROR (Status
)) {
759 RootBridgeDev
= NULL
;
761 RootBridgeHandle
= 0;
763 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
765 // Get RootBridg Device by handle
767 RootBridgeDev
= GetRootBridgeByHandle (RootBridgeHandle
);
769 if (RootBridgeDev
== NULL
) {
770 return EFI_NOT_FOUND
;
774 // Get acpi resource node for all the resource types
777 Status
= PciResAlloc
->GetProposedResources (
779 RootBridgeDev
->Handle
,
783 if (EFI_ERROR (Status
)) {
788 // Get the resource base by interpreting acpi resource node
801 // Process option rom for this root bridge
803 ProcessOptionRom (RootBridgeDev
, Mem32Base
, RootBridgeDev
->RomSize
);
806 // Create the entire system resource map from the information collected by
807 // enumerator. Several resource tree was created
809 IoBridge
= FindResourceNode (RootBridgeDev
, &IoPool
);
810 Mem32Bridge
= FindResourceNode (RootBridgeDev
, &Mem32Pool
);
811 PMem32Bridge
= FindResourceNode (RootBridgeDev
, &PMem32Pool
);
812 Mem64Bridge
= FindResourceNode (RootBridgeDev
, &Mem64Pool
);
813 PMem64Bridge
= FindResourceNode (RootBridgeDev
, &PMem64Pool
);
815 ASSERT (IoBridge
!= NULL
);
816 ASSERT (Mem32Bridge
!= NULL
);
817 ASSERT (PMem32Bridge
!= NULL
);
818 ASSERT (Mem64Bridge
!= NULL
);
819 ASSERT (PMem64Bridge
!= NULL
);
822 // Program IO resources
830 // Program Mem32 resources
838 // Program PMem32 resources
846 // Program Mem64 resources
854 // Program PMem64 resources
861 IoBridge
->PciDev
->PciBar
[IoBridge
->Bar
].BaseAddress
= IoBase
;
862 Mem32Bridge
->PciDev
->PciBar
[Mem32Bridge
->Bar
].BaseAddress
= Mem32Base
;
863 PMem32Bridge
->PciDev
->PciBar
[PMem32Bridge
->Bar
].BaseAddress
= PMem32Base
;
864 Mem64Bridge
->PciDev
->PciBar
[Mem64Bridge
->Bar
].BaseAddress
= Mem64Base
;
865 PMem64Bridge
->PciDev
->PciBar
[PMem64Bridge
->Bar
].BaseAddress
= PMem64Base
;
868 // Dump the resource map for current root bridge
881 FreePool (AcpiConfig
);
885 // Destroy all the resource tree
887 DestroyResourceTree (&IoPool
);
888 DestroyResourceTree (&Mem32Pool
);
889 DestroyResourceTree (&PMem32Pool
);
890 DestroyResourceTree (&Mem64Pool
);
891 DestroyResourceTree (&PMem64Pool
);
894 // Notify the resource allocation phase is to end
896 Status
= NotifyPhase (PciResAlloc
, EfiPciHostBridgeEndResourceAllocation
);
902 Allocate NumberOfBuses buses and return the next available PCI bus number.
904 @param Bridge Bridge device instance.
905 @param StartBusNumber Current available PCI bus number.
906 @param NumberOfBuses Number of buses enumerated below the StartBusNumber.
907 @param NextBusNumber Next available PCI bus number.
909 @retval EFI_SUCCESS Available bus number resource is enough. Next available PCI bus number
910 is returned in NextBusNumber.
911 @retval EFI_OUT_OF_RESOURCES Available bus number resource is not enough for allocation.
915 PciAllocateBusNumber (
916 IN PCI_IO_DEVICE
*Bridge
,
917 IN UINT8 StartBusNumber
,
918 IN UINT8 NumberOfBuses
,
919 OUT UINT8
*NextBusNumber
922 PCI_IO_DEVICE
*RootBridge
;
923 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*BusNumberRanges
;
925 UINT64 MaxNumberInRange
;
928 // Get PCI Root Bridge device
931 while (RootBridge
->Parent
!= NULL
) {
932 RootBridge
= RootBridge
->Parent
;
936 // Get next available PCI bus number
938 BusNumberRanges
= RootBridge
->BusNumberRanges
;
939 while (BusNumberRanges
->Desc
!= ACPI_END_TAG_DESCRIPTOR
) {
940 MaxNumberInRange
= BusNumberRanges
->AddrRangeMin
+ BusNumberRanges
->AddrLen
- 1;
941 if (StartBusNumber
>= BusNumberRanges
->AddrRangeMin
&& StartBusNumber
<= MaxNumberInRange
) {
942 NextNumber
= (UINT8
)(StartBusNumber
+ NumberOfBuses
);
943 while (NextNumber
> MaxNumberInRange
) {
945 if (BusNumberRanges
->Desc
== ACPI_END_TAG_DESCRIPTOR
) {
946 return EFI_OUT_OF_RESOURCES
;
948 NextNumber
= (UINT8
)(NextNumber
+ (BusNumberRanges
->AddrRangeMin
- (MaxNumberInRange
+ 1)));
949 MaxNumberInRange
= BusNumberRanges
->AddrRangeMin
+ BusNumberRanges
->AddrLen
- 1;
951 *NextBusNumber
= NextNumber
;
956 return EFI_OUT_OF_RESOURCES
;
960 Scan pci bus and assign bus number to the given PCI bus system.
962 @param Bridge Bridge device instance.
963 @param StartBusNumber start point.
964 @param SubBusNumber Point to sub bus number.
965 @param PaddedBusRange Customized bus number.
967 @retval EFI_SUCCESS Successfully scanned and assigned bus number.
968 @retval other Some error occurred when scanning pci bus.
970 @note Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.
975 IN PCI_IO_DEVICE
*Bridge
,
976 IN UINT8 StartBusNumber
,
977 OUT UINT8
*SubBusNumber
,
978 OUT UINT8
*PaddedBusRange
989 PCI_IO_DEVICE
*PciDevice
;
993 EFI_HPC_PADDING_ATTRIBUTES Attributes
;
994 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Descriptors
;
996 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*PciRootBridgeIo
;
998 UINT32 TempReservedBusNum
;
1000 PciRootBridgeIo
= Bridge
->PciRootBridgeIo
;
1004 Attributes
= (EFI_HPC_PADDING_ATTRIBUTES
) 0;
1010 for (Device
= 0; Device
<= PCI_MAX_DEVICE
; Device
++) {
1011 TempReservedBusNum
= 0;
1012 for (Func
= 0; Func
<= PCI_MAX_FUNC
; Func
++) {
1015 // Check to see whether a pci device is present
1017 Status
= PciDevicePresent (
1025 if (EFI_ERROR (Status
)) {
1030 // Get the PCI device information
1032 Status
= PciSearchDevice (
1041 ASSERT (!EFI_ERROR (Status
));
1043 PciAddress
= EFI_PCI_ADDRESS (StartBusNumber
, Device
, Func
, 0);
1045 if (!IS_PCI_BRIDGE (&Pci
)) {
1047 // PCI bridges will be called later
1048 // Here just need for PCI device or PCI to cardbus controller
1049 // EfiPciBeforeChildBusEnumeration for PCI Device Node
1051 PreprocessController (
1053 PciDevice
->BusNumber
,
1054 PciDevice
->DeviceNumber
,
1055 PciDevice
->FunctionNumber
,
1056 EfiPciBeforeChildBusEnumeration
1060 if (FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
1062 // For Pci Hotplug controller devcie only
1064 if (gPciHotPlugInit
!= NULL
) {
1066 // Check if it is a Hotplug PCI controller
1068 if (IsRootPciHotPlugController (PciDevice
->DevicePath
, &HpIndex
)) {
1069 gPciRootHpcData
[HpIndex
].Found
= TRUE
;
1071 if (!gPciRootHpcData
[HpIndex
].Initialized
) {
1073 Status
= CreateEventForHpc (HpIndex
, &Event
);
1075 ASSERT (!EFI_ERROR (Status
));
1077 Status
= gPciHotPlugInit
->InitializeRootHpc (
1079 gPciRootHpcPool
[HpIndex
].HpcDevicePath
,
1085 PreprocessController (
1087 PciDevice
->BusNumber
,
1088 PciDevice
->DeviceNumber
,
1089 PciDevice
->FunctionNumber
,
1090 EfiPciBeforeChildBusEnumeration
1097 if (IS_PCI_BRIDGE (&Pci
) || IS_CARDBUS_BRIDGE (&Pci
)) {
1101 if (!FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
1103 // If Hot Plug is not supported,
1104 // get the bridge information
1106 Status
= PciSearchDevice (
1115 if (EFI_ERROR (Status
)) {
1120 // If Hot Plug is supported,
1121 // Get the bridge information
1124 if (gPciHotPlugInit
!= NULL
) {
1126 if (IsRootPciHotPlugBus (PciDevice
->DevicePath
, &HpIndex
)) {
1129 // If it is initialized, get the padded bus range
1131 Status
= gPciHotPlugInit
->GetResourcePadding (
1133 gPciRootHpcPool
[HpIndex
].HpbDevicePath
,
1136 (VOID
**) &Descriptors
,
1140 if (EFI_ERROR (Status
)) {
1145 Status
= PciGetBusRange (
1152 FreePool (Descriptors
);
1154 if (EFI_ERROR (Status
)) {
1163 Status
= PciAllocateBusNumber (Bridge
, *SubBusNumber
, 1, SubBusNumber
);
1164 if (EFI_ERROR (Status
)) {
1167 SecondBus
= *SubBusNumber
;
1169 Register
= (UINT16
) ((SecondBus
<< 8) | (UINT16
) StartBusNumber
);
1170 Address
= EFI_PCI_ADDRESS (StartBusNumber
, Device
, Func
, PCI_BRIDGE_PRIMARY_BUS_REGISTER_OFFSET
);
1172 Status
= PciRootBridgeIo
->Pci
.Write (
1182 // If it is PPB, resursively search down this bridge
1184 if (IS_PCI_BRIDGE (&Pci
)) {
1187 // Temporarily initialize SubBusNumber to maximum bus number to ensure the
1188 // PCI configuration transaction to go through any PPB
1191 Address
= EFI_PCI_ADDRESS (StartBusNumber
, Device
, Func
, PCI_BRIDGE_SUBORDINATE_BUS_REGISTER_OFFSET
);
1192 Status
= PciRootBridgeIo
->Pci
.Write (
1201 // Nofify EfiPciBeforeChildBusEnumeration for PCI Brige
1203 PreprocessController (
1205 PciDevice
->BusNumber
,
1206 PciDevice
->DeviceNumber
,
1207 PciDevice
->FunctionNumber
,
1208 EfiPciBeforeChildBusEnumeration
1211 Status
= PciScanBus (
1213 (UINT8
) (SecondBus
),
1217 if (EFI_ERROR (Status
)) {
1222 if (FeaturePcdGet (PcdPciBusHotplugDeviceSupport
) && BusPadding
) {
1224 // Ensure the device is enabled and initialized
1226 if ((Attributes
== EfiPaddingPciRootBridge
) &&
1227 (State
& EFI_HPC_STATE_ENABLED
) != 0 &&
1228 (State
& EFI_HPC_STATE_INITIALIZED
) != 0) {
1229 *PaddedBusRange
= (UINT8
) ((UINT8
) (BusRange
) +*PaddedBusRange
);
1231 Status
= PciAllocateBusNumber (PciDevice
, *SubBusNumber
, (UINT8
) (BusRange
), SubBusNumber
);
1232 if (EFI_ERROR (Status
)) {
1239 // Set the current maximum bus number under the PPB
1241 Address
= EFI_PCI_ADDRESS (StartBusNumber
, Device
, Func
, PCI_BRIDGE_SUBORDINATE_BUS_REGISTER_OFFSET
);
1243 Status
= PciRootBridgeIo
->Pci
.Write (
1252 // It is device. Check PCI IOV for Bus reservation
1253 // Go through each function, just reserve the MAX ReservedBusNum for one device
1255 if (PcdGetBool (PcdSrIovSupport
) && PciDevice
->SrIovCapabilityOffset
!= 0) {
1256 if (TempReservedBusNum
< PciDevice
->ReservedBusNum
) {
1258 Status
= PciAllocateBusNumber (PciDevice
, *SubBusNumber
, (UINT8
) (PciDevice
->ReservedBusNum
- TempReservedBusNum
), SubBusNumber
);
1259 if (EFI_ERROR (Status
)) {
1262 TempReservedBusNum
= PciDevice
->ReservedBusNum
;
1265 DEBUG ((EFI_D_INFO
, "PCI-IOV ScanBus - SubBusNumber - 0x%x\n", *SubBusNumber
));
1267 DEBUG ((EFI_D_INFO
, "PCI-IOV ScanBus - SubBusNumber - 0x%x (Update)\n", *SubBusNumber
));
1273 if (Func
== 0 && !IS_PCI_MULTI_FUNC (&Pci
)) {
1276 // Skip sub functions, this is not a multi function device
1279 Func
= PCI_MAX_FUNC
;
1288 Process Option Rom on the specified root bridge.
1290 @param Bridge Pci root bridge device instance.
1292 @retval EFI_SUCCESS Success process.
1293 @retval other Some error occurred when processing Option Rom on the root bridge.
1297 PciRootBridgeP2CProcess (
1298 IN PCI_IO_DEVICE
*Bridge
1301 LIST_ENTRY
*CurrentLink
;
1302 PCI_IO_DEVICE
*Temp
;
1303 EFI_HPC_STATE State
;
1307 CurrentLink
= Bridge
->ChildList
.ForwardLink
;
1309 while (CurrentLink
!= NULL
&& CurrentLink
!= &Bridge
->ChildList
) {
1311 Temp
= PCI_IO_DEVICE_FROM_LINK (CurrentLink
);
1313 if (IS_CARDBUS_BRIDGE (&Temp
->Pci
)) {
1315 if (gPciHotPlugInit
!= NULL
&& Temp
->Allocated
&& FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
1318 // Raise the EFI_IOB_PCI_HPC_INIT status code
1320 REPORT_STATUS_CODE_WITH_DEVICE_PATH (
1322 EFI_IO_BUS_PCI
| EFI_IOB_PCI_HPC_INIT
,
1326 PciAddress
= EFI_PCI_ADDRESS (Temp
->BusNumber
, Temp
->DeviceNumber
, Temp
->FunctionNumber
, 0);
1327 Status
= gPciHotPlugInit
->InitializeRootHpc (
1335 if (!EFI_ERROR (Status
)) {
1336 Status
= PciBridgeEnumerator (Temp
);
1338 if (EFI_ERROR (Status
)) {
1343 CurrentLink
= CurrentLink
->ForwardLink
;
1349 if (!IsListEmpty (&Temp
->ChildList
)) {
1350 Status
= PciRootBridgeP2CProcess (Temp
);
1353 CurrentLink
= CurrentLink
->ForwardLink
;
1360 Process Option Rom on the specified host bridge.
1362 @param PciResAlloc Pointer to instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
1364 @retval EFI_SUCCESS Success process.
1365 @retval EFI_NOT_FOUND Can not find the root bridge instance.
1366 @retval other Some error occurred when processing Option Rom on the host bridge.
1370 PciHostBridgeP2CProcess (
1371 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
*PciResAlloc
1374 EFI_HANDLE RootBridgeHandle
;
1375 PCI_IO_DEVICE
*RootBridgeDev
;
1378 if (!FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
1382 RootBridgeHandle
= NULL
;
1384 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
1387 // Get RootBridg Device by handle
1389 RootBridgeDev
= GetRootBridgeByHandle (RootBridgeHandle
);
1391 if (RootBridgeDev
== NULL
) {
1392 return EFI_NOT_FOUND
;
1395 Status
= PciRootBridgeP2CProcess (RootBridgeDev
);
1396 if (EFI_ERROR (Status
)) {
1406 This function is used to enumerate the entire host bridge
1407 in a given platform.
1409 @param PciResAlloc A pointer to the PCI Host Resource Allocation protocol.
1411 @retval EFI_SUCCESS Successfully enumerated the host bridge.
1412 @retval EFI_OUT_OF_RESOURCES No enough memory available.
1413 @retval other Some error occurred when enumerating the host bridge.
1417 PciHostBridgeEnumerator (
1418 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
*PciResAlloc
1421 EFI_HANDLE RootBridgeHandle
;
1422 PCI_IO_DEVICE
*RootBridgeDev
;
1424 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*PciRootBridgeIo
;
1426 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Descriptors
;
1427 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Configuration
;
1428 UINT8 StartBusNumber
;
1429 LIST_ENTRY RootBridgeList
;
1432 if (FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
1433 InitializeHotPlugSupport ();
1436 InitializeListHead (&RootBridgeList
);
1439 // Notify the bus allocation phase is about to start
1441 Status
= NotifyPhase (PciResAlloc
, EfiPciHostBridgeBeginBusAllocation
);
1443 if (EFI_ERROR (Status
)) {
1447 DEBUG((EFI_D_INFO
, "PCI Bus First Scanning\n"));
1448 RootBridgeHandle
= NULL
;
1449 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
1452 // if a root bridge instance is found, create root bridge device for it
1455 RootBridgeDev
= CreateRootBridge (RootBridgeHandle
);
1457 if (RootBridgeDev
== NULL
) {
1458 return EFI_OUT_OF_RESOURCES
;
1462 // Enumerate all the buses under this root bridge
1464 Status
= PciRootBridgeEnumerator (
1469 if (gPciHotPlugInit
!= NULL
&& FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
1470 InsertTailList (&RootBridgeList
, &(RootBridgeDev
->Link
));
1472 DestroyRootBridge (RootBridgeDev
);
1474 if (EFI_ERROR (Status
)) {
1480 // Notify the bus allocation phase is finished for the first time
1482 NotifyPhase (PciResAlloc
, EfiPciHostBridgeEndBusAllocation
);
1484 if (gPciHotPlugInit
!= NULL
&& FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
1486 // Reset all assigned PCI bus number in all PPB
1488 RootBridgeHandle
= NULL
;
1489 Link
= GetFirstNode (&RootBridgeList
);
1490 while ((PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) &&
1491 (!IsNull (&RootBridgeList
, Link
))) {
1492 RootBridgeDev
= PCI_IO_DEVICE_FROM_LINK (Link
);
1494 // Get the Bus information
1496 Status
= PciResAlloc
->StartBusEnumeration (
1499 (VOID
**) &Configuration
1501 if (EFI_ERROR (Status
)) {
1506 // Get the bus number to start with
1508 StartBusNumber
= (UINT8
) (Configuration
->AddrRangeMin
);
1510 ResetAllPpbBusNumber (
1515 FreePool (Configuration
);
1516 Link
= RemoveEntryList (Link
);
1517 DestroyRootBridge (RootBridgeDev
);
1521 // Wait for all HPC initialized
1523 Status
= AllRootHPCInitialized (STALL_1_SECOND
* 15);
1525 if (EFI_ERROR (Status
)) {
1526 DEBUG ((EFI_D_ERROR
, "Some root HPC failed to initialize\n"));
1531 // Notify the bus allocation phase is about to start for the 2nd time
1533 Status
= NotifyPhase (PciResAlloc
, EfiPciHostBridgeBeginBusAllocation
);
1535 if (EFI_ERROR (Status
)) {
1539 DEBUG((EFI_D_INFO
, "PCI Bus Second Scanning\n"));
1540 RootBridgeHandle
= NULL
;
1541 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
1544 // if a root bridge instance is found, create root bridge device for it
1546 RootBridgeDev
= CreateRootBridge (RootBridgeHandle
);
1548 if (RootBridgeDev
== NULL
) {
1549 return EFI_OUT_OF_RESOURCES
;
1553 // Enumerate all the buses under this root bridge
1555 Status
= PciRootBridgeEnumerator (
1560 DestroyRootBridge (RootBridgeDev
);
1561 if (EFI_ERROR (Status
)) {
1567 // Notify the bus allocation phase is to end for the 2nd time
1569 NotifyPhase (PciResAlloc
, EfiPciHostBridgeEndBusAllocation
);
1573 // Notify the resource allocation phase is to start
1575 Status
= NotifyPhase (PciResAlloc
, EfiPciHostBridgeBeginResourceAllocation
);
1577 if (EFI_ERROR (Status
)) {
1581 RootBridgeHandle
= NULL
;
1582 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
1585 // if a root bridge instance is found, create root bridge device for it
1587 RootBridgeDev
= CreateRootBridge (RootBridgeHandle
);
1589 if (RootBridgeDev
== NULL
) {
1590 return EFI_OUT_OF_RESOURCES
;
1593 Status
= StartManagingRootBridge (RootBridgeDev
);
1595 if (EFI_ERROR (Status
)) {
1599 PciRootBridgeIo
= RootBridgeDev
->PciRootBridgeIo
;
1600 Status
= PciRootBridgeIo
->Configuration (PciRootBridgeIo
, (VOID
**) &Descriptors
);
1602 if (EFI_ERROR (Status
)) {
1606 Status
= PciGetBusRange (&Descriptors
, &MinBus
, NULL
, NULL
);
1608 if (EFI_ERROR (Status
)) {
1613 // Determine root bridge attribute by calling interface of Pcihostbridge
1616 DetermineRootBridgeAttributes (
1622 // Collect all the resource information under this root bridge
1623 // A database that records all the information about pci device subject to this
1624 // root bridge will then be created
1626 Status
= PciPciDeviceInfoCollector (
1631 if (EFI_ERROR (Status
)) {
1635 InsertRootBridge (RootBridgeDev
);
1638 // Record the hostbridge handle
1640 AddHostBridgeEnumerator (RootBridgeDev
->PciRootBridgeIo
->ParentHandle
);