2 Internal library implementation for PCI Bus module.
4 Copyright (c) 2006 - 2009, Intel Corporation
5 All rights reserved. This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
19 Retrieve the PCI Card device BAR information via PciIo interface.
21 @param PciIoDevice PCI Card device instance.
26 IN PCI_IO_DEVICE
*PciIoDevice
31 if (!FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
36 // Read PciBar information from the bar register
38 if (!gFullEnumeration
) {
40 PciIoDevice
->PciIo
.Pci
.Read (
41 &(PciIoDevice
->PciIo
),
43 PCI_CARD_MEMORY_BASE_0
,
48 (PciIoDevice
->PciBar
)[P2C_MEM_1
].BaseAddress
= (UINT64
) (Address
);
49 (PciIoDevice
->PciBar
)[P2C_MEM_1
].Length
= 0x2000000;
50 (PciIoDevice
->PciBar
)[P2C_MEM_1
].BarType
= PciBarTypeMem32
;
53 PciIoDevice
->PciIo
.Pci
.Read (
54 &(PciIoDevice
->PciIo
),
56 PCI_CARD_MEMORY_BASE_1
,
60 (PciIoDevice
->PciBar
)[P2C_MEM_2
].BaseAddress
= (UINT64
) (Address
);
61 (PciIoDevice
->PciBar
)[P2C_MEM_2
].Length
= 0x2000000;
62 (PciIoDevice
->PciBar
)[P2C_MEM_2
].BarType
= PciBarTypePMem32
;
65 PciIoDevice
->PciIo
.Pci
.Read (
66 &(PciIoDevice
->PciIo
),
68 PCI_CARD_IO_BASE_0_LOWER
,
72 (PciIoDevice
->PciBar
)[P2C_IO_1
].BaseAddress
= (UINT64
) (Address
);
73 (PciIoDevice
->PciBar
)[P2C_IO_1
].Length
= 0x100;
74 (PciIoDevice
->PciBar
)[P2C_IO_1
].BarType
= PciBarTypeIo16
;
77 PciIoDevice
->PciIo
.Pci
.Read (
78 &(PciIoDevice
->PciIo
),
80 PCI_CARD_IO_BASE_1_LOWER
,
84 (PciIoDevice
->PciBar
)[P2C_IO_2
].BaseAddress
= (UINT64
) (Address
);
85 (PciIoDevice
->PciBar
)[P2C_IO_2
].Length
= 0x100;
86 (PciIoDevice
->PciBar
)[P2C_IO_2
].BarType
= PciBarTypeIo16
;
90 if (gPciHotPlugInit
!= NULL
&& FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
91 GetResourcePaddingForHpb (PciIoDevice
);
96 Remove rejected pci device from specific root bridge
99 @param RootBridgeHandle Specific parent root bridge handle.
100 @param Bridge Bridge device instance.
104 RemoveRejectedPciDevices (
105 IN EFI_HANDLE RootBridgeHandle
,
106 IN PCI_IO_DEVICE
*Bridge
110 LIST_ENTRY
*CurrentLink
;
111 LIST_ENTRY
*LastLink
;
113 if (!FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
117 CurrentLink
= Bridge
->ChildList
.ForwardLink
;
119 while (CurrentLink
!= NULL
&& CurrentLink
!= &Bridge
->ChildList
) {
121 Temp
= PCI_IO_DEVICE_FROM_LINK (CurrentLink
);
123 if (IS_PCI_BRIDGE (&Temp
->Pci
)) {
125 // Remove rejected devices recusively
127 RemoveRejectedPciDevices (RootBridgeHandle
, Temp
);
130 // Skip rejection for all PPBs, while detect rejection for others
132 if (IsPciDeviceRejected (Temp
)) {
135 // For P2C, remove all devices on it
137 if (!IsListEmpty (&Temp
->ChildList
)) {
138 RemoveAllPciDeviceOnBridge (RootBridgeHandle
, Temp
);
142 // Finally remove itself
144 LastLink
= CurrentLink
->BackLink
;
145 RemoveEntryList (CurrentLink
);
146 FreePciDevice (Temp
);
148 CurrentLink
= LastLink
;
152 CurrentLink
= CurrentLink
->ForwardLink
;
157 Submits the I/O and memory resource requirements for the specified PCI Host Bridge.
159 @param PciResAlloc Point to protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
161 @retval EFI_SUCCESS Successfully finished resource allocation.
162 @retval EFI_NOT_FOUND Cannot get root bridge instance.
163 @retval EFI_OUT_OF_RESOURCES Platform failed to program the resources if no hot plug supported.
164 @retval other Some error occurred when allocating resources for the PCI Host Bridge.
166 @note Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.
170 PciHostBridgeResourceAllocator (
171 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
*PciResAlloc
174 PCI_IO_DEVICE
*RootBridgeDev
;
175 EFI_HANDLE RootBridgeHandle
;
184 UINT64 Mem32ResStatus
;
185 UINT64 PMem32ResStatus
;
186 UINT64 Mem64ResStatus
;
187 UINT64 PMem64ResStatus
;
188 UINT64 MaxOptionRomSize
;
189 PCI_RESOURCE_NODE
*IoBridge
;
190 PCI_RESOURCE_NODE
*Mem32Bridge
;
191 PCI_RESOURCE_NODE
*PMem32Bridge
;
192 PCI_RESOURCE_NODE
*Mem64Bridge
;
193 PCI_RESOURCE_NODE
*PMem64Bridge
;
194 PCI_RESOURCE_NODE IoPool
;
195 PCI_RESOURCE_NODE Mem32Pool
;
196 PCI_RESOURCE_NODE PMem32Pool
;
197 PCI_RESOURCE_NODE Mem64Pool
;
198 PCI_RESOURCE_NODE PMem64Pool
;
200 EFI_DEVICE_HANDLE_EXTENDED_DATA_PAYLOAD HandleExtendedData
;
201 EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA_PAYLOAD AllocFailExtendedData
;
209 // It may try several times if the resource allocation fails
213 // Initialize resource pool
215 InitializeResourcePool (&IoPool
, PciBarTypeIo16
);
216 InitializeResourcePool (&Mem32Pool
, PciBarTypeMem32
);
217 InitializeResourcePool (&PMem32Pool
, PciBarTypePMem32
);
218 InitializeResourcePool (&Mem64Pool
, PciBarTypeMem64
);
219 InitializeResourcePool (&PMem64Pool
, PciBarTypePMem64
);
221 RootBridgeDev
= NULL
;
222 RootBridgeHandle
= 0;
224 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
226 // Get Root Bridge Device by handle
228 RootBridgeDev
= GetRootBridgeByHandle (RootBridgeHandle
);
230 if (RootBridgeDev
== NULL
) {
231 return EFI_NOT_FOUND
;
235 // Create the entire system resource map from the information collected by
236 // enumerator. Several resource tree was created
240 // If non-stardard PCI Bridge I/O window alignment is supported,
241 // set I/O aligment to minimum possible alignment for root bridge.
243 IoBridge
= CreateResourceNode (
246 FeaturePcdGet (PcdPciBridgeIoAlignmentProbe
) ? 0x1FF: 0xFFF,
252 Mem32Bridge
= CreateResourceNode (
261 PMem32Bridge
= CreateResourceNode (
270 Mem64Bridge
= CreateResourceNode (
279 PMem64Bridge
= CreateResourceNode (
289 // Create resourcemap by going through all the devices subject to this root bridge
301 // Get the max ROM size that the root bridge can process
303 RootBridgeDev
->RomSize
= Mem32Bridge
->Length
;
306 // Skip to enlarge the resource request during realloction
310 // Get Max Option Rom size for current root bridge
312 MaxOptionRomSize
= GetMaxOptionRomSize (RootBridgeDev
);
315 // Enlarger the mem32 resource to accomdate the option rom
316 // if the mem32 resource is not enough to hold the rom
318 if (MaxOptionRomSize
> Mem32Bridge
->Length
) {
320 Mem32Bridge
->Length
= MaxOptionRomSize
;
321 RootBridgeDev
->RomSize
= MaxOptionRomSize
;
324 // Alignment should be adjusted as well
326 if (Mem32Bridge
->Alignment
< MaxOptionRomSize
- 1) {
327 Mem32Bridge
->Alignment
= MaxOptionRomSize
- 1;
333 // Based on the all the resource tree, contruct ACPI resource node to
334 // submit the resource aperture to pci host bridge protocol
336 Status
= ConstructAcpiResourceRequestor (
347 // Insert these resource nodes into the database
349 InsertResourceNode (&IoPool
, IoBridge
);
350 InsertResourceNode (&Mem32Pool
, Mem32Bridge
);
351 InsertResourceNode (&PMem32Pool
, PMem32Bridge
);
352 InsertResourceNode (&Mem64Pool
, Mem64Bridge
);
353 InsertResourceNode (&PMem64Pool
, PMem64Bridge
);
355 if (Status
== EFI_SUCCESS
) {
357 // Submit the resource requirement
359 Status
= PciResAlloc
->SubmitResources (
361 RootBridgeDev
->Handle
,
367 // Free acpi resource node
369 if (AcpiConfig
!= NULL
) {
370 FreePool (AcpiConfig
);
373 if (EFI_ERROR (Status
)) {
375 // Destroy all the resource tree
377 DestroyResourceTree (&IoPool
);
378 DestroyResourceTree (&Mem32Pool
);
379 DestroyResourceTree (&PMem32Pool
);
380 DestroyResourceTree (&Mem64Pool
);
381 DestroyResourceTree (&PMem64Pool
);
386 // End while, at least one Root Bridge should be found.
388 ASSERT (RootBridgeDev
!= NULL
);
391 // Notify platform to start to program the resource
393 Status
= NotifyPhase (PciResAlloc
, EfiPciHostBridgeAllocateResources
);
394 if (!FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
396 // If Hot Plug is not supported
398 if (EFI_ERROR (Status
)) {
400 // Allocation failed, then return
402 return EFI_OUT_OF_RESOURCES
;
405 // Allocation succeed.
406 // Get host bridge handle for status report, and then skip the main while
408 HandleExtendedData
.Handle
= RootBridgeDev
->PciRootBridgeIo
->ParentHandle
;
414 // If Hot Plug is supported
416 if (!EFI_ERROR (Status
)) {
418 // Allocation succeed, then continue the following
424 // If the resource allocation is unsuccessful, free resources on bridge
427 RootBridgeDev
= NULL
;
428 RootBridgeHandle
= 0;
430 IoResStatus
= EFI_RESOURCE_SATISFIED
;
431 Mem32ResStatus
= EFI_RESOURCE_SATISFIED
;
432 PMem32ResStatus
= EFI_RESOURCE_SATISFIED
;
433 Mem64ResStatus
= EFI_RESOURCE_SATISFIED
;
434 PMem64ResStatus
= EFI_RESOURCE_SATISFIED
;
436 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
438 // Get RootBridg Device by handle
440 RootBridgeDev
= GetRootBridgeByHandle (RootBridgeHandle
);
441 if (RootBridgeDev
== NULL
) {
442 return EFI_NOT_FOUND
;
446 // Get host bridge handle for status report
448 HandleExtendedData
.Handle
= RootBridgeDev
->PciRootBridgeIo
->ParentHandle
;
451 // Get acpi resource node for all the resource types
455 Status
= PciResAlloc
->GetProposedResources (
457 RootBridgeDev
->Handle
,
461 if (EFI_ERROR (Status
)) {
465 if (AcpiConfig
!= NULL
) {
467 // Adjust resource allocation policy for each RB
469 GetResourceAllocationStatus (
477 FreePool (AcpiConfig
);
485 // Raise the EFI_IOB_EC_RESOURCE_CONFLICT status code
488 // It is very difficult to follow the spec here
489 // Device path , Bar index can not be get here
491 ZeroMem (&AllocFailExtendedData
, sizeof (AllocFailExtendedData
));
493 REPORT_STATUS_CODE_WITH_EXTENDED_DATA (
495 EFI_IO_BUS_PCI
| EFI_IOB_EC_RESOURCE_CONFLICT
,
496 (VOID
*) &AllocFailExtendedData
,
497 sizeof (AllocFailExtendedData
)
500 Status
= PciHostBridgeAdjustAllocation (
514 // Destroy all the resource tree
516 DestroyResourceTree (&IoPool
);
517 DestroyResourceTree (&Mem32Pool
);
518 DestroyResourceTree (&PMem32Pool
);
519 DestroyResourceTree (&Mem64Pool
);
520 DestroyResourceTree (&PMem64Pool
);
522 NotifyPhase (PciResAlloc
, EfiPciHostBridgeFreeResources
);
524 if (EFI_ERROR (Status
)) {
536 // Raise the EFI_IOB_PCI_RES_ALLOC status code
538 REPORT_STATUS_CODE_WITH_EXTENDED_DATA (
540 EFI_IO_BUS_PCI
| EFI_IOB_PCI_PC_RES_ALLOC
,
541 (VOID
*) &HandleExtendedData
,
542 sizeof (HandleExtendedData
)
546 // Notify pci bus driver starts to program the resource
548 NotifyPhase (PciResAlloc
, EfiPciHostBridgeSetResources
);
550 RootBridgeDev
= NULL
;
552 RootBridgeHandle
= 0;
554 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
556 // Get RootBridg Device by handle
558 RootBridgeDev
= GetRootBridgeByHandle (RootBridgeHandle
);
560 if (RootBridgeDev
== NULL
) {
561 return EFI_NOT_FOUND
;
565 // Get acpi resource node for all the resource types
568 Status
= PciResAlloc
->GetProposedResources (
570 RootBridgeDev
->Handle
,
574 if (EFI_ERROR (Status
)) {
579 // Get the resource base by interpreting acpi resource node
592 // Process option rom for this root bridge
594 ProcessOptionRom (RootBridgeDev
, Mem32Base
, RootBridgeDev
->RomSize
);
597 // Create the entire system resource map from the information collected by
598 // enumerator. Several resource tree was created
615 // Program IO resources
623 // Program Mem32 resources
631 // Program PMem32 resources
639 // Program Mem64 resources
647 // Program PMem64 resources
654 FreePool (AcpiConfig
);
658 // Destroy all the resource tree
660 DestroyResourceTree (&IoPool
);
661 DestroyResourceTree (&Mem32Pool
);
662 DestroyResourceTree (&PMem32Pool
);
663 DestroyResourceTree (&Mem64Pool
);
664 DestroyResourceTree (&PMem64Pool
);
667 // Notify the resource allocation phase is to end
669 NotifyPhase (PciResAlloc
, EfiPciHostBridgeEndResourceAllocation
);
675 Scan pci bus and assign bus number to the given PCI bus system.
677 @param Bridge Bridge device instance.
678 @param StartBusNumber start point.
679 @param SubBusNumber Point to sub bus number.
680 @param PaddedBusRange Customized bus number.
682 @retval EFI_SUCCESS Successfully scanned and assigned bus number.
683 @retval other Some error occurred when scanning pci bus.
685 @note Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.
690 IN PCI_IO_DEVICE
*Bridge
,
691 IN UINT8 StartBusNumber
,
692 OUT UINT8
*SubBusNumber
,
693 OUT UINT8
*PaddedBusRange
704 PCI_IO_DEVICE
*PciDevice
;
708 EFI_HPC_PADDING_ATTRIBUTES Attributes
;
709 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Descriptors
;
711 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*PciRootBridgeIo
;
713 UINT32 TempReservedBusNum
;
715 PciRootBridgeIo
= Bridge
->PciRootBridgeIo
;
719 Attributes
= (EFI_HPC_PADDING_ATTRIBUTES
) 0;
725 for (Device
= 0; Device
<= PCI_MAX_DEVICE
; Device
++) {
726 TempReservedBusNum
= 0;
727 for (Func
= 0; Func
<= PCI_MAX_FUNC
; Func
++) {
730 // Check to see whether a pci device is present
732 Status
= PciDevicePresent (
740 if (EFI_ERROR (Status
)) {
743 // Skip sub functions, this is not a multi function device
751 DEBUG((EFI_D_INFO
, "Found DEV(%02d,%02d,%02d)\n", StartBusNumber
, Device
, Func
));
753 if (FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
755 // Get the PCI device information
757 Status
= PciSearchDevice (
766 ASSERT (!EFI_ERROR (Status
));
768 PciAddress
= EFI_PCI_ADDRESS (StartBusNumber
, Device
, Func
, 0);
770 if (!IS_PCI_BRIDGE (&Pci
)) {
772 // PCI bridges will be called later
773 // Here just need for PCI device or PCI to cardbus controller
774 // EfiPciBeforeChildBusEnumeration for PCI Device Node
776 PreprocessController (
778 PciDevice
->BusNumber
,
779 PciDevice
->DeviceNumber
,
780 PciDevice
->FunctionNumber
,
781 EfiPciBeforeChildBusEnumeration
786 // For Pci Hotplug controller devcie only
788 if (gPciHotPlugInit
!= NULL
) {
790 // Check if it is a Hotplug PCI controller
792 if (IsRootPciHotPlugController (PciDevice
->DevicePath
, &HpIndex
)) {
794 if (!gPciRootHpcData
[HpIndex
].Initialized
) {
796 Status
= CreateEventForHpc (HpIndex
, &Event
);
798 ASSERT (!EFI_ERROR (Status
));
800 Status
= gPciHotPlugInit
->InitializeRootHpc (
802 gPciRootHpcPool
[HpIndex
].HpcDevicePath
,
808 PreprocessController (
810 PciDevice
->BusNumber
,
811 PciDevice
->DeviceNumber
,
812 PciDevice
->FunctionNumber
,
813 EfiPciBeforeChildBusEnumeration
820 if (IS_PCI_BRIDGE (&Pci
) || IS_CARDBUS_BRIDGE (&Pci
)) {
824 if (!FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
826 // If Hot Plug is not supported,
827 // get the bridge information
829 Status
= PciSearchDevice (
838 if (EFI_ERROR (Status
)) {
843 // If Hot Plug is supported,
844 // Get the bridge information
847 if (gPciHotPlugInit
!= NULL
) {
849 if (IsRootPciHotPlugBus (PciDevice
->DevicePath
, &HpIndex
)) {
852 // If it is initialized, get the padded bus range
854 Status
= gPciHotPlugInit
->GetResourcePadding (
856 gPciRootHpcPool
[HpIndex
].HpbDevicePath
,
859 (VOID
**) &Descriptors
,
863 if (EFI_ERROR (Status
)) {
868 Status
= PciGetBusRange (
875 FreePool (Descriptors
);
877 if (EFI_ERROR (Status
)) {
887 // Add feature to support customized secondary bus number
889 if (*SubBusNumber
== 0) {
890 *SubBusNumber
= *PaddedBusRange
;
895 SecondBus
= *SubBusNumber
;
897 Register
= (UINT16
) ((SecondBus
<< 8) | (UINT16
) StartBusNumber
);
898 Address
= EFI_PCI_ADDRESS (StartBusNumber
, Device
, Func
, PCI_BRIDGE_PRIMARY_BUS_REGISTER_OFFSET
);
900 Status
= PciRootBridgeIo
->Pci
.Write (
910 // If it is PPB, resursively search down this bridge
912 if (IS_PCI_BRIDGE (&Pci
)) {
915 // Temporarily initialize SubBusNumber to maximum bus number to ensure the
916 // PCI configuration transaction to go through any PPB
919 Address
= EFI_PCI_ADDRESS (StartBusNumber
, Device
, Func
, PCI_BRIDGE_SUBORDINATE_BUS_REGISTER_OFFSET
);
920 Status
= PciRootBridgeIo
->Pci
.Write (
929 // Nofify EfiPciBeforeChildBusEnumeration for PCI Brige
931 PreprocessController (
933 PciDevice
->BusNumber
,
934 PciDevice
->DeviceNumber
,
935 PciDevice
->FunctionNumber
,
936 EfiPciBeforeChildBusEnumeration
939 DEBUG((EFI_D_INFO
, "Scan PPB(%02d,%02d,%02d)\n", PciDevice
->BusNumber
, PciDevice
->DeviceNumber
,PciDevice
->FunctionNumber
));
940 Status
= PciScanBus (
946 if (EFI_ERROR (Status
)) {
951 if (FeaturePcdGet (PcdPciBusHotplugDeviceSupport
) && BusPadding
) {
953 // Ensure the device is enabled and initialized
955 if ((Attributes
== EfiPaddingPciRootBridge
) &&
956 (State
& EFI_HPC_STATE_ENABLED
) != 0 &&
957 (State
& EFI_HPC_STATE_INITIALIZED
) != 0) {
958 *PaddedBusRange
= (UINT8
) ((UINT8
) (BusRange
) +*PaddedBusRange
);
960 *SubBusNumber
= (UINT8
) ((UINT8
) (BusRange
) +*SubBusNumber
);
965 // Set the current maximum bus number under the PPB
967 Address
= EFI_PCI_ADDRESS (StartBusNumber
, Device
, Func
, PCI_BRIDGE_SUBORDINATE_BUS_REGISTER_OFFSET
);
969 Status
= PciRootBridgeIo
->Pci
.Write (
978 // It is device. Check PCI IOV for Bus reservation
980 if (PciDevice
== NULL
) {
982 // No PciDevice found, conitue Scan
987 // Go through each function, just reserve the MAX ReservedBusNum for one device
989 if ((PciDevice
->AriCapabilityOffset
!= 0) && ((FeaturePcdGet(PcdSrIovSupport
)& EFI_PCI_IOV_POLICY_SRIOV
) != 0)) {
991 if (TempReservedBusNum
< PciDevice
->ReservedBusNum
) {
993 (*SubBusNumber
) = (UINT8
)((*SubBusNumber
) + PciDevice
->ReservedBusNum
- TempReservedBusNum
);
994 TempReservedBusNum
= PciDevice
->ReservedBusNum
;
997 DEBUG ((EFI_D_INFO
, "PCI-IOV ScanBus - SubBusNumber - 0x%x\n", *SubBusNumber
));
999 DEBUG ((EFI_D_INFO
, "PCI-IOV ScanBus - SubBusNumber - 0x%x (Update)\n", *SubBusNumber
));
1005 if (Func
== 0 && !IS_PCI_MULTI_FUNC (&Pci
)) {
1008 // Skip sub functions, this is not a multi function device
1011 Func
= PCI_MAX_FUNC
;
1020 Process Option Rom on the specified root bridge.
1022 @param Bridge Pci root bridge device instance.
1024 @retval EFI_SUCCESS Success process.
1025 @retval other Some error occurred when processing Option Rom on the root bridge.
1029 PciRootBridgeP2CProcess (
1030 IN PCI_IO_DEVICE
*Bridge
1033 LIST_ENTRY
*CurrentLink
;
1034 PCI_IO_DEVICE
*Temp
;
1035 EFI_HPC_STATE State
;
1039 CurrentLink
= Bridge
->ChildList
.ForwardLink
;
1041 while (CurrentLink
!= NULL
&& CurrentLink
!= &Bridge
->ChildList
) {
1043 Temp
= PCI_IO_DEVICE_FROM_LINK (CurrentLink
);
1045 if (IS_CARDBUS_BRIDGE (&Temp
->Pci
)) {
1047 if (gPciHotPlugInit
!= NULL
&& Temp
->Allocated
&& FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
1050 // Raise the EFI_IOB_PCI_HPC_INIT status code
1052 REPORT_STATUS_CODE_WITH_DEVICE_PATH (
1054 EFI_IO_BUS_PCI
| EFI_IOB_PCI_PC_HPC_INIT
,
1058 PciAddress
= EFI_PCI_ADDRESS (Temp
->BusNumber
, Temp
->DeviceNumber
, Temp
->FunctionNumber
, 0);
1059 Status
= gPciHotPlugInit
->InitializeRootHpc (
1067 if (!EFI_ERROR (Status
)) {
1068 Status
= PciBridgeEnumerator (Temp
);
1070 if (EFI_ERROR (Status
)) {
1075 CurrentLink
= CurrentLink
->ForwardLink
;
1081 if (!IsListEmpty (&Temp
->ChildList
)) {
1082 Status
= PciRootBridgeP2CProcess (Temp
);
1085 CurrentLink
= CurrentLink
->ForwardLink
;
1092 Process Option Rom on the specified host bridge.
1094 @param PciResAlloc Pointer to instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
1096 @retval EFI_SUCCESS Success process.
1097 @retval EFI_NOT_FOUND Can not find the root bridge instance.
1098 @retval other Some error occurred when processing Option Rom on the host bridge.
1102 PciHostBridgeP2CProcess (
1103 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
*PciResAlloc
1106 EFI_HANDLE RootBridgeHandle
;
1107 PCI_IO_DEVICE
*RootBridgeDev
;
1110 if (!FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
1114 RootBridgeHandle
= NULL
;
1116 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
1119 // Get RootBridg Device by handle
1121 RootBridgeDev
= GetRootBridgeByHandle (RootBridgeHandle
);
1123 if (RootBridgeDev
== NULL
) {
1124 return EFI_NOT_FOUND
;
1127 Status
= PciRootBridgeP2CProcess (RootBridgeDev
);
1128 if (EFI_ERROR (Status
)) {
1138 This function is used to enumerate the entire host bridge
1139 in a given platform.
1141 @param PciResAlloc A pointer to the PCI Host Resource Allocation protocol.
1143 @retval EFI_SUCCESS Successfully enumerated the host bridge.
1144 @retval EFI_OUT_OF_RESOURCES No enough memory available.
1145 @retval other Some error occurred when enumerating the host bridge.
1149 PciHostBridgeEnumerator (
1150 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
*PciResAlloc
1153 EFI_HANDLE RootBridgeHandle
;
1154 PCI_IO_DEVICE
*RootBridgeDev
;
1156 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*PciRootBridgeIo
;
1158 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Descriptors
;
1159 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Configuration
;
1160 UINT8 StartBusNumber
;
1161 LIST_ENTRY RootBridgeList
;
1164 if (FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
1165 InitializeHotPlugSupport ();
1168 InitializeListHead (&RootBridgeList
);
1171 // Notify the bus allocation phase is about to start
1173 NotifyPhase (PciResAlloc
, EfiPciHostBridgeBeginBusAllocation
);
1175 DEBUG((EFI_D_INFO
, "PCI Bus First Scanning\n"));
1176 RootBridgeHandle
= NULL
;
1177 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
1180 // if a root bridge instance is found, create root bridge device for it
1183 RootBridgeDev
= CreateRootBridge (RootBridgeHandle
);
1185 if (RootBridgeDev
== NULL
) {
1186 return EFI_OUT_OF_RESOURCES
;
1190 // Enumerate all the buses under this root bridge
1192 Status
= PciRootBridgeEnumerator (
1197 if (gPciHotPlugInit
!= NULL
&& FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
1198 InsertTailList (&RootBridgeList
, &(RootBridgeDev
->Link
));
1200 DestroyRootBridge (RootBridgeDev
);
1202 if (EFI_ERROR (Status
)) {
1208 // Notify the bus allocation phase is finished for the first time
1210 NotifyPhase (PciResAlloc
, EfiPciHostBridgeEndBusAllocation
);
1212 if (gPciHotPlugInit
!= NULL
&& FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
1214 // Reset all assigned PCI bus number in all PPB
1216 RootBridgeHandle
= NULL
;
1217 Link
= GetFirstNode (&RootBridgeList
);
1218 while ((PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) &&
1219 (!IsNull (&RootBridgeList
, Link
))) {
1220 RootBridgeDev
= PCI_IO_DEVICE_FROM_LINK (Link
);
1222 // Get the Bus information
1224 Status
= PciResAlloc
->StartBusEnumeration (
1227 (VOID
**) &Configuration
1229 if (EFI_ERROR (Status
)) {
1234 // Get the bus number to start with
1236 StartBusNumber
= (UINT8
) (Configuration
->AddrRangeMin
);
1238 ResetAllPpbBusNumber (
1243 FreePool (Configuration
);
1244 Link
= GetNextNode (&RootBridgeList
, Link
);
1245 DestroyRootBridge (RootBridgeDev
);
1249 // Wait for all HPC initialized
1251 Status
= AllRootHPCInitialized (STALL_1_SECOND
* 15);
1253 if (EFI_ERROR (Status
)) {
1258 // Notify the bus allocation phase is about to start for the 2nd time
1260 NotifyPhase (PciResAlloc
, EfiPciHostBridgeBeginBusAllocation
);
1262 DEBUG((EFI_D_INFO
, "PCI Bus Second Scanning\n"));
1263 RootBridgeHandle
= NULL
;
1264 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
1267 // if a root bridge instance is found, create root bridge device for it
1269 RootBridgeDev
= CreateRootBridge (RootBridgeHandle
);
1271 if (RootBridgeDev
== NULL
) {
1272 return EFI_OUT_OF_RESOURCES
;
1276 // Enumerate all the buses under this root bridge
1278 Status
= PciRootBridgeEnumerator (
1283 DestroyRootBridge (RootBridgeDev
);
1284 if (EFI_ERROR (Status
)) {
1290 // Notify the bus allocation phase is to end for the 2nd time
1292 NotifyPhase (PciResAlloc
, EfiPciHostBridgeEndBusAllocation
);
1296 // Notify the resource allocation phase is to start
1298 NotifyPhase (PciResAlloc
, EfiPciHostBridgeBeginResourceAllocation
);
1300 RootBridgeHandle
= NULL
;
1301 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
1304 // if a root bridge instance is found, create root bridge device for it
1306 RootBridgeDev
= CreateRootBridge (RootBridgeHandle
);
1308 if (RootBridgeDev
== NULL
) {
1309 return EFI_OUT_OF_RESOURCES
;
1312 Status
= StartManagingRootBridge (RootBridgeDev
);
1314 if (EFI_ERROR (Status
)) {
1318 PciRootBridgeIo
= RootBridgeDev
->PciRootBridgeIo
;
1319 Status
= PciRootBridgeIo
->Configuration (PciRootBridgeIo
, (VOID
**) &Descriptors
);
1321 if (EFI_ERROR (Status
)) {
1325 Status
= PciGetBusRange (&Descriptors
, &MinBus
, NULL
, NULL
);
1327 if (EFI_ERROR (Status
)) {
1332 // Determine root bridge attribute by calling interface of Pcihostbridge
1335 DetermineRootBridgeAttributes (
1341 // Collect all the resource information under this root bridge
1342 // A database that records all the information about pci device subject to this
1343 // root bridge will then be created
1345 Status
= PciPciDeviceInfoCollector (
1350 if (EFI_ERROR (Status
)) {
1354 InsertRootBridge (RootBridgeDev
);
1357 // Record the hostbridge handle
1359 AddHostBridgeEnumerator (RootBridgeDev
->PciRootBridgeIo
->ParentHandle
);