2 Internal library implementation for PCI Bus module.
4 Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 GLOBAL_REMOVE_IF_UNREFERENCED
18 CHAR16
*mBarTypeStr
[] = {
32 Retrieve the PCI Card device BAR information via PciIo interface.
34 @param PciIoDevice PCI Card device instance.
39 IN PCI_IO_DEVICE
*PciIoDevice
44 if (!FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
49 // Read PciBar information from the bar register
51 if (!gFullEnumeration
) {
53 PciIoDevice
->PciIo
.Pci
.Read (
54 &(PciIoDevice
->PciIo
),
56 PCI_CARD_MEMORY_BASE_0
,
61 (PciIoDevice
->PciBar
)[P2C_MEM_1
].BaseAddress
= (UINT64
) (Address
);
62 (PciIoDevice
->PciBar
)[P2C_MEM_1
].Length
= 0x2000000;
63 (PciIoDevice
->PciBar
)[P2C_MEM_1
].BarType
= PciBarTypeMem32
;
66 PciIoDevice
->PciIo
.Pci
.Read (
67 &(PciIoDevice
->PciIo
),
69 PCI_CARD_MEMORY_BASE_1
,
73 (PciIoDevice
->PciBar
)[P2C_MEM_2
].BaseAddress
= (UINT64
) (Address
);
74 (PciIoDevice
->PciBar
)[P2C_MEM_2
].Length
= 0x2000000;
75 (PciIoDevice
->PciBar
)[P2C_MEM_2
].BarType
= PciBarTypePMem32
;
78 PciIoDevice
->PciIo
.Pci
.Read (
79 &(PciIoDevice
->PciIo
),
81 PCI_CARD_IO_BASE_0_LOWER
,
85 (PciIoDevice
->PciBar
)[P2C_IO_1
].BaseAddress
= (UINT64
) (Address
);
86 (PciIoDevice
->PciBar
)[P2C_IO_1
].Length
= 0x100;
87 (PciIoDevice
->PciBar
)[P2C_IO_1
].BarType
= PciBarTypeIo16
;
90 PciIoDevice
->PciIo
.Pci
.Read (
91 &(PciIoDevice
->PciIo
),
93 PCI_CARD_IO_BASE_1_LOWER
,
97 (PciIoDevice
->PciBar
)[P2C_IO_2
].BaseAddress
= (UINT64
) (Address
);
98 (PciIoDevice
->PciBar
)[P2C_IO_2
].Length
= 0x100;
99 (PciIoDevice
->PciBar
)[P2C_IO_2
].BarType
= PciBarTypeIo16
;
103 if (gPciHotPlugInit
!= NULL
&& FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
104 GetResourcePaddingForHpb (PciIoDevice
);
109 Remove rejected pci device from specific root bridge
112 @param RootBridgeHandle Specific parent root bridge handle.
113 @param Bridge Bridge device instance.
117 RemoveRejectedPciDevices (
118 IN EFI_HANDLE RootBridgeHandle
,
119 IN PCI_IO_DEVICE
*Bridge
123 LIST_ENTRY
*CurrentLink
;
124 LIST_ENTRY
*LastLink
;
126 if (!FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
130 CurrentLink
= Bridge
->ChildList
.ForwardLink
;
132 while (CurrentLink
!= NULL
&& CurrentLink
!= &Bridge
->ChildList
) {
134 Temp
= PCI_IO_DEVICE_FROM_LINK (CurrentLink
);
136 if (IS_PCI_BRIDGE (&Temp
->Pci
)) {
138 // Remove rejected devices recusively
140 RemoveRejectedPciDevices (RootBridgeHandle
, Temp
);
143 // Skip rejection for all PPBs, while detect rejection for others
145 if (IsPciDeviceRejected (Temp
)) {
148 // For P2C, remove all devices on it
150 if (!IsListEmpty (&Temp
->ChildList
)) {
151 RemoveAllPciDeviceOnBridge (RootBridgeHandle
, Temp
);
155 // Finally remove itself
157 LastLink
= CurrentLink
->BackLink
;
158 RemoveEntryList (CurrentLink
);
159 FreePciDevice (Temp
);
161 CurrentLink
= LastLink
;
165 CurrentLink
= CurrentLink
->ForwardLink
;
170 Dump the resourc map of the bridge device.
172 @param[in] BridgeResource Resource descriptor of the bridge device.
176 IN PCI_RESOURCE_NODE
*BridgeResource
180 PCI_RESOURCE_NODE
*Resource
;
183 if ((BridgeResource
!= NULL
) && (BridgeResource
->Length
!= 0)) {
185 EFI_D_INFO
, "Type = %s; Base = 0x%x;\tLength = 0x%x;\tAlignment = 0x%x\n",
186 mBarTypeStr
[MIN (BridgeResource
->ResType
, PciBarTypeMaxType
)],
187 BridgeResource
->PciDev
->PciBar
[BridgeResource
->Bar
].BaseAddress
,
188 BridgeResource
->Length
, BridgeResource
->Alignment
190 for ( Link
= BridgeResource
->ChildList
.ForwardLink
191 ; Link
!= &BridgeResource
->ChildList
192 ; Link
= Link
->ForwardLink
194 Resource
= RESOURCE_NODE_FROM_LINK (Link
);
195 if (Resource
->ResourceUsage
== PciResUsageTypical
) {
196 Bar
= Resource
->Virtual
? Resource
->PciDev
->VfPciBar
: Resource
->PciDev
->PciBar
;
198 EFI_D_INFO
, " Base = 0x%x;\tLength = 0x%x;\tAlignment = 0x%x;\tOwner = %s ",
199 Bar
[Resource
->Bar
].BaseAddress
, Resource
->Length
, Resource
->Alignment
,
200 IS_PCI_BRIDGE (&Resource
->PciDev
->Pci
) ? L
"PPB" :
201 IS_CARDBUS_BRIDGE (&Resource
->PciDev
->Pci
) ? L
"P2C" :
205 if ((!IS_PCI_BRIDGE (&Resource
->PciDev
->Pci
) && !IS_CARDBUS_BRIDGE (&Resource
->PciDev
->Pci
)) ||
206 (IS_PCI_BRIDGE (&Resource
->PciDev
->Pci
) && (Resource
->Bar
< PPB_IO_RANGE
)) ||
207 (IS_CARDBUS_BRIDGE (&Resource
->PciDev
->Pci
) && (Resource
->Bar
< P2C_MEM_1
))
210 // The resource requirement comes from the device itself.
213 EFI_D_INFO
, " [%02x|%02x|%02x:%02x]\n",
214 Resource
->PciDev
->BusNumber
, Resource
->PciDev
->DeviceNumber
,
215 Resource
->PciDev
->FunctionNumber
, Bar
[Resource
->Bar
].Offset
219 // The resource requirement comes from the subordinate devices.
222 EFI_D_INFO
, " [%02x|%02x|%02x:**]\n",
223 Resource
->PciDev
->BusNumber
, Resource
->PciDev
->DeviceNumber
,
224 Resource
->PciDev
->FunctionNumber
228 DEBUG ((EFI_D_INFO
, " Padding:Length = 0x%x;\tAlignment = 0x%x\n", Resource
->Length
, Resource
->Alignment
));
235 Find the corresponding resource node for the Device in child list of BridgeResource.
237 @param[in] Device Pointer to PCI_IO_DEVICE.
238 @param[in] BridgeResource Pointer to PCI_RESOURCE_NODE.
240 @return !NULL The corresponding resource node for the Device.
241 @return NULL No corresponding resource node for the Device.
245 IN PCI_IO_DEVICE
*Device
,
246 IN PCI_RESOURCE_NODE
*BridgeResource
250 PCI_RESOURCE_NODE
*Resource
;
252 for ( Link
= BridgeResource
->ChildList
.ForwardLink
253 ; Link
!= &BridgeResource
->ChildList
254 ; Link
= Link
->ForwardLink
256 Resource
= RESOURCE_NODE_FROM_LINK (Link
);
257 if (Resource
->PciDev
== Device
) {
266 Dump the resource map of all the devices under Bridge.
268 @param[in] Bridge Bridge device instance.
269 @param[in] IoNode IO resource descriptor for the bridge device.
270 @param[in] Mem32Node Mem32 resource descriptor for the bridge device.
271 @param[in] PMem32Node PMem32 resource descriptor for the bridge device.
272 @param[in] Mem64Node Mem64 resource descriptor for the bridge device.
273 @param[in] PMem64Node PMem64 resource descriptor for the bridge device.
277 IN PCI_IO_DEVICE
*Bridge
,
278 IN PCI_RESOURCE_NODE
*IoNode
,
279 IN PCI_RESOURCE_NODE
*Mem32Node
,
280 IN PCI_RESOURCE_NODE
*PMem32Node
,
281 IN PCI_RESOURCE_NODE
*Mem64Node
,
282 IN PCI_RESOURCE_NODE
*PMem64Node
287 PCI_IO_DEVICE
*Device
;
288 PCI_RESOURCE_NODE
*ChildIoNode
;
289 PCI_RESOURCE_NODE
*ChildMem32Node
;
290 PCI_RESOURCE_NODE
*ChildPMem32Node
;
291 PCI_RESOURCE_NODE
*ChildMem64Node
;
292 PCI_RESOURCE_NODE
*ChildPMem64Node
;
293 EFI_DEVICE_PATH_TO_TEXT_PROTOCOL
*ToText
;
296 DEBUG ((EFI_D_INFO
, "PciBus: Resource Map for "));
298 Status
= gBS
->OpenProtocol (
300 &gEfiPciRootBridgeIoProtocolGuid
,
304 EFI_OPEN_PROTOCOL_TEST_PROTOCOL
306 if (EFI_ERROR (Status
)) {
308 EFI_D_INFO
, "Bridge [%02x|%02x|%02x]\n",
309 Bridge
->BusNumber
, Bridge
->DeviceNumber
, Bridge
->FunctionNumber
312 Status
= gBS
->LocateProtocol (
313 &gEfiDevicePathToTextProtocolGuid
,
318 if (!EFI_ERROR (Status
)) {
319 Str
= ToText
->ConvertDevicePathToText (
320 DevicePathFromHandle (Bridge
->Handle
),
325 DEBUG ((EFI_D_INFO
, "Root Bridge %s\n", Str
!= NULL
? Str
: L
""));
331 DumpBridgeResource (IoNode
);
332 DumpBridgeResource (Mem32Node
);
333 DumpBridgeResource (PMem32Node
);
334 DumpBridgeResource (Mem64Node
);
335 DumpBridgeResource (PMem64Node
);
336 DEBUG ((EFI_D_INFO
, "\n"));
338 for ( Link
= Bridge
->ChildList
.ForwardLink
339 ; Link
!= &Bridge
->ChildList
340 ; Link
= Link
->ForwardLink
342 Device
= PCI_IO_DEVICE_FROM_LINK (Link
);
343 if (IS_PCI_BRIDGE (&Device
->Pci
)) {
345 ChildIoNode
= (IoNode
== NULL
? NULL
: FindResourceNode (Device
, IoNode
));
346 ChildMem32Node
= (Mem32Node
== NULL
? NULL
: FindResourceNode (Device
, Mem32Node
));
347 ChildPMem32Node
= (PMem32Node
== NULL
? NULL
: FindResourceNode (Device
, PMem32Node
));
348 ChildMem64Node
= (Mem64Node
== NULL
? NULL
: FindResourceNode (Device
, Mem64Node
));
349 ChildPMem64Node
= (PMem64Node
== NULL
? NULL
: FindResourceNode (Device
, PMem64Node
));
364 Submits the I/O and memory resource requirements for the specified PCI Host Bridge.
366 @param PciResAlloc Point to protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
368 @retval EFI_SUCCESS Successfully finished resource allocation.
369 @retval EFI_NOT_FOUND Cannot get root bridge instance.
370 @retval EFI_OUT_OF_RESOURCES Platform failed to program the resources if no hot plug supported.
371 @retval other Some error occurred when allocating resources for the PCI Host Bridge.
373 @note Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.
377 PciHostBridgeResourceAllocator (
378 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
*PciResAlloc
381 PCI_IO_DEVICE
*RootBridgeDev
;
382 EFI_HANDLE RootBridgeHandle
;
391 UINT64 Mem32ResStatus
;
392 UINT64 PMem32ResStatus
;
393 UINT64 Mem64ResStatus
;
394 UINT64 PMem64ResStatus
;
395 UINT64 MaxOptionRomSize
;
396 PCI_RESOURCE_NODE
*IoBridge
;
397 PCI_RESOURCE_NODE
*Mem32Bridge
;
398 PCI_RESOURCE_NODE
*PMem32Bridge
;
399 PCI_RESOURCE_NODE
*Mem64Bridge
;
400 PCI_RESOURCE_NODE
*PMem64Bridge
;
401 PCI_RESOURCE_NODE IoPool
;
402 PCI_RESOURCE_NODE Mem32Pool
;
403 PCI_RESOURCE_NODE PMem32Pool
;
404 PCI_RESOURCE_NODE Mem64Pool
;
405 PCI_RESOURCE_NODE PMem64Pool
;
407 EFI_DEVICE_HANDLE_EXTENDED_DATA_PAYLOAD HandleExtendedData
;
408 EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA_PAYLOAD AllocFailExtendedData
;
416 // It may try several times if the resource allocation fails
420 // Initialize resource pool
422 InitializeResourcePool (&IoPool
, PciBarTypeIo16
);
423 InitializeResourcePool (&Mem32Pool
, PciBarTypeMem32
);
424 InitializeResourcePool (&PMem32Pool
, PciBarTypePMem32
);
425 InitializeResourcePool (&Mem64Pool
, PciBarTypeMem64
);
426 InitializeResourcePool (&PMem64Pool
, PciBarTypePMem64
);
428 RootBridgeDev
= NULL
;
429 RootBridgeHandle
= 0;
431 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
433 // Get Root Bridge Device by handle
435 RootBridgeDev
= GetRootBridgeByHandle (RootBridgeHandle
);
437 if (RootBridgeDev
== NULL
) {
438 return EFI_NOT_FOUND
;
442 // Create the entire system resource map from the information collected by
443 // enumerator. Several resource tree was created
447 // If non-stardard PCI Bridge I/O window alignment is supported,
448 // set I/O aligment to minimum possible alignment for root bridge.
450 IoBridge
= CreateResourceNode (
453 FeaturePcdGet (PcdPciBridgeIoAlignmentProbe
) ? 0x1FF: 0xFFF,
459 Mem32Bridge
= CreateResourceNode (
468 PMem32Bridge
= CreateResourceNode (
477 Mem64Bridge
= CreateResourceNode (
486 PMem64Bridge
= CreateResourceNode (
496 // Create resourcemap by going through all the devices subject to this root bridge
508 // Get the max ROM size that the root bridge can process
510 RootBridgeDev
->RomSize
= Mem32Bridge
->Length
;
513 // Skip to enlarge the resource request during realloction
517 // Get Max Option Rom size for current root bridge
519 MaxOptionRomSize
= GetMaxOptionRomSize (RootBridgeDev
);
522 // Enlarger the mem32 resource to accomdate the option rom
523 // if the mem32 resource is not enough to hold the rom
525 if (MaxOptionRomSize
> Mem32Bridge
->Length
) {
527 Mem32Bridge
->Length
= MaxOptionRomSize
;
528 RootBridgeDev
->RomSize
= MaxOptionRomSize
;
531 // Alignment should be adjusted as well
533 if (Mem32Bridge
->Alignment
< MaxOptionRomSize
- 1) {
534 Mem32Bridge
->Alignment
= MaxOptionRomSize
- 1;
540 // Based on the all the resource tree, contruct ACPI resource node to
541 // submit the resource aperture to pci host bridge protocol
543 Status
= ConstructAcpiResourceRequestor (
554 // Insert these resource nodes into the database
556 InsertResourceNode (&IoPool
, IoBridge
);
557 InsertResourceNode (&Mem32Pool
, Mem32Bridge
);
558 InsertResourceNode (&PMem32Pool
, PMem32Bridge
);
559 InsertResourceNode (&Mem64Pool
, Mem64Bridge
);
560 InsertResourceNode (&PMem64Pool
, PMem64Bridge
);
562 if (Status
== EFI_SUCCESS
) {
564 // Submit the resource requirement
566 Status
= PciResAlloc
->SubmitResources (
568 RootBridgeDev
->Handle
,
574 // Free acpi resource node
576 if (AcpiConfig
!= NULL
) {
577 FreePool (AcpiConfig
);
580 if (EFI_ERROR (Status
)) {
582 // Destroy all the resource tree
584 DestroyResourceTree (&IoPool
);
585 DestroyResourceTree (&Mem32Pool
);
586 DestroyResourceTree (&PMem32Pool
);
587 DestroyResourceTree (&Mem64Pool
);
588 DestroyResourceTree (&PMem64Pool
);
593 // End while, at least one Root Bridge should be found.
595 ASSERT (RootBridgeDev
!= NULL
);
598 // Notify platform to start to program the resource
600 Status
= NotifyPhase (PciResAlloc
, EfiPciHostBridgeAllocateResources
);
601 if (!FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
603 // If Hot Plug is not supported
605 if (EFI_ERROR (Status
)) {
607 // Allocation failed, then return
609 return EFI_OUT_OF_RESOURCES
;
612 // Allocation succeed.
613 // Get host bridge handle for status report, and then skip the main while
615 HandleExtendedData
.Handle
= RootBridgeDev
->PciRootBridgeIo
->ParentHandle
;
621 // If Hot Plug is supported
623 if (!EFI_ERROR (Status
)) {
625 // Allocation succeed, then continue the following
631 // If the resource allocation is unsuccessful, free resources on bridge
634 RootBridgeDev
= NULL
;
635 RootBridgeHandle
= 0;
637 IoResStatus
= EFI_RESOURCE_SATISFIED
;
638 Mem32ResStatus
= EFI_RESOURCE_SATISFIED
;
639 PMem32ResStatus
= EFI_RESOURCE_SATISFIED
;
640 Mem64ResStatus
= EFI_RESOURCE_SATISFIED
;
641 PMem64ResStatus
= EFI_RESOURCE_SATISFIED
;
643 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
645 // Get RootBridg Device by handle
647 RootBridgeDev
= GetRootBridgeByHandle (RootBridgeHandle
);
648 if (RootBridgeDev
== NULL
) {
649 return EFI_NOT_FOUND
;
653 // Get host bridge handle for status report
655 HandleExtendedData
.Handle
= RootBridgeDev
->PciRootBridgeIo
->ParentHandle
;
658 // Get acpi resource node for all the resource types
662 Status
= PciResAlloc
->GetProposedResources (
664 RootBridgeDev
->Handle
,
668 if (EFI_ERROR (Status
)) {
672 if (AcpiConfig
!= NULL
) {
674 // Adjust resource allocation policy for each RB
676 GetResourceAllocationStatus (
684 FreePool (AcpiConfig
);
692 // Raise the EFI_IOB_EC_RESOURCE_CONFLICT status code
695 // It is very difficult to follow the spec here
696 // Device path , Bar index can not be get here
698 ZeroMem (&AllocFailExtendedData
, sizeof (AllocFailExtendedData
));
700 REPORT_STATUS_CODE_WITH_EXTENDED_DATA (
702 EFI_IO_BUS_PCI
| EFI_IOB_EC_RESOURCE_CONFLICT
,
703 (VOID
*) &AllocFailExtendedData
,
704 sizeof (AllocFailExtendedData
)
707 Status
= PciHostBridgeAdjustAllocation (
721 // Destroy all the resource tree
723 DestroyResourceTree (&IoPool
);
724 DestroyResourceTree (&Mem32Pool
);
725 DestroyResourceTree (&PMem32Pool
);
726 DestroyResourceTree (&Mem64Pool
);
727 DestroyResourceTree (&PMem64Pool
);
729 NotifyPhase (PciResAlloc
, EfiPciHostBridgeFreeResources
);
731 if (EFI_ERROR (Status
)) {
743 // Raise the EFI_IOB_PCI_RES_ALLOC status code
745 REPORT_STATUS_CODE_WITH_EXTENDED_DATA (
747 EFI_IO_BUS_PCI
| EFI_IOB_PCI_RES_ALLOC
,
748 (VOID
*) &HandleExtendedData
,
749 sizeof (HandleExtendedData
)
753 // Notify pci bus driver starts to program the resource
755 NotifyPhase (PciResAlloc
, EfiPciHostBridgeSetResources
);
757 RootBridgeDev
= NULL
;
759 RootBridgeHandle
= 0;
761 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
763 // Get RootBridg Device by handle
765 RootBridgeDev
= GetRootBridgeByHandle (RootBridgeHandle
);
767 if (RootBridgeDev
== NULL
) {
768 return EFI_NOT_FOUND
;
772 // Get acpi resource node for all the resource types
775 Status
= PciResAlloc
->GetProposedResources (
777 RootBridgeDev
->Handle
,
781 if (EFI_ERROR (Status
)) {
786 // Get the resource base by interpreting acpi resource node
799 // Process option rom for this root bridge
801 ProcessOptionRom (RootBridgeDev
, Mem32Base
, RootBridgeDev
->RomSize
);
804 // Create the entire system resource map from the information collected by
805 // enumerator. Several resource tree was created
807 IoBridge
= FindResourceNode (RootBridgeDev
, &IoPool
);
808 Mem32Bridge
= FindResourceNode (RootBridgeDev
, &Mem32Pool
);
809 PMem32Bridge
= FindResourceNode (RootBridgeDev
, &PMem32Pool
);
810 Mem64Bridge
= FindResourceNode (RootBridgeDev
, &Mem64Pool
);
811 PMem64Bridge
= FindResourceNode (RootBridgeDev
, &PMem64Pool
);
813 ASSERT (IoBridge
!= NULL
);
814 ASSERT (Mem32Bridge
!= NULL
);
815 ASSERT (PMem32Bridge
!= NULL
);
816 ASSERT (Mem64Bridge
!= NULL
);
817 ASSERT (PMem64Bridge
!= NULL
);
820 // Program IO resources
828 // Program Mem32 resources
836 // Program PMem32 resources
844 // Program Mem64 resources
852 // Program PMem64 resources
859 IoBridge
->PciDev
->PciBar
[IoBridge
->Bar
].BaseAddress
= IoBase
;
860 Mem32Bridge
->PciDev
->PciBar
[Mem32Bridge
->Bar
].BaseAddress
= Mem32Base
;
861 PMem32Bridge
->PciDev
->PciBar
[PMem32Bridge
->Bar
].BaseAddress
= PMem32Base
;
862 Mem64Bridge
->PciDev
->PciBar
[Mem64Bridge
->Bar
].BaseAddress
= Mem64Base
;
863 PMem64Bridge
->PciDev
->PciBar
[PMem64Bridge
->Bar
].BaseAddress
= PMem64Base
;
866 // Dump the resource map for current root bridge
879 FreePool (AcpiConfig
);
883 // Destroy all the resource tree
885 DestroyResourceTree (&IoPool
);
886 DestroyResourceTree (&Mem32Pool
);
887 DestroyResourceTree (&PMem32Pool
);
888 DestroyResourceTree (&Mem64Pool
);
889 DestroyResourceTree (&PMem64Pool
);
892 // Notify the resource allocation phase is to end
894 NotifyPhase (PciResAlloc
, EfiPciHostBridgeEndResourceAllocation
);
900 Scan pci bus and assign bus number to the given PCI bus system.
902 @param Bridge Bridge device instance.
903 @param StartBusNumber start point.
904 @param SubBusNumber Point to sub bus number.
905 @param PaddedBusRange Customized bus number.
907 @retval EFI_SUCCESS Successfully scanned and assigned bus number.
908 @retval other Some error occurred when scanning pci bus.
910 @note Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.
915 IN PCI_IO_DEVICE
*Bridge
,
916 IN UINT8 StartBusNumber
,
917 OUT UINT8
*SubBusNumber
,
918 OUT UINT8
*PaddedBusRange
929 PCI_IO_DEVICE
*PciDevice
;
933 EFI_HPC_PADDING_ATTRIBUTES Attributes
;
934 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Descriptors
;
936 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*PciRootBridgeIo
;
938 UINT32 TempReservedBusNum
;
940 PciRootBridgeIo
= Bridge
->PciRootBridgeIo
;
944 Attributes
= (EFI_HPC_PADDING_ATTRIBUTES
) 0;
950 for (Device
= 0; Device
<= PCI_MAX_DEVICE
; Device
++) {
951 TempReservedBusNum
= 0;
952 for (Func
= 0; Func
<= PCI_MAX_FUNC
; Func
++) {
955 // Check to see whether a pci device is present
957 Status
= PciDevicePresent (
965 if (EFI_ERROR (Status
)) {
970 // Get the PCI device information
972 Status
= PciSearchDevice (
981 ASSERT (!EFI_ERROR (Status
));
983 PciAddress
= EFI_PCI_ADDRESS (StartBusNumber
, Device
, Func
, 0);
985 if (!IS_PCI_BRIDGE (&Pci
)) {
987 // PCI bridges will be called later
988 // Here just need for PCI device or PCI to cardbus controller
989 // EfiPciBeforeChildBusEnumeration for PCI Device Node
991 PreprocessController (
993 PciDevice
->BusNumber
,
994 PciDevice
->DeviceNumber
,
995 PciDevice
->FunctionNumber
,
996 EfiPciBeforeChildBusEnumeration
1000 if (FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
1002 // For Pci Hotplug controller devcie only
1004 if (gPciHotPlugInit
!= NULL
) {
1006 // Check if it is a Hotplug PCI controller
1008 if (IsRootPciHotPlugController (PciDevice
->DevicePath
, &HpIndex
)) {
1009 gPciRootHpcData
[HpIndex
].Found
= TRUE
;
1011 if (!gPciRootHpcData
[HpIndex
].Initialized
) {
1013 Status
= CreateEventForHpc (HpIndex
, &Event
);
1015 ASSERT (!EFI_ERROR (Status
));
1017 Status
= gPciHotPlugInit
->InitializeRootHpc (
1019 gPciRootHpcPool
[HpIndex
].HpcDevicePath
,
1025 PreprocessController (
1027 PciDevice
->BusNumber
,
1028 PciDevice
->DeviceNumber
,
1029 PciDevice
->FunctionNumber
,
1030 EfiPciBeforeChildBusEnumeration
1037 if (IS_PCI_BRIDGE (&Pci
) || IS_CARDBUS_BRIDGE (&Pci
)) {
1041 if (!FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
1043 // If Hot Plug is not supported,
1044 // get the bridge information
1046 Status
= PciSearchDevice (
1055 if (EFI_ERROR (Status
)) {
1060 // If Hot Plug is supported,
1061 // Get the bridge information
1064 if (gPciHotPlugInit
!= NULL
) {
1066 if (IsRootPciHotPlugBus (PciDevice
->DevicePath
, &HpIndex
)) {
1069 // If it is initialized, get the padded bus range
1071 Status
= gPciHotPlugInit
->GetResourcePadding (
1073 gPciRootHpcPool
[HpIndex
].HpbDevicePath
,
1076 (VOID
**) &Descriptors
,
1080 if (EFI_ERROR (Status
)) {
1085 Status
= PciGetBusRange (
1092 FreePool (Descriptors
);
1094 if (EFI_ERROR (Status
)) {
1104 // Add feature to support customized secondary bus number
1106 if (*SubBusNumber
== 0) {
1107 *SubBusNumber
= *PaddedBusRange
;
1108 *PaddedBusRange
= 0;
1112 SecondBus
= *SubBusNumber
;
1114 Register
= (UINT16
) ((SecondBus
<< 8) | (UINT16
) StartBusNumber
);
1115 Address
= EFI_PCI_ADDRESS (StartBusNumber
, Device
, Func
, PCI_BRIDGE_PRIMARY_BUS_REGISTER_OFFSET
);
1117 Status
= PciRootBridgeIo
->Pci
.Write (
1127 // If it is PPB, resursively search down this bridge
1129 if (IS_PCI_BRIDGE (&Pci
)) {
1132 // Temporarily initialize SubBusNumber to maximum bus number to ensure the
1133 // PCI configuration transaction to go through any PPB
1136 Address
= EFI_PCI_ADDRESS (StartBusNumber
, Device
, Func
, PCI_BRIDGE_SUBORDINATE_BUS_REGISTER_OFFSET
);
1137 Status
= PciRootBridgeIo
->Pci
.Write (
1146 // Nofify EfiPciBeforeChildBusEnumeration for PCI Brige
1148 PreprocessController (
1150 PciDevice
->BusNumber
,
1151 PciDevice
->DeviceNumber
,
1152 PciDevice
->FunctionNumber
,
1153 EfiPciBeforeChildBusEnumeration
1156 Status
= PciScanBus (
1158 (UINT8
) (SecondBus
),
1162 if (EFI_ERROR (Status
)) {
1167 if (FeaturePcdGet (PcdPciBusHotplugDeviceSupport
) && BusPadding
) {
1169 // Ensure the device is enabled and initialized
1171 if ((Attributes
== EfiPaddingPciRootBridge
) &&
1172 (State
& EFI_HPC_STATE_ENABLED
) != 0 &&
1173 (State
& EFI_HPC_STATE_INITIALIZED
) != 0) {
1174 *PaddedBusRange
= (UINT8
) ((UINT8
) (BusRange
) +*PaddedBusRange
);
1176 *SubBusNumber
= (UINT8
) ((UINT8
) (BusRange
) +*SubBusNumber
);
1181 // Set the current maximum bus number under the PPB
1183 Address
= EFI_PCI_ADDRESS (StartBusNumber
, Device
, Func
, PCI_BRIDGE_SUBORDINATE_BUS_REGISTER_OFFSET
);
1185 Status
= PciRootBridgeIo
->Pci
.Write (
1194 // It is device. Check PCI IOV for Bus reservation
1195 // Go through each function, just reserve the MAX ReservedBusNum for one device
1197 if (PcdGetBool (PcdSrIovSupport
) && PciDevice
->SrIovCapabilityOffset
!= 0) {
1198 if (TempReservedBusNum
< PciDevice
->ReservedBusNum
) {
1200 (*SubBusNumber
) = (UINT8
)((*SubBusNumber
) + PciDevice
->ReservedBusNum
- TempReservedBusNum
);
1201 TempReservedBusNum
= PciDevice
->ReservedBusNum
;
1204 DEBUG ((EFI_D_INFO
, "PCI-IOV ScanBus - SubBusNumber - 0x%x\n", *SubBusNumber
));
1206 DEBUG ((EFI_D_INFO
, "PCI-IOV ScanBus - SubBusNumber - 0x%x (Update)\n", *SubBusNumber
));
1212 if (Func
== 0 && !IS_PCI_MULTI_FUNC (&Pci
)) {
1215 // Skip sub functions, this is not a multi function device
1218 Func
= PCI_MAX_FUNC
;
1227 Process Option Rom on the specified root bridge.
1229 @param Bridge Pci root bridge device instance.
1231 @retval EFI_SUCCESS Success process.
1232 @retval other Some error occurred when processing Option Rom on the root bridge.
1236 PciRootBridgeP2CProcess (
1237 IN PCI_IO_DEVICE
*Bridge
1240 LIST_ENTRY
*CurrentLink
;
1241 PCI_IO_DEVICE
*Temp
;
1242 EFI_HPC_STATE State
;
1246 CurrentLink
= Bridge
->ChildList
.ForwardLink
;
1248 while (CurrentLink
!= NULL
&& CurrentLink
!= &Bridge
->ChildList
) {
1250 Temp
= PCI_IO_DEVICE_FROM_LINK (CurrentLink
);
1252 if (IS_CARDBUS_BRIDGE (&Temp
->Pci
)) {
1254 if (gPciHotPlugInit
!= NULL
&& Temp
->Allocated
&& FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
1257 // Raise the EFI_IOB_PCI_HPC_INIT status code
1259 REPORT_STATUS_CODE_WITH_DEVICE_PATH (
1261 EFI_IO_BUS_PCI
| EFI_IOB_PCI_HPC_INIT
,
1265 PciAddress
= EFI_PCI_ADDRESS (Temp
->BusNumber
, Temp
->DeviceNumber
, Temp
->FunctionNumber
, 0);
1266 Status
= gPciHotPlugInit
->InitializeRootHpc (
1274 if (!EFI_ERROR (Status
)) {
1275 Status
= PciBridgeEnumerator (Temp
);
1277 if (EFI_ERROR (Status
)) {
1282 CurrentLink
= CurrentLink
->ForwardLink
;
1288 if (!IsListEmpty (&Temp
->ChildList
)) {
1289 Status
= PciRootBridgeP2CProcess (Temp
);
1292 CurrentLink
= CurrentLink
->ForwardLink
;
1299 Process Option Rom on the specified host bridge.
1301 @param PciResAlloc Pointer to instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
1303 @retval EFI_SUCCESS Success process.
1304 @retval EFI_NOT_FOUND Can not find the root bridge instance.
1305 @retval other Some error occurred when processing Option Rom on the host bridge.
1309 PciHostBridgeP2CProcess (
1310 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
*PciResAlloc
1313 EFI_HANDLE RootBridgeHandle
;
1314 PCI_IO_DEVICE
*RootBridgeDev
;
1317 if (!FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
1321 RootBridgeHandle
= NULL
;
1323 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
1326 // Get RootBridg Device by handle
1328 RootBridgeDev
= GetRootBridgeByHandle (RootBridgeHandle
);
1330 if (RootBridgeDev
== NULL
) {
1331 return EFI_NOT_FOUND
;
1334 Status
= PciRootBridgeP2CProcess (RootBridgeDev
);
1335 if (EFI_ERROR (Status
)) {
1345 This function is used to enumerate the entire host bridge
1346 in a given platform.
1348 @param PciResAlloc A pointer to the PCI Host Resource Allocation protocol.
1350 @retval EFI_SUCCESS Successfully enumerated the host bridge.
1351 @retval EFI_OUT_OF_RESOURCES No enough memory available.
1352 @retval other Some error occurred when enumerating the host bridge.
1356 PciHostBridgeEnumerator (
1357 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
*PciResAlloc
1360 EFI_HANDLE RootBridgeHandle
;
1361 PCI_IO_DEVICE
*RootBridgeDev
;
1363 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*PciRootBridgeIo
;
1365 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Descriptors
;
1366 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Configuration
;
1367 UINT8 StartBusNumber
;
1368 LIST_ENTRY RootBridgeList
;
1371 if (FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
1372 InitializeHotPlugSupport ();
1375 InitializeListHead (&RootBridgeList
);
1378 // Notify the bus allocation phase is about to start
1380 NotifyPhase (PciResAlloc
, EfiPciHostBridgeBeginBusAllocation
);
1382 DEBUG((EFI_D_INFO
, "PCI Bus First Scanning\n"));
1383 RootBridgeHandle
= NULL
;
1384 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
1387 // if a root bridge instance is found, create root bridge device for it
1390 RootBridgeDev
= CreateRootBridge (RootBridgeHandle
);
1392 if (RootBridgeDev
== NULL
) {
1393 return EFI_OUT_OF_RESOURCES
;
1397 // Enumerate all the buses under this root bridge
1399 Status
= PciRootBridgeEnumerator (
1404 if (gPciHotPlugInit
!= NULL
&& FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
1405 InsertTailList (&RootBridgeList
, &(RootBridgeDev
->Link
));
1407 DestroyRootBridge (RootBridgeDev
);
1409 if (EFI_ERROR (Status
)) {
1415 // Notify the bus allocation phase is finished for the first time
1417 NotifyPhase (PciResAlloc
, EfiPciHostBridgeEndBusAllocation
);
1419 if (gPciHotPlugInit
!= NULL
&& FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
1421 // Reset all assigned PCI bus number in all PPB
1423 RootBridgeHandle
= NULL
;
1424 Link
= GetFirstNode (&RootBridgeList
);
1425 while ((PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) &&
1426 (!IsNull (&RootBridgeList
, Link
))) {
1427 RootBridgeDev
= PCI_IO_DEVICE_FROM_LINK (Link
);
1429 // Get the Bus information
1431 Status
= PciResAlloc
->StartBusEnumeration (
1434 (VOID
**) &Configuration
1436 if (EFI_ERROR (Status
)) {
1441 // Get the bus number to start with
1443 StartBusNumber
= (UINT8
) (Configuration
->AddrRangeMin
);
1445 ResetAllPpbBusNumber (
1450 FreePool (Configuration
);
1451 Link
= RemoveEntryList (Link
);
1452 DestroyRootBridge (RootBridgeDev
);
1456 // Wait for all HPC initialized
1458 Status
= AllRootHPCInitialized (STALL_1_SECOND
* 15);
1460 if (EFI_ERROR (Status
)) {
1461 DEBUG ((EFI_D_ERROR
, "Some root HPC failed to initialize\n"));
1466 // Notify the bus allocation phase is about to start for the 2nd time
1468 NotifyPhase (PciResAlloc
, EfiPciHostBridgeBeginBusAllocation
);
1470 DEBUG((EFI_D_INFO
, "PCI Bus Second Scanning\n"));
1471 RootBridgeHandle
= NULL
;
1472 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
1475 // if a root bridge instance is found, create root bridge device for it
1477 RootBridgeDev
= CreateRootBridge (RootBridgeHandle
);
1479 if (RootBridgeDev
== NULL
) {
1480 return EFI_OUT_OF_RESOURCES
;
1484 // Enumerate all the buses under this root bridge
1486 Status
= PciRootBridgeEnumerator (
1491 DestroyRootBridge (RootBridgeDev
);
1492 if (EFI_ERROR (Status
)) {
1498 // Notify the bus allocation phase is to end for the 2nd time
1500 NotifyPhase (PciResAlloc
, EfiPciHostBridgeEndBusAllocation
);
1504 // Notify the resource allocation phase is to start
1506 NotifyPhase (PciResAlloc
, EfiPciHostBridgeBeginResourceAllocation
);
1508 RootBridgeHandle
= NULL
;
1509 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
1512 // if a root bridge instance is found, create root bridge device for it
1514 RootBridgeDev
= CreateRootBridge (RootBridgeHandle
);
1516 if (RootBridgeDev
== NULL
) {
1517 return EFI_OUT_OF_RESOURCES
;
1520 Status
= StartManagingRootBridge (RootBridgeDev
);
1522 if (EFI_ERROR (Status
)) {
1526 PciRootBridgeIo
= RootBridgeDev
->PciRootBridgeIo
;
1527 Status
= PciRootBridgeIo
->Configuration (PciRootBridgeIo
, (VOID
**) &Descriptors
);
1529 if (EFI_ERROR (Status
)) {
1533 Status
= PciGetBusRange (&Descriptors
, &MinBus
, NULL
, NULL
);
1535 if (EFI_ERROR (Status
)) {
1540 // Determine root bridge attribute by calling interface of Pcihostbridge
1543 DetermineRootBridgeAttributes (
1549 // Collect all the resource information under this root bridge
1550 // A database that records all the information about pci device subject to this
1551 // root bridge will then be created
1553 Status
= PciPciDeviceInfoCollector (
1558 if (EFI_ERROR (Status
)) {
1562 InsertRootBridge (RootBridgeDev
);
1565 // Record the hostbridge handle
1567 AddHostBridgeEnumerator (RootBridgeDev
->PciRootBridgeIo
->ParentHandle
);