2 PCI resouces support functions implemntation for PCI Bus module.
4 Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18 // The default policy for the PCI bus driver is NOT to reserve I/O ranges for both ISA aliases and VGA aliases.
20 BOOLEAN mReserveIsaAliases
= FALSE
;
21 BOOLEAN mReserveVgaAliases
= FALSE
;
22 BOOLEAN mPolicyDetermined
= FALSE
;
25 The function is used to skip VGA range.
27 @param Start Returned start address including VGA range.
28 @param Length The length of VGA range.
42 ASSERT (Start
!= NULL
);
44 // For legacy VGA, bit 10 to bit 15 is not decoded
49 StartOffset
= Original
& Mask
;
50 LimitOffset
= ((*Start
) + Length
- 1) & Mask
;
51 if (LimitOffset
>= VGABASE1
) {
52 *Start
= *Start
- StartOffset
+ VGALIMIT2
+ 1;
57 This function is used to skip ISA aliasing aperture.
59 @param Start Returned start address including ISA aliasing aperture.
60 @param Length The length of ISA aliasing aperture.
64 SkipIsaAliasAperture (
75 ASSERT (Start
!= NULL
);
78 // For legacy ISA, bit 10 to bit 15 is not decoded
83 StartOffset
= Original
& Mask
;
84 LimitOffset
= ((*Start
) + Length
- 1) & Mask
;
86 if (LimitOffset
>= ISABASE
) {
87 *Start
= *Start
- StartOffset
+ ISALIMIT
+ 1;
92 This function inserts a resource node into the resource list.
93 The resource list is sorted in descend order.
95 @param Bridge PCI resource node for bridge.
96 @param ResNode Resource node want to be inserted.
101 IN OUT PCI_RESOURCE_NODE
*Bridge
,
102 IN PCI_RESOURCE_NODE
*ResNode
105 LIST_ENTRY
*CurrentLink
;
106 PCI_RESOURCE_NODE
*Temp
;
107 UINT64 ResNodeAlignRest
;
108 UINT64 TempAlignRest
;
110 ASSERT (Bridge
!= NULL
);
111 ASSERT (ResNode
!= NULL
);
113 InsertHeadList (&Bridge
->ChildList
, &ResNode
->Link
);
115 CurrentLink
= Bridge
->ChildList
.ForwardLink
->ForwardLink
;
116 while (CurrentLink
!= &Bridge
->ChildList
) {
117 Temp
= RESOURCE_NODE_FROM_LINK (CurrentLink
);
119 if (ResNode
->Alignment
> Temp
->Alignment
) {
121 } else if (ResNode
->Alignment
== Temp
->Alignment
) {
122 ResNodeAlignRest
= ResNode
->Length
& ResNode
->Alignment
;
123 TempAlignRest
= Temp
->Length
& Temp
->Alignment
;
124 if ((ResNodeAlignRest
== 0) || (ResNodeAlignRest
>= TempAlignRest
)) {
129 SwapListEntries (&ResNode
->Link
, CurrentLink
);
131 CurrentLink
= ResNode
->Link
.ForwardLink
;
136 This routine is used to merge two different resource trees in need of
139 For example, if an upstream PPB doesn't support,
140 prefetchable memory decoding, the PCI bus driver will choose to call this function
141 to merge prefectchable memory resource list into normal memory list.
143 If the TypeMerge is TRUE, Res resource type is changed to the type of destination resource
145 If Dst is NULL or Res is NULL, ASSERT ().
147 @param Dst Point to destination resource tree.
148 @param Res Point to source resource tree.
149 @param TypeMerge If the TypeMerge is TRUE, Res resource type is changed to the type of
150 destination resource type.
155 IN PCI_RESOURCE_NODE
*Dst
,
156 IN PCI_RESOURCE_NODE
*Res
,
161 LIST_ENTRY
*CurrentLink
;
162 PCI_RESOURCE_NODE
*Temp
;
164 ASSERT (Dst
!= NULL
);
165 ASSERT (Res
!= NULL
);
167 while (!IsListEmpty (&Res
->ChildList
)) {
168 CurrentLink
= Res
->ChildList
.ForwardLink
;
170 Temp
= RESOURCE_NODE_FROM_LINK (CurrentLink
);
173 Temp
->ResType
= Dst
->ResType
;
176 RemoveEntryList (CurrentLink
);
177 InsertResourceNode (Dst
, Temp
);
182 This function is used to calculate the IO16 aperture
185 @param Bridge PCI resource node for bridge.
189 CalculateApertureIo16 (
190 IN PCI_RESOURCE_NODE
*Bridge
195 LIST_ENTRY
*CurrentLink
;
196 PCI_RESOURCE_NODE
*Node
;
198 EFI_PCI_PLATFORM_POLICY PciPolicy
;
199 UINT64 PaddingAperture
;
201 if (!mPolicyDetermined
) {
203 // Check PciPlatform policy
205 Status
= EFI_NOT_FOUND
;
207 if (gPciPlatformProtocol
!= NULL
) {
208 Status
= gPciPlatformProtocol
->GetPlatformPolicy (
209 gPciPlatformProtocol
,
214 if (EFI_ERROR (Status
) && gPciOverrideProtocol
!= NULL
) {
215 Status
= gPciOverrideProtocol
->GetPlatformPolicy (
216 gPciOverrideProtocol
,
221 if (!EFI_ERROR (Status
)) {
222 if ((PciPolicy
& EFI_RESERVE_ISA_IO_ALIAS
) != 0) {
223 mReserveIsaAliases
= TRUE
;
225 if ((PciPolicy
& EFI_RESERVE_VGA_IO_ALIAS
) != 0) {
226 mReserveVgaAliases
= TRUE
;
229 mPolicyDetermined
= TRUE
;
235 if (Bridge
== NULL
) {
240 // Assume the bridge is aligned
242 for ( CurrentLink
= GetFirstNode (&Bridge
->ChildList
)
243 ; !IsNull (&Bridge
->ChildList
, CurrentLink
)
244 ; CurrentLink
= GetNextNode (&Bridge
->ChildList
, CurrentLink
)
247 Node
= RESOURCE_NODE_FROM_LINK (CurrentLink
);
248 if (Node
->ResourceUsage
== PciResUsagePadding
) {
249 ASSERT (PaddingAperture
== 0);
250 PaddingAperture
= Node
->Length
;
254 // Consider the aperture alignment
256 Offset
= Aperture
& (Node
->Alignment
);
260 Aperture
= Aperture
+ (Node
->Alignment
+ 1) - Offset
;
265 // IsaEnable and VGAEnable can not be implemented now.
266 // If both of them are enabled, then the IO resource would
267 // become too limited to meet the requirement of most of devices.
269 if (mReserveIsaAliases
|| mReserveVgaAliases
) {
270 if (!IS_PCI_BRIDGE (&(Node
->PciDev
->Pci
)) && !IS_CARDBUS_BRIDGE (&(Node
->PciDev
->Pci
))) {
272 // Check if there is need to support ISA/VGA decoding
273 // If so, we need to avoid isa/vga aliasing range
275 if (mReserveIsaAliases
) {
276 SkipIsaAliasAperture (
280 Offset
= Aperture
& (Node
->Alignment
);
282 Aperture
= Aperture
+ (Node
->Alignment
+ 1) - Offset
;
284 } else if (mReserveVgaAliases
) {
289 Offset
= Aperture
& (Node
->Alignment
);
291 Aperture
= Aperture
+ (Node
->Alignment
+ 1) - Offset
;
297 Node
->Offset
= Aperture
;
300 // Increment aperture by the length of node
302 Aperture
+= Node
->Length
;
306 // Adjust the aperture with the bridge's alignment
308 Offset
= Aperture
& (Bridge
->Alignment
);
311 Aperture
= Aperture
+ (Bridge
->Alignment
+ 1) - Offset
;
314 Bridge
->Length
= Aperture
;
316 // At last, adjust the bridge's alignment to the first child's alignment
317 // if the bridge has at least one child
319 CurrentLink
= Bridge
->ChildList
.ForwardLink
;
320 if (CurrentLink
!= &Bridge
->ChildList
) {
321 Node
= RESOURCE_NODE_FROM_LINK (CurrentLink
);
322 if (Node
->Alignment
> Bridge
->Alignment
) {
323 Bridge
->Alignment
= Node
->Alignment
;
328 // Hotplug controller needs padding resources.
329 // Use the larger one between the padding resource and actual occupied resource.
331 Bridge
->Length
= MAX (Bridge
->Length
, PaddingAperture
);
335 This function is used to calculate the resource aperture
336 for a given bridge device.
338 @param Bridge PCI resouce node for given bridge device.
342 CalculateResourceAperture (
343 IN PCI_RESOURCE_NODE
*Bridge
347 LIST_ENTRY
*CurrentLink
;
348 PCI_RESOURCE_NODE
*Node
;
349 UINT64 PaddingAperture
;
355 if (Bridge
== NULL
) {
359 if (Bridge
->ResType
== PciBarTypeIo16
) {
361 CalculateApertureIo16 (Bridge
);
366 // Assume the bridge is aligned
368 for ( CurrentLink
= GetFirstNode (&Bridge
->ChildList
)
369 ; !IsNull (&Bridge
->ChildList
, CurrentLink
)
370 ; CurrentLink
= GetNextNode (&Bridge
->ChildList
, CurrentLink
)
373 Node
= RESOURCE_NODE_FROM_LINK (CurrentLink
);
374 if (Node
->ResourceUsage
== PciResUsagePadding
) {
375 ASSERT (PaddingAperture
== 0);
376 PaddingAperture
= Node
->Length
;
381 // Apply padding resource if available
383 Offset
= Aperture
& (Node
->Alignment
);
387 Aperture
= Aperture
+ (Node
->Alignment
+ 1) - Offset
;
392 // Recode current aperture as a offset
393 // this offset will be used in future real allocation
395 Node
->Offset
= Aperture
;
398 // Increment aperture by the length of node
400 Aperture
+= Node
->Length
;
404 // At last, adjust the aperture with the bridge's
407 Offset
= Aperture
& (Bridge
->Alignment
);
409 Aperture
= Aperture
+ (Bridge
->Alignment
+ 1) - Offset
;
413 // If the bridge has already padded the resource and the
414 // amount of padded resource is larger, then keep the
417 if (Bridge
->Length
< Aperture
) {
418 Bridge
->Length
= Aperture
;
422 // Adjust the bridge's alignment to the first child's alignment
423 // if the bridge has at least one child
425 CurrentLink
= Bridge
->ChildList
.ForwardLink
;
426 if (CurrentLink
!= &Bridge
->ChildList
) {
427 Node
= RESOURCE_NODE_FROM_LINK (CurrentLink
);
428 if (Node
->Alignment
> Bridge
->Alignment
) {
429 Bridge
->Alignment
= Node
->Alignment
;
434 // Hotplug controller needs padding resources.
435 // Use the larger one between the padding resource and actual occupied resource.
437 Bridge
->Length
= MAX (Bridge
->Length
, PaddingAperture
);
441 Get IO/Memory resource infor for given PCI device.
443 @param PciDev Pci device instance.
444 @param IoNode Resource info node for IO .
445 @param Mem32Node Resource info node for 32-bit memory.
446 @param PMem32Node Resource info node for 32-bit Prefetchable Memory.
447 @param Mem64Node Resource info node for 64-bit memory.
448 @param PMem64Node Resource info node for 64-bit Prefetchable Memory.
452 GetResourceFromDevice (
453 IN PCI_IO_DEVICE
*PciDev
,
454 IN OUT PCI_RESOURCE_NODE
*IoNode
,
455 IN OUT PCI_RESOURCE_NODE
*Mem32Node
,
456 IN OUT PCI_RESOURCE_NODE
*PMem32Node
,
457 IN OUT PCI_RESOURCE_NODE
*Mem64Node
,
458 IN OUT PCI_RESOURCE_NODE
*PMem64Node
463 PCI_RESOURCE_NODE
*Node
;
464 BOOLEAN ResourceRequested
;
467 ResourceRequested
= FALSE
;
469 for (Index
= 0; Index
< PCI_MAX_BAR
; Index
++) {
471 switch ((PciDev
->PciBar
)[Index
].BarType
) {
473 case PciBarTypeMem32
:
475 Node
= CreateResourceNode (
477 (PciDev
->PciBar
)[Index
].Length
,
478 (PciDev
->PciBar
)[Index
].Alignment
,
489 ResourceRequested
= TRUE
;
492 case PciBarTypeMem64
:
494 Node
= CreateResourceNode (
496 (PciDev
->PciBar
)[Index
].Length
,
497 (PciDev
->PciBar
)[Index
].Alignment
,
508 ResourceRequested
= TRUE
;
511 case PciBarTypePMem64
:
513 Node
= CreateResourceNode (
515 (PciDev
->PciBar
)[Index
].Length
,
516 (PciDev
->PciBar
)[Index
].Alignment
,
527 ResourceRequested
= TRUE
;
530 case PciBarTypePMem32
:
532 Node
= CreateResourceNode (
534 (PciDev
->PciBar
)[Index
].Length
,
535 (PciDev
->PciBar
)[Index
].Alignment
,
545 ResourceRequested
= TRUE
;
551 Node
= CreateResourceNode (
553 (PciDev
->PciBar
)[Index
].Length
,
554 (PciDev
->PciBar
)[Index
].Alignment
,
564 ResourceRequested
= TRUE
;
567 case PciBarTypeUnknown
:
578 for (Index
= 0; Index
< PCI_MAX_BAR
; Index
++) {
580 switch ((PciDev
->VfPciBar
)[Index
].BarType
) {
582 case PciBarTypeMem32
:
584 Node
= CreateVfResourceNode (
586 (PciDev
->VfPciBar
)[Index
].Length
,
587 (PciDev
->VfPciBar
)[Index
].Alignment
,
600 case PciBarTypeMem64
:
602 Node
= CreateVfResourceNode (
604 (PciDev
->VfPciBar
)[Index
].Length
,
605 (PciDev
->VfPciBar
)[Index
].Alignment
,
618 case PciBarTypePMem64
:
620 Node
= CreateVfResourceNode (
622 (PciDev
->VfPciBar
)[Index
].Length
,
623 (PciDev
->VfPciBar
)[Index
].Alignment
,
636 case PciBarTypePMem32
:
638 Node
= CreateVfResourceNode (
640 (PciDev
->VfPciBar
)[Index
].Length
,
641 (PciDev
->VfPciBar
)[Index
].Alignment
,
657 case PciBarTypeUnknown
:
664 // If there is no resource requested from this device,
665 // then we indicate this device has been allocated naturally.
667 if (!ResourceRequested
) {
668 PciDev
->Allocated
= TRUE
;
673 This function is used to create a resource node.
675 @param PciDev Pci device instance.
676 @param Length Length of Io/Memory resource.
677 @param Alignment Alignment of resource.
678 @param Bar Bar index.
679 @param ResType Type of resource: IO/Memory.
680 @param ResUsage Resource usage.
682 @return PCI resource node created for given PCI device.
683 NULL means PCI resource node is not created.
688 IN PCI_IO_DEVICE
*PciDev
,
692 IN PCI_BAR_TYPE ResType
,
693 IN PCI_RESOURCE_USAGE ResUsage
696 PCI_RESOURCE_NODE
*Node
;
700 Node
= AllocateZeroPool (sizeof (PCI_RESOURCE_NODE
));
701 ASSERT (Node
!= NULL
);
706 Node
->Signature
= PCI_RESOURCE_SIGNATURE
;
707 Node
->PciDev
= PciDev
;
708 Node
->Length
= Length
;
709 Node
->Alignment
= Alignment
;
711 Node
->ResType
= ResType
;
712 Node
->Reserved
= FALSE
;
713 Node
->ResourceUsage
= ResUsage
;
714 InitializeListHead (&Node
->ChildList
);
720 This function is used to create a IOV VF resource node.
722 @param PciDev Pci device instance.
723 @param Length Length of Io/Memory resource.
724 @param Alignment Alignment of resource.
725 @param Bar Bar index.
726 @param ResType Type of resource: IO/Memory.
727 @param ResUsage Resource usage.
729 @return PCI resource node created for given VF PCI device.
730 NULL means PCI resource node is not created.
734 CreateVfResourceNode (
735 IN PCI_IO_DEVICE
*PciDev
,
739 IN PCI_BAR_TYPE ResType
,
740 IN PCI_RESOURCE_USAGE ResUsage
743 PCI_RESOURCE_NODE
*Node
;
745 Node
= CreateResourceNode (PciDev
, Length
, Alignment
, Bar
, ResType
, ResUsage
);
750 Node
->Virtual
= TRUE
;
756 This function is used to extract resource request from
759 @param Bridge Pci device instance.
760 @param IoNode Resource info node for IO.
761 @param Mem32Node Resource info node for 32-bit memory.
762 @param PMem32Node Resource info node for 32-bit Prefetchable Memory.
763 @param Mem64Node Resource info node for 64-bit memory.
764 @param PMem64Node Resource info node for 64-bit Prefetchable Memory.
769 IN PCI_IO_DEVICE
*Bridge
,
770 IN OUT PCI_RESOURCE_NODE
*IoNode
,
771 IN OUT PCI_RESOURCE_NODE
*Mem32Node
,
772 IN OUT PCI_RESOURCE_NODE
*PMem32Node
,
773 IN OUT PCI_RESOURCE_NODE
*Mem64Node
,
774 IN OUT PCI_RESOURCE_NODE
*PMem64Node
778 PCI_RESOURCE_NODE
*IoBridge
;
779 PCI_RESOURCE_NODE
*Mem32Bridge
;
780 PCI_RESOURCE_NODE
*PMem32Bridge
;
781 PCI_RESOURCE_NODE
*Mem64Bridge
;
782 PCI_RESOURCE_NODE
*PMem64Bridge
;
783 LIST_ENTRY
*CurrentLink
;
785 CurrentLink
= Bridge
->ChildList
.ForwardLink
;
787 while (CurrentLink
!= NULL
&& CurrentLink
!= &Bridge
->ChildList
) {
789 Temp
= PCI_IO_DEVICE_FROM_LINK (CurrentLink
);
792 // Create resource nodes for this device by scanning the
793 // Bar array in the device private data
794 // If the upstream bridge doesn't support this device,
795 // no any resource node will be created for this device
797 GetResourceFromDevice (
806 if (IS_PCI_BRIDGE (&Temp
->Pci
)) {
809 // If the device has children, create a bridge resource node for this PPB
810 // Note: For PPB, memory aperture is aligned with 1MB and IO aperture
811 // is aligned with 4KB (smaller alignments may be supported).
813 IoBridge
= CreateResourceNode (
816 Temp
->BridgeIoAlignment
,
822 Mem32Bridge
= CreateResourceNode (
831 PMem32Bridge
= CreateResourceNode (
840 Mem64Bridge
= CreateResourceNode (
849 PMem64Bridge
= CreateResourceNode (
859 // Recursively create resouce map on this bridge
870 if (ResourceRequestExisted (IoBridge
)) {
881 // If there is node under this resource bridge,
882 // then calculate bridge's aperture of this type
883 // and insert it into the respective resource tree.
884 // If no, delete this resource bridge
886 if (ResourceRequestExisted (Mem32Bridge
)) {
892 FreePool (Mem32Bridge
);
897 // If there is node under this resource bridge,
898 // then calculate bridge's aperture of this type
899 // and insert it into the respective resource tree.
900 // If no, delete this resource bridge
902 if (ResourceRequestExisted (PMem32Bridge
)) {
908 FreePool (PMem32Bridge
);
913 // If there is node under this resource bridge,
914 // then calculate bridge's aperture of this type
915 // and insert it into the respective resource tree.
916 // If no, delete this resource bridge
918 if (ResourceRequestExisted (Mem64Bridge
)) {
924 FreePool (Mem64Bridge
);
929 // If there is node under this resource bridge,
930 // then calculate bridge's aperture of this type
931 // and insert it into the respective resource tree.
932 // If no, delete this resource bridge
934 if (ResourceRequestExisted (PMem64Bridge
)) {
940 FreePool (PMem64Bridge
);
947 // If it is P2C, apply hard coded resource padding
949 if (IS_CARDBUS_BRIDGE (&Temp
->Pci
)) {
950 ResourcePaddingForCardBusBridge (
960 CurrentLink
= CurrentLink
->ForwardLink
;
964 // To do some platform specific resource padding ...
966 ResourcePaddingPolicy (
976 // Degrade resource if necessary
987 // Calculate resource aperture for this bridge device
989 CalculateResourceAperture (Mem32Node
);
990 CalculateResourceAperture (PMem32Node
);
991 CalculateResourceAperture (Mem64Node
);
992 CalculateResourceAperture (PMem64Node
);
993 CalculateResourceAperture (IoNode
);
997 This function is used to do the resource padding for a specific platform.
999 @param PciDev Pci device instance.
1000 @param IoNode Resource info node for IO.
1001 @param Mem32Node Resource info node for 32-bit memory.
1002 @param PMem32Node Resource info node for 32-bit Prefetchable Memory.
1003 @param Mem64Node Resource info node for 64-bit memory.
1004 @param PMem64Node Resource info node for 64-bit Prefetchable Memory.
1008 ResourcePaddingPolicy (
1009 IN PCI_IO_DEVICE
*PciDev
,
1010 IN PCI_RESOURCE_NODE
*IoNode
,
1011 IN PCI_RESOURCE_NODE
*Mem32Node
,
1012 IN PCI_RESOURCE_NODE
*PMem32Node
,
1013 IN PCI_RESOURCE_NODE
*Mem64Node
,
1014 IN PCI_RESOURCE_NODE
*PMem64Node
1018 // Create padding resource node
1020 if (PciDev
->ResourcePaddingDescriptors
!= NULL
) {
1021 ApplyResourcePadding (
1033 This function is used to degrade resource if the upstream bridge
1034 doesn't support certain resource. Degradation path is
1035 PMEM64 -> MEM64 -> MEM32
1036 PMEM64 -> PMEM32 -> MEM32
1039 @param Bridge Pci device instance.
1040 @param Mem32Node Resource info node for 32-bit memory.
1041 @param PMem32Node Resource info node for 32-bit Prefetchable Memory.
1042 @param Mem64Node Resource info node for 64-bit memory.
1043 @param PMem64Node Resource info node for 64-bit Prefetchable Memory.
1048 IN PCI_IO_DEVICE
*Bridge
,
1049 IN PCI_RESOURCE_NODE
*Mem32Node
,
1050 IN PCI_RESOURCE_NODE
*PMem32Node
,
1051 IN PCI_RESOURCE_NODE
*Mem64Node
,
1052 IN PCI_RESOURCE_NODE
*PMem64Node
1055 PCI_IO_DEVICE
*Temp
;
1056 LIST_ENTRY
*ChildDeviceLink
;
1057 LIST_ENTRY
*ChildNodeLink
;
1058 LIST_ENTRY
*NextChildNodeLink
;
1059 PCI_RESOURCE_NODE
*TempNode
;
1062 // If any child device has both option ROM and 64-bit BAR, degrade its PMEM64/MEM64
1063 // requests in case that if a legacy option ROM image can not access 64-bit resources.
1065 ChildDeviceLink
= Bridge
->ChildList
.ForwardLink
;
1066 while (ChildDeviceLink
!= NULL
&& ChildDeviceLink
!= &Bridge
->ChildList
) {
1067 Temp
= PCI_IO_DEVICE_FROM_LINK (ChildDeviceLink
);
1068 if (Temp
->RomSize
!= 0) {
1069 if (!IsListEmpty (&Mem64Node
->ChildList
)) {
1070 ChildNodeLink
= Mem64Node
->ChildList
.ForwardLink
;
1071 while (ChildNodeLink
!= &Mem64Node
->ChildList
) {
1072 TempNode
= RESOURCE_NODE_FROM_LINK (ChildNodeLink
);
1073 NextChildNodeLink
= ChildNodeLink
->ForwardLink
;
1075 if (TempNode
->PciDev
== Temp
) {
1076 RemoveEntryList (ChildNodeLink
);
1077 InsertResourceNode (Mem32Node
, TempNode
);
1079 ChildNodeLink
= NextChildNodeLink
;
1083 if (!IsListEmpty (&PMem64Node
->ChildList
)) {
1084 ChildNodeLink
= PMem64Node
->ChildList
.ForwardLink
;
1085 while (ChildNodeLink
!= &PMem64Node
->ChildList
) {
1086 TempNode
= RESOURCE_NODE_FROM_LINK (ChildNodeLink
);
1087 NextChildNodeLink
= ChildNodeLink
->ForwardLink
;
1089 if (TempNode
->PciDev
== Temp
) {
1090 RemoveEntryList (ChildNodeLink
);
1091 InsertResourceNode (PMem32Node
, TempNode
);
1093 ChildNodeLink
= NextChildNodeLink
;
1098 ChildDeviceLink
= ChildDeviceLink
->ForwardLink
;
1102 // If firmware is in 32-bit mode,
1103 // then degrade PMEM64/MEM64 requests
1105 if (sizeof (UINTN
) <= 4) {
1119 // if the bridge does not support MEM64, degrade MEM64 to MEM32
1121 if (!BridgeSupportResourceDecode (Bridge
, EFI_BRIDGE_MEM64_DECODE_SUPPORTED
)) {
1130 // if the bridge does not support PMEM64, degrade PMEM64 to PMEM32
1132 if (!BridgeSupportResourceDecode (Bridge
, EFI_BRIDGE_PMEM64_DECODE_SUPPORTED
)) {
1141 // if both PMEM64 and PMEM32 requests from child devices, which can not be satisfied
1142 // by a P2P bridge simultaneously, keep PMEM64 and degrade PMEM32 to MEM32.
1144 if (!IsListEmpty (&PMem64Node
->ChildList
) && Bridge
->Parent
!= NULL
) {
1154 // If bridge doesn't support Pmem32
1155 // degrade it to mem32
1157 if (!BridgeSupportResourceDecode (Bridge
, EFI_BRIDGE_PMEM32_DECODE_SUPPORTED
)) {
1166 // if root bridge supports combined Pmem Mem decoding
1167 // merge these two type of resource
1169 if (BridgeSupportResourceDecode (Bridge
, EFI_BRIDGE_PMEM_MEM_COMBINE_SUPPORTED
)) {
1177 // No need to check if to degrade MEM64 after merge, because
1178 // if there are PMEM64 still here, 64-bit decode should be supported
1179 // by the root bride.
1190 Test whether bridge device support decode resource.
1192 @param Bridge Bridge device instance.
1193 @param Decode Decode type according to resource type.
1195 @return TRUE The bridge device support decode resource.
1196 @return FALSE The bridge device don't support decode resource.
1200 BridgeSupportResourceDecode (
1201 IN PCI_IO_DEVICE
*Bridge
,
1205 if (((Bridge
->Decodes
) & Decode
) != 0) {
1213 This function is used to program the resource allocated
1214 for each resource node under specified bridge.
1216 @param Base Base address of resource to be progammed.
1217 @param Bridge PCI resource node for the bridge device.
1219 @retval EFI_SUCCESS Successfully to program all resouces
1220 on given PCI bridge device.
1221 @retval EFI_OUT_OF_RESOURCES Base is all one.
1227 IN PCI_RESOURCE_NODE
*Bridge
1230 LIST_ENTRY
*CurrentLink
;
1231 PCI_RESOURCE_NODE
*Node
;
1234 if (Base
== gAllOne
) {
1235 return EFI_OUT_OF_RESOURCES
;
1238 CurrentLink
= Bridge
->ChildList
.ForwardLink
;
1240 while (CurrentLink
!= &Bridge
->ChildList
) {
1242 Node
= RESOURCE_NODE_FROM_LINK (CurrentLink
);
1244 if (!IS_PCI_BRIDGE (&(Node
->PciDev
->Pci
))) {
1246 if (IS_CARDBUS_BRIDGE (&(Node
->PciDev
->Pci
))) {
1248 // Program the PCI Card Bus device
1250 ProgramP2C (Base
, Node
);
1253 // Program the PCI device BAR
1255 ProgramBar (Base
, Node
);
1259 // Program the PCI devices under this bridge
1261 Status
= ProgramResource (Base
+ Node
->Offset
, Node
);
1262 if (EFI_ERROR (Status
)) {
1266 ProgramPpbApperture (Base
, Node
);
1269 CurrentLink
= CurrentLink
->ForwardLink
;
1276 Program Bar register for PCI device.
1278 @param Base Base address for PCI device resource to be progammed.
1279 @param Node Point to resoure node structure.
1285 IN PCI_RESOURCE_NODE
*Node
1288 EFI_PCI_IO_PROTOCOL
*PciIo
;
1292 ASSERT (Node
->Bar
< PCI_MAX_BAR
);
1297 if (Node
->Virtual
) {
1298 ProgramVfBar (Base
, Node
);
1303 PciIo
= &(Node
->PciDev
->PciIo
);
1305 Address
= Base
+ Node
->Offset
;
1308 // Indicate pci bus driver has allocated
1309 // resource for this device
1310 // It might be a temporary solution here since
1311 // pci device could have multiple bar
1313 Node
->PciDev
->Allocated
= TRUE
;
1315 switch ((Node
->PciDev
->PciBar
[Node
->Bar
]).BarType
) {
1317 case PciBarTypeIo16
:
1318 case PciBarTypeIo32
:
1319 case PciBarTypeMem32
:
1320 case PciBarTypePMem32
:
1324 EfiPciIoWidthUint32
,
1325 (Node
->PciDev
->PciBar
[Node
->Bar
]).Offset
,
1330 Node
->PciDev
->PciBar
[Node
->Bar
].BaseAddress
= Address
;
1334 case PciBarTypeMem64
:
1335 case PciBarTypePMem64
:
1337 Address32
= (UINT32
) (Address
& 0x00000000FFFFFFFF);
1341 EfiPciIoWidthUint32
,
1342 (Node
->PciDev
->PciBar
[Node
->Bar
]).Offset
,
1347 Address32
= (UINT32
) RShiftU64 (Address
, 32);
1351 EfiPciIoWidthUint32
,
1352 (UINT8
) ((Node
->PciDev
->PciBar
[Node
->Bar
]).Offset
+ 4),
1357 Node
->PciDev
->PciBar
[Node
->Bar
].BaseAddress
= Address
;
1367 Program IOV VF Bar register for PCI device.
1369 @param Base Base address for PCI device resource to be progammed.
1370 @param Node Point to resoure node structure.
1376 IN PCI_RESOURCE_NODE
*Node
1379 EFI_PCI_IO_PROTOCOL
*PciIo
;
1383 ASSERT (Node
->Bar
< PCI_MAX_BAR
);
1384 ASSERT (Node
->Virtual
);
1387 PciIo
= &(Node
->PciDev
->PciIo
);
1389 Address
= Base
+ Node
->Offset
;
1392 // Indicate pci bus driver has allocated
1393 // resource for this device
1394 // It might be a temporary solution here since
1395 // pci device could have multiple bar
1397 Node
->PciDev
->Allocated
= TRUE
;
1399 switch ((Node
->PciDev
->VfPciBar
[Node
->Bar
]).BarType
) {
1401 case PciBarTypeMem32
:
1402 case PciBarTypePMem32
:
1406 EfiPciIoWidthUint32
,
1407 (Node
->PciDev
->VfPciBar
[Node
->Bar
]).Offset
,
1412 Node
->PciDev
->VfPciBar
[Node
->Bar
].BaseAddress
= Address
;
1415 case PciBarTypeMem64
:
1416 case PciBarTypePMem64
:
1418 Address32
= (UINT32
) (Address
& 0x00000000FFFFFFFF);
1422 EfiPciIoWidthUint32
,
1423 (Node
->PciDev
->VfPciBar
[Node
->Bar
]).Offset
,
1428 Address32
= (UINT32
) RShiftU64 (Address
, 32);
1432 EfiPciIoWidthUint32
,
1433 ((Node
->PciDev
->VfPciBar
[Node
->Bar
]).Offset
+ 4),
1438 Node
->PciDev
->VfPciBar
[Node
->Bar
].BaseAddress
= Address
;
1441 case PciBarTypeIo16
:
1442 case PciBarTypeIo32
:
1453 Program PCI-PCI bridge apperture.
1455 @param Base Base address for resource.
1456 @param Node Point to resoure node structure.
1460 ProgramPpbApperture (
1462 IN PCI_RESOURCE_NODE
*Node
1465 EFI_PCI_IO_PROTOCOL
*PciIo
;
1471 // If no device resource of this PPB, return anyway
1472 // Apperture is set default in the initialization code
1474 if (Node
->Length
== 0 || Node
->ResourceUsage
== PciResUsagePadding
) {
1476 // For padding resource node, just ignore when programming
1481 PciIo
= &(Node
->PciDev
->PciIo
);
1482 Address
= Base
+ Node
->Offset
;
1485 // Indicate the PPB resource has been allocated
1487 Node
->PciDev
->Allocated
= TRUE
;
1489 switch (Node
->Bar
) {
1493 switch ((Node
->PciDev
->PciBar
[Node
->Bar
]).BarType
) {
1495 case PciBarTypeIo16
:
1496 case PciBarTypeIo32
:
1497 case PciBarTypeMem32
:
1498 case PciBarTypePMem32
:
1502 EfiPciIoWidthUint32
,
1503 (Node
->PciDev
->PciBar
[Node
->Bar
]).Offset
,
1508 Node
->PciDev
->PciBar
[Node
->Bar
].BaseAddress
= Address
;
1509 Node
->PciDev
->PciBar
[Node
->Bar
].Length
= Node
->Length
;
1512 case PciBarTypeMem64
:
1513 case PciBarTypePMem64
:
1515 Address32
= (UINT32
) (Address
& 0x00000000FFFFFFFF);
1519 EfiPciIoWidthUint32
,
1520 (Node
->PciDev
->PciBar
[Node
->Bar
]).Offset
,
1525 Address32
= (UINT32
) RShiftU64 (Address
, 32);
1529 EfiPciIoWidthUint32
,
1530 (UINT8
) ((Node
->PciDev
->PciBar
[Node
->Bar
]).Offset
+ 4),
1535 Node
->PciDev
->PciBar
[Node
->Bar
].BaseAddress
= Address
;
1536 Node
->PciDev
->PciBar
[Node
->Bar
].Length
= Node
->Length
;
1546 Address32
= ((UINT32
) (Address
)) >> 8;
1558 EfiPciIoWidthUint16
,
1564 Address32
= (UINT32
) (Address
+ Node
->Length
- 1);
1565 Address32
= ((UINT32
) (Address32
)) >> 8;
1577 EfiPciIoWidthUint16
,
1583 Node
->PciDev
->PciBar
[Node
->Bar
].BaseAddress
= Address
;
1584 Node
->PciDev
->PciBar
[Node
->Bar
].Length
= Node
->Length
;
1587 case PPB_MEM32_RANGE
:
1589 Address32
= ((UINT32
) (Address
)) >> 16;
1592 EfiPciIoWidthUint16
,
1598 Address32
= (UINT32
) (Address
+ Node
->Length
- 1);
1599 Address32
= ((UINT32
) (Address32
)) >> 16;
1602 EfiPciIoWidthUint16
,
1608 Node
->PciDev
->PciBar
[Node
->Bar
].BaseAddress
= Address
;
1609 Node
->PciDev
->PciBar
[Node
->Bar
].Length
= Node
->Length
;
1612 case PPB_PMEM32_RANGE
:
1613 case PPB_PMEM64_RANGE
:
1615 Address32
= ((UINT32
) (Address
)) >> 16;
1618 EfiPciIoWidthUint16
,
1624 Address32
= (UINT32
) (Address
+ Node
->Length
- 1);
1625 Address32
= ((UINT32
) (Address32
)) >> 16;
1628 EfiPciIoWidthUint16
,
1634 Address32
= (UINT32
) RShiftU64 (Address
, 32);
1637 EfiPciIoWidthUint32
,
1643 Address32
= (UINT32
) RShiftU64 ((Address
+ Node
->Length
- 1), 32);
1646 EfiPciIoWidthUint32
,
1652 Node
->PciDev
->PciBar
[Node
->Bar
].BaseAddress
= Address
;
1653 Node
->PciDev
->PciBar
[Node
->Bar
].Length
= Node
->Length
;
1662 Program parent bridge for Option Rom.
1664 @param PciDevice Pci deivce instance.
1665 @param OptionRomBase Base address for Optiona Rom.
1666 @param Enable Enable or disable PCI memory.
1670 ProgrameUpstreamBridgeForRom (
1671 IN PCI_IO_DEVICE
*PciDevice
,
1672 IN UINT32 OptionRomBase
,
1676 PCI_IO_DEVICE
*Parent
;
1677 PCI_RESOURCE_NODE Node
;
1679 // For root bridge, just return.
1681 Parent
= PciDevice
->Parent
;
1682 ZeroMem (&Node
, sizeof (Node
));
1683 while (Parent
!= NULL
) {
1684 if (!IS_PCI_BRIDGE (&Parent
->Pci
)) {
1688 Node
.PciDev
= Parent
;
1689 Node
.Length
= PciDevice
->RomSize
;
1691 Node
.Bar
= PPB_MEM32_RANGE
;
1692 Node
.ResType
= PciBarTypeMem32
;
1696 // Program PPB to only open a single <= 16MB apperture
1699 ProgramPpbApperture (OptionRomBase
, &Node
);
1700 PCI_ENABLE_COMMAND_REGISTER (Parent
, EFI_PCI_COMMAND_MEMORY_SPACE
);
1702 InitializePpb (Parent
);
1703 PCI_DISABLE_COMMAND_REGISTER (Parent
, EFI_PCI_COMMAND_MEMORY_SPACE
);
1706 Parent
= Parent
->Parent
;
1711 Test whether resource exists for a bridge.
1713 @param Bridge Point to resource node for a bridge.
1715 @retval TRUE There is resource on the given bridge.
1716 @retval FALSE There isn't resource on the given bridge.
1720 ResourceRequestExisted (
1721 IN PCI_RESOURCE_NODE
*Bridge
1724 if (Bridge
!= NULL
) {
1725 if (!IsListEmpty (&Bridge
->ChildList
) || Bridge
->Length
!= 0) {
1734 Initialize resource pool structure.
1736 @param ResourcePool Point to resource pool structure. This pool
1737 is reset to all zero when returned.
1738 @param ResourceType Type of resource.
1742 InitializeResourcePool (
1743 IN OUT PCI_RESOURCE_NODE
*ResourcePool
,
1744 IN PCI_BAR_TYPE ResourceType
1747 ZeroMem (ResourcePool
, sizeof (PCI_RESOURCE_NODE
));
1748 ResourcePool
->ResType
= ResourceType
;
1749 ResourcePool
->Signature
= PCI_RESOURCE_SIGNATURE
;
1750 InitializeListHead (&ResourcePool
->ChildList
);
1754 Destory given resource tree.
1756 @param Bridge PCI resource root node of resource tree.
1760 DestroyResourceTree (
1761 IN PCI_RESOURCE_NODE
*Bridge
1764 PCI_RESOURCE_NODE
*Temp
;
1765 LIST_ENTRY
*CurrentLink
;
1767 while (!IsListEmpty (&Bridge
->ChildList
)) {
1769 CurrentLink
= Bridge
->ChildList
.ForwardLink
;
1771 Temp
= RESOURCE_NODE_FROM_LINK (CurrentLink
);
1774 RemoveEntryList (CurrentLink
);
1776 if (IS_PCI_BRIDGE (&(Temp
->PciDev
->Pci
))) {
1777 DestroyResourceTree (Temp
);
1785 Insert resource padding for P2C.
1787 @param PciDev Pci device instance.
1788 @param IoNode Resource info node for IO.
1789 @param Mem32Node Resource info node for 32-bit memory.
1790 @param PMem32Node Resource info node for 32-bit Prefetchable Memory.
1791 @param Mem64Node Resource info node for 64-bit memory.
1792 @param PMem64Node Resource info node for 64-bit Prefetchable Memory.
1796 ResourcePaddingForCardBusBridge (
1797 IN PCI_IO_DEVICE
*PciDev
,
1798 IN PCI_RESOURCE_NODE
*IoNode
,
1799 IN PCI_RESOURCE_NODE
*Mem32Node
,
1800 IN PCI_RESOURCE_NODE
*PMem32Node
,
1801 IN PCI_RESOURCE_NODE
*Mem64Node
,
1802 IN PCI_RESOURCE_NODE
*PMem64Node
1805 PCI_RESOURCE_NODE
*Node
;
1810 // Memory Base/Limit Register 0
1811 // Bar 1 denodes memory range 0
1813 Node
= CreateResourceNode (
1822 InsertResourceNode (
1828 // Memory Base/Limit Register 1
1829 // Bar 2 denodes memory range1
1831 Node
= CreateResourceNode (
1840 InsertResourceNode (
1847 // Bar 3 denodes io range 0
1849 Node
= CreateResourceNode (
1858 InsertResourceNode (
1865 // Bar 4 denodes io range 0
1867 Node
= CreateResourceNode (
1876 InsertResourceNode (
1883 Program PCI Card device register for given resource node.
1885 @param Base Base address of PCI Card device to be programmed.
1886 @param Node Given resource node.
1892 IN PCI_RESOURCE_NODE
*Node
1895 EFI_PCI_IO_PROTOCOL
*PciIo
;
1898 UINT16 BridgeControl
;
1901 PciIo
= &(Node
->PciDev
->PciIo
);
1903 Address
= Base
+ Node
->Offset
;
1906 // Indicate pci bus driver has allocated
1907 // resource for this device
1908 // It might be a temporary solution here since
1909 // pci device could have multiple bar
1911 Node
->PciDev
->Allocated
= TRUE
;
1913 switch (Node
->Bar
) {
1918 EfiPciIoWidthUint32
,
1919 (Node
->PciDev
->PciBar
[Node
->Bar
]).Offset
,
1924 Node
->PciDev
->PciBar
[Node
->Bar
].BaseAddress
= Address
;
1925 Node
->PciDev
->PciBar
[Node
->Bar
].Length
= Node
->Length
;
1931 EfiPciIoWidthUint32
,
1932 PCI_CARD_MEMORY_BASE_0
,
1937 TempAddress
= Address
+ Node
->Length
- 1;
1940 EfiPciIoWidthUint32
,
1941 PCI_CARD_MEMORY_LIMIT_0
,
1946 if (Node
->ResType
== PciBarTypeMem32
) {
1948 // Set non-prefetchable bit
1952 EfiPciIoWidthUint16
,
1953 PCI_CARD_BRIDGE_CONTROL
,
1958 BridgeControl
&= (UINT16
) ~PCI_CARD_PREFETCHABLE_MEMORY_0_ENABLE
;
1961 EfiPciIoWidthUint16
,
1962 PCI_CARD_BRIDGE_CONTROL
,
1969 // Set pre-fetchable bit
1973 EfiPciIoWidthUint16
,
1974 PCI_CARD_BRIDGE_CONTROL
,
1979 BridgeControl
|= PCI_CARD_PREFETCHABLE_MEMORY_0_ENABLE
;
1982 EfiPciIoWidthUint16
,
1983 PCI_CARD_BRIDGE_CONTROL
,
1989 Node
->PciDev
->PciBar
[Node
->Bar
].BaseAddress
= Address
;
1990 Node
->PciDev
->PciBar
[Node
->Bar
].Length
= Node
->Length
;
1991 Node
->PciDev
->PciBar
[Node
->Bar
].BarType
= Node
->ResType
;
1998 EfiPciIoWidthUint32
,
1999 PCI_CARD_MEMORY_BASE_1
,
2004 TempAddress
= Address
+ Node
->Length
- 1;
2008 EfiPciIoWidthUint32
,
2009 PCI_CARD_MEMORY_LIMIT_1
,
2014 if (Node
->ResType
== PciBarTypeMem32
) {
2017 // Set non-prefetchable bit
2021 EfiPciIoWidthUint16
,
2022 PCI_CARD_BRIDGE_CONTROL
,
2027 BridgeControl
&= (UINT16
) ~(PCI_CARD_PREFETCHABLE_MEMORY_1_ENABLE
);
2030 EfiPciIoWidthUint16
,
2031 PCI_CARD_BRIDGE_CONTROL
,
2039 // Set pre-fetchable bit
2043 EfiPciIoWidthUint16
,
2044 PCI_CARD_BRIDGE_CONTROL
,
2049 BridgeControl
|= PCI_CARD_PREFETCHABLE_MEMORY_1_ENABLE
;
2052 EfiPciIoWidthUint16
,
2053 PCI_CARD_BRIDGE_CONTROL
,
2059 Node
->PciDev
->PciBar
[Node
->Bar
].BaseAddress
= Address
;
2060 Node
->PciDev
->PciBar
[Node
->Bar
].Length
= Node
->Length
;
2061 Node
->PciDev
->PciBar
[Node
->Bar
].BarType
= Node
->ResType
;
2067 EfiPciIoWidthUint32
,
2068 PCI_CARD_IO_BASE_0_LOWER
,
2073 TempAddress
= Address
+ Node
->Length
- 1;
2076 EfiPciIoWidthUint32
,
2077 PCI_CARD_IO_LIMIT_0_LOWER
,
2082 Node
->PciDev
->PciBar
[Node
->Bar
].BaseAddress
= Address
;
2083 Node
->PciDev
->PciBar
[Node
->Bar
].Length
= Node
->Length
;
2084 Node
->PciDev
->PciBar
[Node
->Bar
].BarType
= Node
->ResType
;
2091 EfiPciIoWidthUint32
,
2092 PCI_CARD_IO_BASE_1_LOWER
,
2097 TempAddress
= Address
+ Node
->Length
- 1;
2100 EfiPciIoWidthUint32
,
2101 PCI_CARD_IO_LIMIT_1_LOWER
,
2106 Node
->PciDev
->PciBar
[Node
->Bar
].BaseAddress
= Address
;
2107 Node
->PciDev
->PciBar
[Node
->Bar
].Length
= Node
->Length
;
2108 Node
->PciDev
->PciBar
[Node
->Bar
].BarType
= Node
->ResType
;
2117 Create padding resource node.
2119 @param PciDev Pci device instance.
2120 @param IoNode Resource info node for IO.
2121 @param Mem32Node Resource info node for 32-bit memory.
2122 @param PMem32Node Resource info node for 32-bit Prefetchable Memory.
2123 @param Mem64Node Resource info node for 64-bit memory.
2124 @param PMem64Node Resource info node for 64-bit Prefetchable Memory.
2128 ApplyResourcePadding (
2129 IN PCI_IO_DEVICE
*PciDev
,
2130 IN PCI_RESOURCE_NODE
*IoNode
,
2131 IN PCI_RESOURCE_NODE
*Mem32Node
,
2132 IN PCI_RESOURCE_NODE
*PMem32Node
,
2133 IN PCI_RESOURCE_NODE
*Mem64Node
,
2134 IN PCI_RESOURCE_NODE
*PMem64Node
2137 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Ptr
;
2138 PCI_RESOURCE_NODE
*Node
;
2139 UINT8 DummyBarIndex
;
2142 Ptr
= PciDev
->ResourcePaddingDescriptors
;
2144 while (((EFI_ACPI_END_TAG_DESCRIPTOR
*) Ptr
)->Desc
!= ACPI_END_TAG_DESCRIPTOR
) {
2146 if (Ptr
->Desc
== ACPI_ADDRESS_SPACE_DESCRIPTOR
&& Ptr
->ResType
== ACPI_ADDRESS_SPACE_TYPE_IO
) {
2147 if (Ptr
->AddrLen
!= 0) {
2149 Node
= CreateResourceNode (
2157 InsertResourceNode (
2167 if (Ptr
->Desc
== ACPI_ADDRESS_SPACE_DESCRIPTOR
&& Ptr
->ResType
== ACPI_ADDRESS_SPACE_TYPE_MEM
) {
2169 if (Ptr
->AddrSpaceGranularity
== 32) {
2174 if (Ptr
->SpecificFlag
== 0x6) {
2175 if (Ptr
->AddrLen
!= 0) {
2176 Node
= CreateResourceNode (
2184 InsertResourceNode (
2197 if (Ptr
->SpecificFlag
== 0) {
2198 if (Ptr
->AddrLen
!= 0) {
2199 Node
= CreateResourceNode (
2207 InsertResourceNode (
2218 if (Ptr
->AddrSpaceGranularity
== 64) {
2223 if (Ptr
->SpecificFlag
== 0x6) {
2224 if (Ptr
->AddrLen
!= 0) {
2225 Node
= CreateResourceNode (
2233 InsertResourceNode (
2246 if (Ptr
->SpecificFlag
== 0) {
2247 if (Ptr
->AddrLen
!= 0) {
2248 Node
= CreateResourceNode (
2256 InsertResourceNode (
2273 Get padding resource for PCI-PCI bridge.
2275 @param PciIoDevice PCI-PCI bridge device instance.
2277 @note Feature flag PcdPciBusHotplugDeviceSupport determines
2278 whether need to pad resource for them.
2281 GetResourcePaddingPpb (
2282 IN PCI_IO_DEVICE
*PciIoDevice
2285 if (gPciHotPlugInit
!= NULL
&& FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
2286 if (PciIoDevice
->ResourcePaddingDescriptors
== NULL
) {
2287 GetResourcePaddingForHpb (PciIoDevice
);